Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Culshaw, GB
Andrew James Culshaw, Greenford GB
| Patent application number | Description | Published |
|---|---|---|
| 20110201629 | CYCLOHEXYL AMIDE DERIVATIVES AS CRF RECEPTOR ANTAGONISTS - There are described cyclohexyl amide derivatives of Formula I, | 08-18-2011 |
Andrew James Culshaw, Horsham GB
| Patent application number | Description | Published |
|---|---|---|
| 20100035874 | Organic compounds - There are described pyrazolo[5.1-b]oxazole derivatives useful as corticotropin releasing factor (CRF | 02-11-2010 |
| 20100035898 | Organic compounds - There are described cyclohexyl amide derivatives useful as corticotropin releasing factor (CRF | 02-11-2010 |
| 20110195983 | QUINAZOLINONE DERIVATIVES USEFUL AS VANILLOID ANTAGONISTS - The present invention relates to the use of a quinazolinone compound of the formula (I) wherein R | 08-11-2011 |
Andrew James Culshaw, West Sussex GB
| Patent application number | Description | Published |
|---|---|---|
| 20080312316 | Chromone Derivatives Useful as Antagonists of Vr1 Receptors - The invention relates to novel heterocyclic compounds of the formula | 12-18-2008 |
| 20080318940 | Quinazolinone Derivatives as Vanilloid Antagonists - The invention relates to quinazolinone compounds of the formula | 12-25-2008 |
| 20090082365 | Trisubstituted Quinazolinone Derivatives as Vanilloid Antagonists - The present invention relates to quinazolinone compounds of the formula | 03-26-2009 |
| 20110152261 | Organic compounds - There are described cyclohexyl amide derivatives useful as corticotropin releasing (CRF | 06-23-2011 |
Andrew James Culshaw, London GB
| Patent application number | Description | Published |
|---|---|---|
| 20080293939 | QUINAZOLINONE DERIVATIVES USEFUL AS ANTI-HYPERALGESIC AGENTS - The present invention relates to quinazolinones of formula (I) wherein R | 11-27-2008 |
Brian Culshaw, Bridge Of Weir Renfrewshire GB
| Patent application number | Description | Published |
|---|---|---|
| 20110032518 | DETECTION ASSEMBLY - A detection assembly comprising: a body portion having a slot formed along at least a portion of a length thereof, the slot having a slot opening formed in an outer surface of the body portion, the slot opening being arranged to receive a sensor optical fibre through the slot opening; a sensor optical fibre constrained to lie in said slot and in juxtaposition with a plurality of protrusions; and at least one swell member, the swell member being configured to increase in volume in response to exposure to a target measurand, the detection assembly being arranged whereby an increase in a volume of said swell member causes said sensor optical fibre to be urged against at least one of said plurality of protrusions thereby to cause bending of said sensor optical fibre. | 02-10-2011 |
Carl Culshaw, Wigan GB
| Patent application number | Description | Published |
|---|---|---|
| 20110126082 | MICRO CONTROLLER UNIT INCLUDING AN ERROR INDICATOR MODULE - A micro controller unit including an error indicator hardware module, the error indicator module being arranged to respond to event signals representative of internal and external fault and error events perturbing the micro controller unit function by registering in non-volatile memory a record of the nature of each of the events, wherein the record of the events is inaccessible to alteration. | 05-26-2011 |
| 20110145625 | MULTI-CORE CLOCKING SYSTEM WITH INTERLOCKED 'ANTI-FREEZE' MECHANISM - A clocking system, comprises a plurality of clocked data processing devices and a clock control circuit controlling a generation of a plurality of clock signals and an application of the clock signals to the plurality of data processing devices, allowing to clock at least one of the data processing devices while freezing all but the at least one of the data processing devices. A method for clocking a plurality of clocked data processing devices comprises controlling a generation of a plurality of clock signals and controlling an application of the clock signals to the plurality of data processing devices, allowing to clock at least one of the data processing devices while freezing all but the at least one of the data processing devices. | 06-16-2011 |
Carl Culshaw, Glasgow GB
| Patent application number | Description | Published |
|---|---|---|
| 20100241282 | INTEGRATED CIRCUIT HAVING A MICROCONTROLLER UNIT AND METHODS OF OPERATION THEREFOR - Integrated circuit having a Microcontroller Unit and Methods of Operation therefore. An integrated circuit comprises a microcontroller unit with synchronous logic operably coupled to non-clocked intelligent logic. The non-clocked intelligent logic is arranged to autonomously monitor multiple events associated with an operation of the synchronous logic and, in response thereto, the non-clocked intelligent logic initiates autonomously an alternate operational mode of the microcontroller unit. A method of operating a microcontroller unit is also described. | 09-23-2010 |
| 20110012650 | MICROCONTROLLER UNIT AND METHOD THEREFOR - A microcontroller unit comprises a reset controller operably coupled to a plurality of logic elements of the microcontroller unit. Low voltage detection logic is operably coupled to the reset controller and arranged to provide a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller. A method of operating a microcontroller unit is also described. | 01-20-2011 |
Carl Culshaw, Glascow GB
| Patent application number | Description | Published |
|---|---|---|
| 20090271548 | INTERRUPT RESPONSE CONTROL APPARATUS AND METHOD THEREFOR - An interrupt response control apparatus comprises an input for receiving an interrupt request. A response monitoring module is arranged to detect performance of a first function in response to the interrupt request. A timer is used to determine whether a period of time has elapsed, and if the interrupt request has not been serviced by the first function within the elapsed period of time, a function initiation module initiates a second function in response to failure to provide the first function within the elapsed period of time. | 10-29-2009 |