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Craig M.

Craig M. Aykroyd, Maricopa, AZ US

Patent application numberDescriptionPublished
20110279126Electrostatic occupant detection system - An electrostatic occupant detection system includes an electrostatic sensor and an electronic control unit. The electronic control unit is switchable between an occupant determination state in which the electronic control unit outputs a sine wave having a constant amplitude and a diagnosis state in which the electronic control unit maintains a voltage of the electrostatic sensor at a constant level. The electronic control unit gradually changes at least one of an amplitude and a frequency of the sine wave either when the electronic control unit switches from the occupant determination state to the diagnosis state and/or when the electronic control unit switches from the diagnosis state to the occupant determination state.11-17-2011

Craig M. Balme, Coventry, RI US

Patent application numberDescriptionPublished
20090266108ASH FILLED GEM STONES FOR MEMENTOS OF LOVED ONES - A lasting memento derived from the ashes of a cremated human or pet, and a method of manufacture thereof. A rough gem stone of either natural or man made chemistry can have a hole or plurality of holes that are drilled into them. The ashes are subsequently inserted into the drilled hole, whereupon, the holes are permanently sealed with known materials and sealing techniques. The rough stones are then faceted using conventional faceting and polishing procedures. The same techniques may be used to ‘drill and fill’ completed, faceted gem stones and man made synthetic crystals, resulting in the same permanent memento that may be incorporated into an article of jewelry.10-29-2009

Craig M. Baysinger, Livermore, CA US

Patent application numberDescriptionPublished
20100331717Seizure Sensing and Detection Using an Implantable Device - A system and method for detecting and predicting neurological events with an implantable device uses a relatively low-power central processing unit in connection with signal processing circuitry to identify features (including half waves) and calculate window-based characteristics (including line lengths and areas under the curve of the waveform) in an electrographic signal received from a patient's brain. The features and window-based characteristics are combinable in various ways according to the invention to detect and predict neurological events in real time, enabling responsive action by the implantable device.12-30-2010

Craig M. Collotzi, Riverton, UT US

Patent application numberDescriptionPublished
20110170722HEARING AID DEVICE WITH INTERCHANGEABLE COVERS - A hearing aid device is described. The device including a housing having a plurality of sides, the housing also having a first color. At least one electrical component is held within the housing. A clip removably attachable to the housing is provided. The clip has a second color. The clip covers at least a portion of the plurality of sides of the housing.07-14-2011
20110235834HEARING AID DEVICE WITH A VOLUME CONTROL - A hearing aid is described. The hearing aid includes a control surface and a control element. The hearing aid further includes a plurality of components in addition to the control surface and the control element. A portion of the control surface is configured to engage a portion of the control element. The control surface at least partially circumscribes at least one of the plurality of components.09-29-2011

Craig M. Combel, Issaquah, WA US

Patent application numberDescriptionPublished
20090044264SPAM REDUCTION IN REAL TIME COMMUNICATIONS BY HUMAN INTERACTION PROOF - The claimed subject matter provides a system and/or a method that facilitates authenticating a data communication. An interface component can receive data related to a real time data communication between two or more clients. A verification component can employ a human interaction proof (HIP) to a client participating within the real time data communication, wherein a human identity of the client is authenticated as a function of a response to the HIP.02-12-2009

Craig M. Darsow, Rochester, MN US

Patent application numberDescriptionPublished
20090293030Concurrently Modeling Delays Between Points in Static Timing Analysis Operation - An apparatus, program product and method perform static timing analysis on an integrated circuit design by concurrently modeling a plurality of timing delays associated with a connection between points in the design. The delays are conveyed in multiple clock signals of a single timing run of a static timing analysis operation. Multiple paths comprising logical user defined delay segments are assigned different delays. Only one signal may be permitted to propagate along each path.11-26-2009
20090293031Replicating Timing Data in Static Timing Analysis Operation - An apparatus, method and program product create multiple copies of a clock signal, or phase, to analyze timing operations within a single timing run of a static timing analysis operation. At least one path comprising logical user defined delay segments and a timing point may be associated with both a common point and no delay. An original clock signal may propagate along the logical path without incurring delay until arriving back at the common point, along with the original signal. All other clocks may be ignored or prevented from propagating long the path. Multiple replicated copies may be accomplished without requiring additional hardware.11-26-2009
20110265052EFFICIENTLY APPLYING A SINGLE TIMING ASSERTION TO MULTIPLE TIMING POINTS IN A CIRCUIT - A computer implemented method, system and/or computer program product efficiently manage timing parameters in a circuit. Multiple instances of a definition are implemented onto a circuit. A set of related pins from the multiple instances are defined, and a common assertion value is asserted against all pins in the set of related pins.10-27-2011
20110271245CLOCK ALIAS FOR TIMING ANALYSIS OF AN INTEGRATED CIRCUIT DESIGN - A timing analysis mechanism allows defining a clock alias that correlates a clock that is not present in an integrated circuit design to a real clock in the integrated circuit design. In a first implementation, when an existing user assertion references a clock alias, the timing analysis mechanism generates a new user assertion that references the real clock specified in the clock alias. The new user assertion is then used in the timing analysis and the existing user assertion is not. In a second implementation, when an existing user assertion references a clock alias, the timing analysis mechanism generates a duplicate clock in the timing database, preserving all its attributes, and then passes the assertion using the alias name as well as any assertions using the corresponding real clock name to the timing engine to be used in the timing analysis.11-03-2011

Craig M. Eucken, Scio, OR US

Patent application numberDescriptionPublished
20100018616ZIRCONIUM STRIP MATERIAL AND PROCESS FOR MAKING SAME - Methods for producing zirconium strips that demonstrate improved formability are disclosed. The zirconium strips of the present disclosure have a purity and crystalline microstructure suitable for improved formability, for example, in the manufacture of certain articles such as panels for plate heat exchangers and high performance tower packing components. Other embodiments disclosed herein relate to formed substantially pure zirconium strip, articles of manufacture produced from the substantially pure zirconium strip, and methods for making the articles of manufacture.01-28-2010
20110120602ZIRCONIUM STRIP MATERIAL AND PROCESS FOR MAKING SAME - Methods for producing zirconium strips that demonstrate improved formability are disclosed. The zirconium strips of the present disclosure have a purity and crystalline microstructure suitable for improved formability, for example, in the manufacture of certain articles such as panels for plate heat exchangers and high performance tower packing components. Other embodiments disclosed herein relate to formed substantially pure zirconium strip, articles of manufacture produced from the substantially pure zirconium strip, and methods for making the articles of manufacture.05-26-2011

Patent applications by Craig M. Eucken, Scio, OR US

Craig M. Farniok, Godfrey, IL US

Patent application numberDescriptionPublished
20080289163METHOD OF RAPID HOLE TRANSFER TO REPLACEMENT PARTS - A method of replacing an existing part or parts on a structure such as an aircraft. The structure is inducted for modification. An existing part is removed and a new part is temporarily installed. Hole locations are digitally transferred to the new part, e.g., photographically captured in a three-dimensional coordinate measurement system, converted to targets printable in a laser projection system. Targets are laser projected or printed on the replacement part. Holes are drilled at each printed target. The holes drilled at printed targets match hole locations on the existing part. Then, the new/replacement part is permanently attached to the structure.11-27-2008

Craig M. Herzinger, Lincoln, NE US

Patent application numberDescriptionPublished
20090091758Method of constructing a deviation angle self compensating substantially achromatic retarder to compensate beam traslation - A method of configuring a system for introducing a relative phase retardation into orthogonally polarized components of an electromagnetic beam entered thereinto, wherein the system involves a substantially achromatic multiple element retarder system for use in wide spectral range (for example, 190-1700 nm) rotating compensator spectroscopic ellipsometer and/or polarimeter systems.04-09-2009
20100220313Terahertz-infrared ellipsometer system, and method of use - The present invention relates to ellipsometer and polarimeter systems, and more particularly is an ellipsometer or polarimeter or the like system which operates in a frequency range between 300 GHz or lower and extending to higher than at least 1 Tera-hertz (THz), and preferably through the Infra-red (IR) range up to, and higher than 100 THz, including: 09-02-2010
20110188040Mounting for deviation angle self compensating substantially achromatic retarder - A system, method of configuring, and application a system for introducing a relative phase retardation into orthogonally polarized components of an electromagnetic beam entered thereinto, wherein the system involves a substantially achromatic multiple element retarder system for use in wide spectral range (for example, 190-1700 nm) rotating compensator spectroscopic ellipsometer and/or polarimeter systems.08-04-2011

Patent applications by Craig M. Herzinger, Lincoln, NE US

Craig M. Jensen, Kailua, HI US

Patent application numberDescriptionPublished
20090010836HYDROGEN STORAGE MATERIALS, METAL HYDRIDES AND COMPLEX HYDRIDES PREPARED USING LOW-BOILING-POINT SOLVENTS - The invention provides systems and methods for preparing hydrogen storage materials using low boiling point solvents or reaction media. Examples of such solvents or reaction media include dimethyl ether, ethyl methyl ether, epoxyethane, and trimethylamine. The synthesis of the hydrogen storage materials is conducted is a selected medium, and after synthesis is complete, the reaction medium is removed as necessary by moderate heating.01-08-2009

Craig M. Johnson, Creve Coeur, IL US

Patent application numberDescriptionPublished
20080257528Slot adapter for cleaning heat exchanger system and machine using same - A machine having a heat exchanger system includes a heat exchanger guard including first and second sidewalls. The first sidewall is adjacent a core of the heat exchanger system. A first slot adapter is positioned over an opening formed in the first sidewall. The first slot adapter is vertically oriented and includes a first slot opening for receiving a compressed air cleaning wand therethrough. A cover is fixedly attached to the first slot adapter and is movable between an open position and a closed position.10-23-2008

Craig M. Mazzagatte, Aliso Viejo, CA US

Patent application numberDescriptionPublished
20100088423ESTABLISHING AND MAINTAINING A CONNECTION BY A CLIENT TO A SERVER WITHIN A NETWORK - A method for establishing and maintaining a connection by a client to a server within a network includes creating a socket for connecting to the server, based on authentication information associated with the client, and connecting to the server using the socket. In addition, the method includes saving the authentication information associated the client. The method further includes in a case where subsequent connection to the server is requested by the client, reconnecting to the server via the socket, based on the saved authentication information. An apparatus for establishing and maintaining a connection by a client to a server within a network is also provided.04-08-2010

Craig M. Okruhlica, San Jose, CA US

Patent application numberDescriptionPublished
20090046103Shared readable and writeable global values in a graphics processor unit pipeline - An arithmetic logic stage in a graphics processor unit includes arithmetic logic units (ALUs) and global registers. The registers contain global values for a group of pixels. Global values may be read from any of the registers, regardless of which of the pixels is being operated on by the ALUs. However, when writing results of the ALU operations, only some of the global registers are candidates to be written to, depending on the pixel number. Accordingly, overwriting of data is prevented.02-19-2009
20090046105Conditional execute bit in a graphics processor unit pipeline - An arithmetic logic stage in a graphics processor unit includes a number of arithmetic logic units (ALUs). An instruction is applied to sets of operands comprising pixel data associated with different pixels. The value of a conditional execute bit determines how the pixel data in a set of operands is processed by the ALUs.02-19-2009
20090049276Techniques for sourcing immediate values from a VLIW - Sourcing immediate values from a very long instruction word includes determining if a VLIW sub-instruction expansion condition exists. If the sub-instruction expansion condition exists, operation of a portion of a first arithmetic logic unit component is minimized. In addition, a part of a second arithmetic logic unit component is expanded by utilizing a block of a very long instruction word, which is normally utilized by the first arithmetic logic unit component, for the second arithmetic logic unit component if the sub-instruction expansion condition exists.02-19-2009
20110254848Buffering deserialized pixel data in a graphics processor unit pipeline - An arithmetic logic stage in a graphics processor unit pipeline includes a number of arithmetic logic units (ALUs) and at least one buffer that stores pixel data for a group of pixels. Each clock cycle, the buffer stores one row of a series of rows of pixel data. A deserializer deserializes the rows of pixel data before the pixel data is placed in the buffer. After the buffer accumulates all rows of pixel data for a pixel, then the pixel data for the pixel can be operated on by the ALUs.10-20-2011

Craig M. Smith, Spencerport, NY US

Patent application numberDescriptionPublished
20090278964METHOD AND APPARATUS FOR CAPTURING HIGH QUALITY LONG EXPOSURE IMAGES WITH A DIGITAL CAMERA - A digital camera captures high quality long exposure images by capturing and summing several images of the same scene. The effective ISO of the camera is reduced by scaling the summed image, thus reducing image noise and improving long exposure quality.11-12-2009

Patent applications by Craig M. Smith, Spencerport, NY US

Craig M. Trim, Glendale, CA US

Patent application numberDescriptionPublished
20110225447PREFERRED RESOURCE SELECTOR - A computer implemented method, and computer program product for requesting resources. The computer receives an assignment of an Internet protocol address. The computer compares a computer context of a client computer with an intranet access criterion to form a comparison result. The computer selects at least one preferred uniform resource identifier based on the comparison result, indicating the intranet is accessible. The computer transmits a request to a server using at least one preferred uniform resource identifier using a packet network.09-15-2011

Craig M. Verba, Maple Grove, MN US

Patent application numberDescriptionPublished
20090041029METHOD AND SYSTEM FOR MANAGING TRAFFIC IN FIBRE CHANNEL SYSTEMS - Method and system for routing fibre channel frames using a fibre channel switch element is provided. The method includes, inserting a time stamp value in a fibre channel frame that is received at a receive segment of the fibre channel switch element; determining if a timeout occurs after a frame arrives at a receive buffer; and processing the frame if the timeout occurred. The method also includes, determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data; subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fibre channel switch element. A timeout checker circuit declares a timeout after comparing a time stamp value that is inserted in a fibre channel frame with a programmed time out value and a global counter value.02-12-2009
20090296715METHOD AND SYSTEM FOR PROGRAMMABLE DATA DEPENDANT NETWORK ROUTING - A method and system for routing fibre channel frames using a fibre channel switch element is provided. The switch element includes, a look up table that is indexed by domain, area, a virtual storage area number and/or AL_PA values of frames entering the fibre channel switch element; and logic for generating a column select signal that is used to select a column from the look up table for frame routing information The switch element also includes logic for validating a frame route by performing word depth match. A register is used to load look up table entries and column entries are selected based on the column select signal. The method includes, indexing a look up table with plural fibre channel frame header values; selecting a table value for routing a fibre channel frame based on a column select signal; and routing the frame if a route is valid.12-03-2009
20100040074MULTI-SPEED CUT THROUGH OPERATION IN FIBRE CHANNEL SWITCHES - A method and system for routing frames based on a port's speed using a fibre channel switch element is provided. The method includes, receiving a portion of a frame in a receive buffer of a port; determining a frame length threshold; and setting up a status bit based on the port's speed, the frame length threshold and an amount of frame received. The status bit is sent to a transmit segment of the fibre channel switch element and the frame length threshold value is inversely proportional to the port's speed. Also, if the receive buffer is almost full when a frame arrives at the receive port, then a cut status is based on a frames end of frame (“EOF”) value.02-18-2010
20100118880METHOD AND SYSTEM FOR NETWORK SWITCH ELEMENT - Method and system for a network switch element is provided. The switch element includes a plurality of megaports, each megaport uniquely identified by a unique megaport address identifier for network addressing. Each megaport includes a plurality of operational ports, each operational port identified by a unique operational port address identifier. The switch element also includes a local crossbar for communication between the plurality of operational ports, and a shared logic module configured to provide common control of the plurality of operational ports within a megaport to allow operational ports to share resource of a single megaport to route network packets there between. The switch element also includes a global crossbar configured to allow communication between the megaports05-13-2010

Patent applications by Craig M. Verba, Maple Grove, MN US

Craig M. Watjen, Bellevue, WA US

Patent application numberDescriptionPublished
20080272132COLLAPSIBLE CONTAINER - A collapsible container for containing goods, including a liquid and/or solid/liquid mixture, configured to be assembled and disassembled manually without the use of tools. The container includes a plurality of upright panels coupled to a base by their bottom portions. The bottom portion of each panel has a relieved portion that extends into a corresponding groove formed in the base. The panels include panels of a first type and panels of a second type, with the relieved portion of the panels of the first type differing from the relieved portion of the panels of the second type. Each panel of the first type is flanked along its opposing upright edges by a pair of adjacent panels of the second type. Each of the edges of each of the panels is coupled by an edge joining assembly to one of the edges of one of the flanking panels.11-06-2008
20090266813COLLAPSIBLE CONTAINER - A collapsible container for containing goods, including a liquid and/or solid/liquid mixture, configured to be assembled and disassembled manually without the use of tools. The container includes a plurality of upright panels coupled to a base by their bottom portions. Each panel of a first type is flanked along its opposing upright edges by a pair of adjacent panels of a second type. Each of the edges of each of the panels is coupled by an edge joining assembly to one of the edges of one of the flanking panels. The assembly comprises a first elongated edge joining member having a longitudinal channel with alternating partially enclosed portions and substantially unenclosed portions and a second elongated edge joining member having longitudinally extending spaced apart locking members. Each unenclosed portion is configured to receive a locking member, which are slid longitudinally within the channel into an adjacent partially enclosed portion.10-29-2009