Colwill

Bryant C. Colwill, Hopewell Junction, NY US

Patent application number	Description	Published
20100109119	METHOD OF FORMING A GUARD RING OR CONTACT TO AN SOI SUBSTRATE - Embodiments of the present invention provide a microelectronic structure including a conductive element contacting a bulk semiconductor region of a substrate, the bulk semiconductor region being separated from a semiconductor-on-insulator (“SOI”) layer of the substrate by a buried dielectric layer. The microelectronic structure includes a trench isolation region overlying the buried dielectric layer, the trench isolation region sharing an edge with the SOI layer; a conformal layer overlying the trench isolation region, the conformal layer having a top surface and an opening defining a wall extending from the top surface towards the trench isolation region, the top surface including a lip portion adjacent to the wall; a dielectric layer overlying the top surface of the conformal layer; and a conductive element in conductive communication with the bulk semiconductor region, the conductive element consisting essentially of at least one of a semiconductor, a metal, and a conductive compound of a metal, and extending through the dielectric layer, the opening in the conformal layer, the trench isolation region, and the buried dielectric layer, and the conductive element contacting the lip portion.	05-06-2010

Patent application number	Description	Published
20090001465	METHOD OF FORMING A GUARD RING OR CONTACT TO AN SOI SUBSTRATE - A method is provided of forming a conductive via in contact with a bulk semiconductor region of a semiconductor-on-insulator (“SOI”) substrate. A first opening is formed in a conformal layer overlying a trench isolation region. The trench isolation region may share an edge with an SOI layer of the substrate. Desirably, a dielectric layer is deposited over a top surface of the conformal layer and the trench isolation region. A second opening can then be formed which extends through the dielectric layer and the first opening in the conformal layer. Desirably, portions of the bulk semiconductor region and the top surface of the conformal layer are exposed within the second opening. The second opening can then be filled with at least one of a metal or a semiconductor to form a conductive element contacting the exposed portions of the bulk semiconductor region and the top surface of the conformal layer.	01-01-2009

Patent application number	Description	Published
20080263070	Common drawing objects - A transparent format can be used to store the content of shape objects so that documents authored by different types of applications can uniformly share information related to the shape objects. Shape objects comprise, for example, properties such as geometries, lines, fills, size and the like. The properties can have other subordinate properties. For example, geometries can comprise polygons properties, and fill properties can comprise color properties. The shape objects can be hierarchically represented such that principles of object oriented programming can be applied to the shape object.	10-23-2008