| Patent application number | Description | Published |
| 20090233440 | Seed Layers for Metallic Interconnects - One embodiment of the present invention is a method for depositing two or more PVD seed layers for electroplating metallic interconnects over a substrate, the substrate including a patterned insulating layer which includes at least one opening surrounded by a field, the at least one opening having top corners, sidewalls, and bottom, the field and the at least one opening being ready for depositing one or more seed layers, and the method includes: (a) depositing by a PVD technique, in a PVD chamber, a continuous PVD seed layer over the sidewalls and bottom of the at least one opening, using a first set of deposition parameters; and (b) depositing by a PVD technique, in a PVD chamber, another PVD seed layer over the substrate, using a second set of deposition parameters, wherein (i) the second set of deposition parameters includes at least one deposition parameter which is different from any of the parameters in the first set of deposition parameters, or the second set of deposition parameters includes at least one deposition parameter whose value is different in the two sets of deposition parameters, (ii) at least one of the PVD seed layers includes a material selected from a group consisting of Cu, Ag, or alloys including one or more of these metals, (iii) the PVD seed layers have no substantial overhangs sealing or pinching-off the top corners of the at least one opening, (iv) the combined thickness of the seed layers over the field is sufficient to enable uniform electroplating across the substrate, and (v) the combined seed layers inside the at least one opening leave sufficient room for electroplating inside the at least one opening. | 09-17-2009 |
| 20090239372 | Seed Layers for Electroplated Interconnects - One embodiment of the present invention is a method for depositing two or more seed layers for electroplating metallic interconnects over a substrate, the substrate having a patterned insulating layer which includes at least one opening and a field surrounding the at least one opening, the at least one opening having top corners, sidewalls, and bottom, the field and the at least one opening being ready for depositing one or more seed layers, and the method includes: (a) depositing a continuous seed layer over the sidewalls and bottom of the at least one opening using a first set of deposition parameters; and (b) depositing a second seed layer over the continuous seed layer using a second set of deposition parameters, wherein (i) the second set of deposition parameters includes at least one deposition parameter which is different from any of the parameters in the first set of deposition parameters, or the second set of deposition parameters includes at least one deposition parameter whose value is different in the two sets of deposition parameters, (ii) the continuous and second seed layers being sufficiently thick over the field to enable uniform electroplating across the substrate, and (iii) after depositing the seed layers, there is sufficient room for electroplating inside the at least one opening. | 09-24-2009 |
| 20100213614 | Methods for Passivating Metallic Interconnects - One or more embodiments of the present invention relates to a method for passivating metallic interconnects, said method including: forming a metallic conductor embedded in at least one surrounding dielectric layer, said metallic conductor including a metal or alloy chosen from a group consisting of Cu, Ag, and alloys including one or more of these metals, said metallic conductor and said at least one surrounding dielectric layer having top surfaces; and forming a capping passivation film directly on the top surface of the metallic conductor, but not over the top surface of the at least one surrounding dielectric layer, wherein said capping passivation film including one or more materials selected from the group consisting of copper sulfide, silver sulfide, copper selenide, silver selenide, copper telluride, and silver telluride, wherein the copper sulfide refers to CuS | 08-26-2010 |
| 20100215560 | Floating Si and/or Ge Foils - One embodiment of the present invention is a method for producing a silicon (Si) and/or germanium (Ge) foil, the method including: dissolving a Si and/or Ge source material in a molten metallic bath at an elevated temperature T | 08-26-2010 |
| 20100243462 | Methods for Activating Openings for Jets Electroplating - One embodiment of the present invention one embodiment of the present invention is a method for electrofilling a metal or alloy inside at least one opening surrounded by a field on a front surface of a substrate, wherein at least one surface inside the at least one opening includes an exposed metallic surface, said method including steps of: (a) immersing the substrate in an activation or wetting solution; (b) applying ultrasonic or megasonic vibrations to the substrate; and, after commencing applying ultrasonic or megasonic vibrations to the substrate, (c) applying high pressure jets of an electrolyte to the substrate, said electrolyte includes metallic ions of said metal or alloy; and (d) applying an electroplating current to the substrate to electroplate said metal or alloy inside the at least one opening. | 09-30-2010 |
| 20100288189 | Floating Semiconductor Foils - One embodiment of the present invention is a method for producing a silicon (Si) and/or germanium (Ge) foil, the method including: dissolving a Si and/or Ge source material in a molten metallic bath at an elevated temperature T | 11-18-2010 |
| 20110068470 | Apparatus For Making Interconnect Seed Layers And Products - An apparatus for depositing seed layers over a substrate, which substrate includes a patterned insulating layer with at least one opening surrounded by a field, and which opening has sidewalls, bottom surfaces and top corners, includes: a CVD chamber adapted to deposit one or more CVD seed layers over the substrate; a PVD chamber adapted to deposit one or more PVD seed layers over the substrate; and a controller which includes recipe information. The recipe information includes deposition sequence and process parameters for operation of the deposition chambers. The controller, in response to the recipe information, causes the CVD chamber to deposit a continuous CVD seed layer over the substrate, and causes the PVD chamber to deposit a PVD seed layer over the substrate, wherein: (a) the continuous CVD seed layer is continuous over the sidewalls and bottom surfaces of the at least one opening, (b) the continuous CVD seed layer has a thickness from about 20 Å to about 250 Å over the field, and (c) the controller causes the stopping of the deposition of the seed layers so as to leave room for electroplating inside the at least one opening. | 03-24-2011 |