| Patent application number | Description | Published |
|---|
| 20100303067 | ASYNCHRONOUS PIPIELINED INTERCONNECT ARCHITECTURE WITH FANOUT SUPPORT - Circuits comprising an asynchronous programmable interconnect with fan out support that include a multi-port switch and a first and second buffer-switch circuit, and methods of forming such circuits, are provided. Additional circuits and methods are disclosed. | 12-02-2010 |
| 20110012666 | NON-PREDICATED TO PREDICATED CONVERSION OF ASYNCHRONOUS REPRESENTATIONS - Methods, circuits and systems for converting of a non-predicated asynchronous netlist to a predicated asynchronous netlist are described. These may operate to identify one or more portions of an asynchronous netlist corresponding to a partially utilized portion of an asynchronous circuit. The asynchronous netlist may be modified to control the partially utilized portion. Additional methods, circuits, and systems are disclosed. | 01-20-2011 |
| 20110016439 | RESET MECHANISM CONVERSION - Methods, circuits, and systems for converting reset mechanisms in a synchronous circuit design into a corresponding asynchronous representation are described. These may operate to convert synchronous state holding blocks that include reset signals to corresponding asynchronous dataflow logic blocks. A replicated reset token at a fraction of the operational frequency of the reset signal may be distributed to the locations of the asynchronous dataflow logic blocks. Additional methods, circuits, and systems are disclosed. | 01-20-2011 |
| 20110058570 | PROGRAMMABLE CROSSBAR STRUCTURES IN ASYNCHRONOUS SYSTEMS - Methods, systems, and circuits for forming and operating a crossbar structure in an asynchronous system are described. One or more input ports of a programmable crossbar structure may be connected to send data to one or more output ports. A group of output ports each receiving data from an input port may be connected to send, in response, control signals via a programmable element to the input port. The number of programmable elements used may be determined by the number of input ports being copied to more than one output port. Additional methods, systems, and circuits are disclosed. | 03-10-2011 |
| 20110062987 | ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS - Apparatus, systems, and methods operate to receive a sufficient number of asynchronous input tokens at the inputs of an asynchronous apparatus to conduct a specified processing operation, some of the tokens decoded to determine an operation type associated with the specified processing operation; to receive an indication that outputs of the asynchronous apparatus are ready to conduct the specified processing operation; to signal a synchronous circuit to process data included in the tokens according to the specified processing operation; and to convert synchronous outputs from the synchronous circuit into asynchronous output tokens to be provided to outputs of the asynchronous apparatus when the synchronous outputs result from the specified processing operation. Additional apparatus, systems, and methods are disclosed. | 03-17-2011 |
| 20110062991 | ASYNCHRONOUS CIRCUIT REPRESENTATION OF SYNCHRONOUS CIRCUIT WITH ASYNCHRONOUS INPUTS - A synchronous circuit design is converted to an asynchronous circuit by converting synchronous circuit logic to an asynchronous circuit logic, and converting one or more asynchronous inputs at a circuit boundary to an asynchronous input to the converted asynchronous circuit logic, such that the converted asynchronous input is operable to generate a token upon observing a change in state on the asynchronous input. One or more asynchronous outputs at a circuit boundary is converted to an asynchronous output from the converted asynchronous circuit logic, such that the converted asynchronous output is operable to output updated data as soon as changed data is received from the converted asynchronous circuit logic in the asynchronous output. | 03-17-2011 |
| 20110066873 | MULTI-CLOCK ASYNCHRONOUS LOGIC CIRCUITS - Methods, systems, and circuits for implementing multi-clock designs in asynchronous logic circuits are described. A method may include associating one or more data tokens with a clock domain of a multi-clock domain netlist. A durational relationship between a clock period associated with the clock domain and one or more other clock domains of the multi-clock domain netlist may be determined. Data tokens used in other clock domains may be transformed based on the determined relationship. | 03-17-2011 |
| 20110066986 | TOKEN ENHANCED ASYNCHRONOUS CONVERSION OF SYNCHONOUS CIRCUITS - A synchronous circuit design is converted to an asynchronous circuit by converting synchronous circuit logic to an asynchronous circuit logic, and one or more additional tokens into the converted asynchronous circuit. The circuit is initialized with a desired additional number of tokens placed in the asynchronous circuit, or a desired number of tokens are inserted at an input before taking tokens from an output. | 03-17-2011 |
| 20110078644 | ASYCHRONOUS SYSTEM ANALYSIS - Methods, systems, and circuits that implement timing analyses of an asynchronous system are described. A method may include converting a synchronous circuit design into an asynchronous representation, wherein a critical path may be identified. The critical path may be converted to a corresponding path in the synchronous circuit design. Additional methods, systems, and circuits are disclosed. | 03-31-2011 |
| 20110130171 | ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS - Apparatus, systems, and methods operate to receive a sufficient number of asynchronous input tokens at the inputs of an asynchronous apparatus to conduct a specified processing operation, some of the tokens decoded to determine an operation type associated with the specified processing operation; to receive an indication that outputs of the asynchronous apparatus are ready to conduct the specified processing operation; to signal a synchronous circuit to process data included in the tokens according to the specified processing operation; and to convert synchronous outputs from the synchronous circuit into asynchronous output tokens to be provided to outputs of the asynchronous apparatus when the synchronous outputs result from the specified processing operation. Additional apparatus, systems, and methods are disclosed. | 06-02-2011 |
