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| 20090059752 | OPTICAL DISC APPARATUS AND METHOD OF DRIVING THE SAME - An optical disc apparatus, and a method of driving the same, includes a light focusing element disposed to focus light emitted from a light source onto a disc; an actuator to move the light focusing element toward or away from the disc according to a voltage applied to the actuator; a light intensity detection unit to detect the intensity of light reflected from the disc ; a servo unit to generate a gap error signal and a third voltage, the third voltage being the sum of a first voltage and a second voltage, and to apply the generated third voltage to the actuator; and a control unit to control the servo unit to perform a gap pull-in operation when the light focusing element is moved toward the disc according to the gap error signal and the third voltage. | 03-05-2009 |
| 20100328519 | AUTO FOCUSING APPARATUS AND CAMERA APPLYING THE SAME - Disclosed are an auto-focusing apparatus and a camera employing the same. The auto-focusing apparatus includes a pupil division unit including a plurality of holes of different sizes. The pencil of light ray entering through the photographing lens of the camera are divided into a plurality of pencils of light ray by being passed through the plurality of holes. The pupil division unit is arranged to focus the plurality of pencils of light ray onto an image capturing unit of the camera. The auto-focusing apparatus further includes a calculation unit that determines the focusing state of the camera based on combined images of the plurality of pencils of light ray captured by the image capturing unit. | 12-30-2010 |
| 20110097061 | IMAGE STABILIZER - An image stabilizer is provided, which compensates for an external turbulence caused by hand-shake by moving an imaging unit. The image stabilizer includes a first yoke, a second yoke, and a driving frame interposed between the first yoke and the second yoke and movable in a vertical direction, a horizontal direction, and a rotation direction with respect to an optical axis. The imaging unit is mounted in a center of the driving frame. The image stabilizer also includes a coil plate connected to a surface of the driving frame facing the first yoke and having a plurality of pattern coils arranged at locations corresponding to a plurality of magnets of the second yoke. The image stabilizer further includes a support unit disposed on a surface of the driving frame facing the second yoke and supporting the driving frame in pitch, yaw and roll directions with respect to the second yoke. | 04-28-2011 |
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| 20090284339 | Transformers, balanced-unbalanced transformers (baluns) and Integrated circuits including the same - A transformer of fully symmetric structure includes a primary coil assembly and a secondary coil assembly. The primary coil assembly includes a plurality of primary coils formed in a plurality of metal layers, and a first interlayer connection unit for connecting the primary coils. The secondary coil assembly includes a plurality of secondary coils formed in the plurality of metal layers, and a second interlayer connection unit for connecting the secondary coils. The primary and secondary coils formed in the same metal layer are concentric and axisymmetric with respect to a diameter line passing through a planar center point. A balanced-unbalanced transformer (balun) is a type of transformer that may be used to convert an unbalanced signal to a balanced one or vice versa. An integrated circuit may include a semiconductor substrate and a transformer. Electrical elements such as transistors may be formed on the semiconductor substrate. | 11-19-2009 |
| 20100230381 | Method of manufacturing LC circuit and LC circuit - A method for manufacturing an LC circuit, including forming a first conductive layer pattern serving as a lower electrode of a capacitor on a first interlayer insulating layer, forming a dielectric layer pattern storing electric charges on the first conductive layer pattern, forming a second conductive layer pattern serving as an upper electrode of the capacitor on the dielectric layer pattern, forming a second interlayer insulating layer on the second conductive layer pattern, forming a contact via exposing one of the first or second conductive layer pattern in the second interlayer insulating layer, and filling the contact via with a contact plug, and forming a third conductive layer pattern on the second interlayer insulating layer having the contact plug, wherein the third conductive layer pattern is electrically connected to the contact plug, and is etched in a metal interconnection type layer and functions as an inductor. | 09-16-2010 |
| 20100238603 | Capacitor structure - In a capacitor structure and method of forming the same, a first electrode, a second electrode, and a first insulation layer are sequentially formed on a substrate. The first and second electrodes and the first insulation layer are covered with a second insulation layer on the substrate. A first plug is in contact with the second electrode through the second insulation layer. A second plug is in contact with the first electrode through the first and second insulation layer. A third insulation layer is formed on the second insulation layer. Third and fourth comb-shaped electrodes are formed in the third insulation layer. The third electrode is contact with the first plug and the fourth electrode is contact with the second plug while facing the third electrode. Thus, the teeth of the comb-shaped electrodes are alternately arranged and spaced apart in the third insulation layer. | 09-23-2010 |
| 20110183441 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A semiconductor device and a method of fabricating a semiconductor device that includes forming an interlayer insulating film on a semiconductor substrate; depositing a first soft magnetic thin film on the interlayer insulating film through sputtering using a target containing at least one of Fe, Co, Ni, or alloys thereof, the target further containing at least one of Ti, Hf, or B, the sputtering being performed using an N | 07-28-2011 |
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| 20110175141 | SEMICONDUCTOR DEVICES INCLUDING MOS TRANSISTORS HAVING AN OPTIMIZED CHANNEL REGION AND METHODS OF FABRICATING THE SAME - A semiconductor device, including a device isolation layer arranged on a predetermined region of a semiconductor substrate to define an active region, the active region including a central top surface of a (100) crystal plane and an inclined edge surface extending from the central top surface to the device isolation layer, a semiconductor pattern covering the central top surface and the inclined edge surface of the active region, the semiconductor pattern including a flat top surface of a (100) crystal plane that is parallel with the central top surface of the active region and a sidewall that is substantially perpendicular to the flat top surface, and a gate pattern overlapping the semiconductor pattern. | 07-21-2011 |
| 20110201166 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - A method of manufacturing a semiconductor device includes forming a gate electrode on a semiconductor substrate and a sidewall spacer on the gate electrode. Then, a portion of the semiconductor substrate at both sides of the sidewall spacer is partially etched to form a trench. A SiGe mixed crystal layer is formed in the trench. A silicon layer is formed on the SiGe mixed crystal layer. A portion of the silicon layer is partially etched using an etching solution having different etching rates in accordance with a crystal direction of a face of the silicon layer to form a capping layer including a silicon facet having an (111) inclined face. | 08-18-2011 |
| 20110230027 | Methods of Forming Semiconductor Devices Having Faceted Semiconductor Patterns - Provided are methods of forming semiconductor devices. A method may include preparing a semiconductor substrate including a first region and a second region adjacent the first region. The method may also include forming sacrificial pattern covering the second region and exposing the first region. The method may further include forming a capping layer including a faceted sidewall on the first region using selective epitaxial growth (SEG). The faceted sidewall may be separate from the sacrificial pattern. The sacrificial pattern may be removed. Impurity ions may be implanted into the semiconductor substrate. | 09-22-2011 |
| 20110241071 | Semiconductor Devices Having Field Effect Transistors With Epitaxial Patterns in Recessed Regions - A semiconductor device includes a device isolation pattern, a gate line, and an epitaxial pattern. The device isolation pattern is disposed in a semiconductor substrate to define an active area. The gate line intersects the active area. The epitaxial pattern fills a recess region in the active area at one side of the gate line and includes a different constituent semiconductor element than the semiconductor substrate. The recess region includes a first inner sidewall that is adjacent to the device isolation pattern and extends in the lengthwise direction of the gate, and a second inner sidewall that extends in the direction perpendicular to the lengthwise direction of the gate line. The active area forms the first inner sidewall of the recess, while the device isolation layer forms at least a portion of the second inner sidewall of the recess. The epitaxial pattern contacts the first inner sidewall and the second inner sidewall of the recess region. | 10-06-2011 |
| 20110306184 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness. | 12-15-2011 |
| 20120021537 | METHODS OF EVALUATING EPITAXIAL GROWTH AND METHODS OF FORMING AN EPITAXIAL LAYER - A method of evaluating an epitaxial growing process includes forming a mold layer on each of a plurality of substrates, forming a photoresist pattern on each mold layer, the photoresist pattern having opening portions, a total area of a bottom portion of the opening portions being different for each substrate, patterning each mold layer to expose a surface portion of the substrate to form an evaluation pattern on each substrate, evaluation patterns including opening portions corresponding to the opening portion in the photoresist pattern, determining substrate opening ratios for each substrate based on the opening portions in the evaluation pattern thereon, the substrate opening ratios being different for each substrate, performing a selective epitaxial process on each substrate to form an epitaxial layer, and evaluating characteristics of the epitaxial layer for each substrate to determine an optimal substrate opening ratio. | 01-26-2012 |
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| 20100187595 | NONVOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - Nonvolatile memory devices and related methods of manufacturing the same are provided. A nonvolatile memory device includes a tunneling layer on a substrate, a floating gate on the tunneling layer, an inter-gate dielectric layer structure on the floating gate, and a control gate on the inter-gate dielectric layer structure. The inter-gate dielectric layer structure includes a first silicon oxide layer, a high dielectric layer on the first silicon oxide layer, and a second silicon oxide layer on the high dielectric layer opposite to the first silicon oxide layer The high dielectric layer may include first and second high dielectric layers laminated on each other, and the first high dielectric layer may have a lower density of electron trap sites than the second high dielectric layer and may have a larger energy band gap or conduction band-offset than the second high dielectric layer. | 07-29-2010 |
| 20110095397 | Semiconductor Structures Including Dielectric Layers and Capacitors Including Semiconductor Structures - Semiconductor structures including a first conductive layer; a dielectric layer on the first conductive layer; a second conductive layer on the dielectric layer; and a crystallized seed layer in at least one of a first portion between the first conductive layer and the dielectric layer and a second portion between the dielectric layer and the second conductive layer. Related capacitors and methods are also provided herein. | 04-28-2011 |
| 20110136317 | Semiconductor device, method of fabricating the same, and semicondutor module, electronic circuit board, and electronic system including the device - Example embodiments relate to a semiconductor device including an oxide dielectric layer and a non-oxide dielectric layer, a method of fabricating the device, and a semiconductor module, an electronic circuit board, and an electronic system including the device. The semiconductor device may include a lower electrode, an oxide dielectric layer disposed on the lower electrode, a non-oxide dielectric layer disposed on the oxide dielectric layer, and an upper electrode disposed on the non-oxide dielectric layer. | 06-09-2011 |
| 20110151639 | SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, SEMICONDUCTOR MODULE, ELECTRONIC CIRCUIT BOARD, AND ELECTRONIC SYSTEM INCLUDING THE DEVICE - Provided are a semiconductor device, a method of fabricating the same, and a semiconductor module, an electronic circuit board, and an electronic system including the device. The semiconductor device includes a lower electrode, a rutile state lower vanadium dioxide layer on the lower electrode, a rutile state titanium oxide on the lower vanadium dioxide layer, and an upper electrode on the titanium oxide layer. | 06-23-2011 |
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| 20090273076 | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and elctronic apparatus including the same - Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component. | 11-05-2009 |
| 20100001392 | Semiconductor package - Provided is a semiconductor package including a substrate and a semiconductor chip formed on the substrate. The semiconductor chip may include a chip alignment mark on a surface of the semiconductor chip, and wiring patterns formed on a surface of the substrate, wherein the chip alignment mark is bonded to the wiring patterns. Accordingly, the surface area of the semiconductor chip may be reduced. | 01-07-2010 |
| 20110143625 | TAPE FOR HEAT DISSIPATING MEMBER, CHIP ON FILM TYPE SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATING MEMBER, AND ELECTRONIC APPARATUS INCLUDING THE SAME - Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component. | 06-16-2011 |
| 20120021600 | METHOD OF FABRICATING FILM CIRCUIT SUBSTRATE AND METHOD OF FABRICATING CHIP PACKAGE INCLUDING THE SAME - A method of fabricating a film circuit substrate and a method of fabricating a chip package. The method of fabricating a film circuit substrate can include providing a base film including a chip packaging area to package a chip and a separation area to separate the two chip packaging areas from each other, the separation area including a cut area and an uncut area; forming a reserve interconnection pattern having a first height on the base film; and forming an interconnection pattern having a second height that is lower than the first height on the out area by selectively etching the reserve interconnection pattern of the cut area. | 01-26-2012 |
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| 20080302141 | Drum type washer and door - A drum type washer and a door thereof are provided to eliminate moisture inside a door glass using natural convection. The door of the drum type washer includes a door glass, an inner door having a holder integral to the inner door to support an outer surface of the door glass, an outer door having a support rib integral to the outer door to support an inner surface of the door glass, the support rib including a hole set formed in the support rib such that an inside of the door glass communicates with an exterior of the drum type washer. With this configuration, the moisture created inside the door glass can be rapidly eliminated. | 12-11-2008 |
| 20100071224 | Clothing dryer - A clothing dryer having a cover structure capable of increasing quantity of air generated from a cooling fan. The clothing dryer includes a first cover covering the cooling fan and a second cover connected to the first cover. A cutoff is provided at a connection area between the first cover and the second cover to branch a flow of air and is positioned below a rotational center of the cooling fan. | 03-25-2010 |
| 20100088918 | Clothing dryer - A clothing dryer including a rotating drum, a shelf installed inside the rotating drum, and a support member, which is rotatably installed at a rear end of the shelf such that the shelf is supported by a rear surface of the rotating drum. The rear end of the shelf is installed on a rear surface of the rotating drum through the support member, so that the shelf is more stably installed inside the rotating drum. | 04-15-2010 |
