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Chung-Chiang
Chung-Chiang Chen, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100125754 | METHOD FOR ACCESSING A BIG STRUCTURE IN A 64K OPERATING ENVIRONMENT - A method for accessing a big structure in a 64 k operating environment is disclosed. The method includes changing the big structure into plural sub structures; arranging a big memory space by a power on self test (POST) memory manager; and allocating the sub structures to the big memory space. Wherein a length of each sub structure is shorter than 64k | 05-20-2010 |
| 20100185899 | RAID TESTING METHOD AND TESTING SYSTEM - A RAID testing method and a RAID testing system including a reading unit, an option-ROM, a recording unit and several RAID configuration data are provided. These data are either contained in several binary files or stored in a memory. In the method, first, these data are read by the reading unit under a first mode to simulate connecting to several physical disk drives in a first manner. Then, a global RAID configuration information is generated according to these RAID configuration data. Further, these data are read by the reading unit under a second mode to simulate connecting to these physical disk drives in a second manner. Afterwards the global RAID configuration information is updated by the option-ROM in accordance with the second mode. Moreover, the global RAID configuration information is recorded by the recording unit. | 07-22-2010 |
| 20100250847 | METHOD FOR CONFIGURING RAID - A method for configuring a RAID (Redundant Array of Inexpensive Disks) includes the following steps. When a RAID instruction to access the RAID array is received, it is determined whether a removed hard drive unconnected to the RAID array is present in a hard drive list of the RAID array; when the removed hard drive unconnected to the RAID array is present in the hard drive list, the hard drive list of the RAID array is amended; it is detected whether a new hard drive connected to the RAID array is absent in the hard drive list; when the new hard drive connected to the RAID array is absent in the hard drive list, the hard drive list is amended; and the RAID instruction is executed to access the RAID array according to the hard drive list. | 09-30-2010 |
Chung-Chiang Chen, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110130227 | PALM PAD DEVICE FOR BASKETBALL TRAINING AND BASKETBALL TRAINING SYSTEM - A palm pad device, for use as a training device and to be fastened to the palm of a user, includes a segregate pad having a size-adjustable elastic pad and a fastening member for fastening the segregate pad onto the palm. The palm pad device further includes a sensing recorder disposed on the fastening member for sensing and recording movement data of the palm. The elastic pad includes a thickness pad and a width pad for allowing adjustments in the thickness and width of the segregate pad. A basketball training system using the palm pad device includes a basket sensor for recording the status of successful shots, a sensing recorder disposed on the palm pad device, and a central management apparatus for receiving data transmitted from the sensing recorder and the basket sensor for conducting analysis to thereby generate a corresponding feedback event. | 06-02-2011 |
Chung-Chiang Min, Banqiao City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100233881 | METHOD OF MANUFACTURING SUPPORTING STRUCTURES FOR STACK CAPACITOR IN SEMICONDUCTOR DEVICE - A method of manufacturing a supporting structure for a stack capacitor in a semiconductor device is provided. The method includes the following steps. The first step is providing a multi-layer structure including an etching stop layer, a silicon oxide layer and a silicon nitride layer. The second step is etching the silicon nitride layer and the silicon oxide layer to form a plurality of filling recesses in the silicon oxide layer, in which each the filling recess has a lateral surface and a bottom surface. The third step is forming a protecting layer at each the lateral surface. The fourth step is etching the silicon oxide layer to expose the etching stop layer. The fifth step is removing the protecting layer on the each lateral surface, thereby forming the supporting structure. | 09-16-2010 |
Chung-Chiang Min, Taipei County TW
| Patent application number | Description | Published |
|---|---|---|
| 20090001050 | Method for forming a deep trench - A method for forming a deep trench includes providing a substrate with a bottom layer and a top layer; performing a first etching process to etch the top layer, the bottom layer and the substrate so as to form a recess; selectively depositing a liner covering the top layer, the bottom layer and part of the substrate in the recess; using the liner as an etching mask to perform a second dry etching to etch the recess unmasked by the liner so as to form a deep trench; performing a selective wet etching to remove the top layer; and performing a post wet etching to enlarge the deep trench. | 01-01-2009 |