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Chung, CA

Alan Chung, San Francisco, CA US

Patent application number	Description	Published
20090182788	APPARATUS AND METHOD FOR CUSTOMIZED EMAIL AND DATA MANAGEMENT - An apparatus and method for customized email and data management is disclosed. According to one embodiment, a collaborative page is created to contain an email module configured to access one or more email accounts. Emails from the one or more email accounts are selected using an email selection criterion. The selected emails are processed to parse data based on a parsing rule. The emails and the parsed data are displayed on the collaborative page. The collaborative page is updated with new emails and the updated content.	07-16-2009
20120030295	E-MAIL INTEGRATED INSTANT MESSAGING - A system and method supporting instant messaging which removes many of the problems and harriers to the use of instant messaging through the use of universally unique identifiers to web pages for instant messaging sessions, with recipients invited to the instant messaging session via email.	02-02-2012

Alex Chung, San Francisco, CA US

Patent application number	Description	Published
20110258659	System and Method for Construction, Delivery and Display of iTV Content - iTV content is created and deployed using a server component adapted to allow content developers to create applications according to an authoring specification that describes a framework for same; a transport component configured to optimize and deliver the applications to one or more clients; and a client component adapted to render the applications through a television so as to permit user interaction therewith. The authoring specification provides for the presentation of content through one or more templates defined therein, allowing application definition and behavior to remain common across multiple client device types, middleware platforms, and/or iTV operating environments. The framework for applications accommodates advertising, promotions, content placement packages and/or programming campaign definitions, so as to permit a selection of a specific advertisement, promotion or content at a time of preparation of the iTV content by the server, and/or a time of execution of the applications by the client.	10-20-2011

Alfred Chung, Freemont, CA US

Patent application number	Description	Published
20100313894	SELF-SIZING ADJUSTABLE ENDOTRACHEAL TUBE - There is disclosed an endotracheal tube which has a minimal cross-sectional profile for easy viewing of anatomical features during intubation. After the tube is placed into the trachea, the tube is adapted to increase the diameter. In this manner the tube diameter may be expanded to allow for decreased Work of Breathing (WOB) for patient, while not having so large a diameter as to cause tracheal discomfort.	12-16-2010
20100313895	SELF-SIZING ADJUSTABLE ENDOTRACHEAL TUBE - There is disclosed an endotracheal tube which has a minimal cross-sectional profile for easy viewing of anatomical features during intubation. After the tube is placed into the trachea, the tube is adapted to increase the diameter. In this manner the tube diameter may be expanded to allow for decreased Work of Breathing (WOB) for patient, while not having so large a diameter as to cause tracheal discomfort.	12-16-2010

Benjamin Chung, Los Altos, CA US

Patent application number	Description	Published
20110218485	Insertion Indicator for Needle - A method and apparatus are provided for a fluid level insertion indicator that provides immediate feedback to a surgeon by draining when a tip of a needle has entered a body lumen, such as peritoneal cavity. An apparatus includes a handle connected to a hollow needle and a hollow stylet that extends through the hollow needle and has a blunt distal end that includes an opening for passing fluid. A spring biases the stylet to extend past the sharp distal end of the needle absent resistance by tissue against the stylet. An at least partially translucent pressure chamber configured to hold a quantity of fluid under pressure is connected to the proximal end of the stylet. The pressure chamber and stylet form a conduit for passing fluid through the opening in the blunt distal end when the stylet extends past the sharp distal end of the hollow needle.	09-08-2011

Brian Chung, Mission Viejo, CA US

Patent application number	Description	Published
20100071561	MOBILE NITROGEN GENERATION DEVICE - A mobile inert gas generator can include various components supported by a wheeled vehicle. The generator can include a feed air compressor, a separation device for separating an inert gas from a feed air gas, and a booster compressor, each of which can have various sensors and actuators for controlling the operation thereof. An electronic control system can be connected to the sensors and actuators to allow for convenient operation of the generator. The electronic control system can include a control panel disposed in a cab.	03-25-2010

Brian Chung, La Habra, CA US

Patent application number	Description	Published
20120046533	COMBINED SENSOR AND INFUSION SETS - Embodiments of the invention provide a dual insertion set for supplying a fluid to the body of a patient and for monitoring a body characteristic of the patient. Typical embodiments of the invention include a base, an infusion portion coupled to a first piercing member and a sensor portion coupled to a second piercing member. The infusion portion includes a cannula coupled to the piercing member for supplying a fluid to a placement site. The sensor portion includes a sensor coupled to and extending from the base having at least one sensor electrode formed on a substrate and is coupled to the piercing member in a manner that allows the sensor to be inserted at the placement site. The base is arranged to secure the dual insertion set to the skin of a patient. Typically the infusion portion and sensor portion piercing members are arranged such that when they are operatively coupled to the base, they are disposed in a spatial orientation designed to inhibit sensor interference that may be caused by compounds present in fluids infused through the cannula.	02-23-2012

Chang Uk Chung, Mountain House, CA US

Patent application number	Description	Published
20110087604	MICRO-BLOGGING FOR ENTERPRISE RESOURCES PLANNING (ERP) - The present invention is directed to methods and systems for implementing enterprise application-based micro-blogging. The method includes receiving a micro-blog registration for an enterprise application for at least one user, verifying the role and access level of the user, and based on the registration, the role, and access level, receiving setting information from the at least one user to configure following of at least one object associated with the enterprise application. The method further includes recording an event to the micro-blog for the at least one object, determining that the at least one user is configured to follow the at least one object, and in response to following the at least one object, receiving a notification that at least one update to the at least one object has occurred. Further, the method includes displaying, in real-time, within the enterprise application-based micro-blog the at least one update to the at least one object to the at least one user.	04-14-2011

Cheol Keun Chung, Montrose, CA US

Patent application number	Description	Published
20110124868	RUTHENIUM OLEFIN METATHESIS CATALYSTS BEARING N-HETEROCYCLIC CARBENE LIGANDS WITH SUBSTITUTED BACKBONE - This invention relates generally to olefin metathesis, more particularly, to tri- or tetra-substituted imidazolinium salts which are precursors to N-heterocyclic carbene (NHC) ligands with tri- or tetra-substituted imidazolinium rings, organometallic ruthenium complexes comprising gem di-substituted imidazolinium NHC ligands, organometallic ruthenium complexes comprising tri- or tetra-substituted imidazolinium NHC ligands, and to olefin metathesis methods using them. The catalysts and methods of the invention have utility in the fields of catalysis, organic synthesis, and industrial chemistry.	05-26-2011

Chingyel Chung, Hayward, CA US

Patent application number	Description	Published
20120029684	METHOD AND APPARATUS OF AUTOMATED OPTICAL CONTAINER CODE RECOGNITION WITH POSITIONAL IDENTIFICATION FOR A TRANSFER CONTAINER CRANE - A method and system providing a transfer container crane with container code recognition of a container identified by a container code to a container inventory management system is disclosed. The system and method are capable of performing these tasks without the use of non-standard container tagging.	02-02-2012

Christina Yip Chung, Mountain View, CA US

Patent application number	Description	Published
20110161331	Incremental Update Of Long-Term And Short-Term User Profile Scores In A Behavioral Targeting System - A behavioral targeting system determines user profiles from online activity. The system includes a plurality of models that define parameters for determining a user profile score. Event information, which comprises on-line activity of the user, is received at an entity. To generate a user profile score, a model is selected. The model comprises recency, intensity and frequency dimension parameters. The behavioral targeting system generates a user profile score for a target objective, such as brand advertising or direct response advertising. The parameters from the model are applied to generate the user profile score in a category. The behavioral targeting system has application for use in ad serving to on-line users.	06-30-2011

Chris Yoochang Chung, Sunnyvale, CA US

Patent application number	Description	Published
20090310685	HIGH-YIELD MULTI-THREADING METHOD AND APPARATUS FOR VIDEO ENCODERS/TRANSCODERS/DECODERS WITH DYNAMIC VIDEO REORDERING AND MULTI-LEVEL VIDEO CODING DEPENDENCY MANAGEMENT - Disclosed is an exemplary video coder and video coding method according to an embodiment of the present invention. The exemplary video coder includes a scheduler, a plurality of processors and a multiplexer. The scheduler can examine processing units in an input buffer to determine an order for the processing unit to be coded by a processor. If the processing unit under examination depends on a processing unit not yet processed, the processing unit under examination can be merged with other processing units, if any, that share a similar dependency. If the processing unit under examination does not depend on any processing units not yet processed, it can be sent to a next available processor for coding. When a processing unit is sent to a processor, any merged processing units that depend on sent processing unit can also be sent to a next available processor.	12-17-2009
20100309985	VIDEO PROCESSING FOR MASKING CODING ARTIFACTS USING DYNAMIC NOISE MAPS - A video decoder system includes a video decoding engine, noise database, artifact estimator and post-processing unit. The video coder may generate recovered video from a data stream of coded video data, which may have visually-perceptible artifacts introduced as a byproduct of compression. The noise database may store a plurality of previously developed noise patches. The artifact estimator may estimate the location of coding artifacts present in the recovered video and select noise patches from the database to mask the artifacts and the post-processing unit may integrate the selected noise patches into the recovered video. In this manner, the video decoder may generate post-processed noise which may mask artifacts that otherwise would be generated by a video coding process.	12-09-2010
20110090303	Facial Pose Improvement with Perspective Distortion Correction - Methods, systems, and apparatus are presented for reducing distortion in an image, such as a video image. A video image can be captured by an image capture device, e.g. during a video conferencing session. Distortion correction processing, such as the application of one or more warping techniques, can be applied to the captured image to produce a distortion corrected image, which can be transmitted to one or more participants. The warping techniques can be performed in accordance with one or more warp parameters specifying a transformation of the captured image. Further, the warp parameters can be generated in accordance with an orientation of the image capture device, which can be determined based on sensor data or can be a fixed value. Additionally or alternatively, the warp parameters can be determined in accordance with a reference image or model to which the captured image should be warped.	04-21-2011

Chris Yoochang Chung, Cupertino, CA US

Patent application number	Description	Published
20090049287	Stall-Free Pipelined Cache for Statically Scheduled and Dispatched Execution - This invention provides flexible load latency to pipeline cache misses. A memory controller selects the output of one of a set of cascades inserted execute stages. This selection may be controlled by a latency field in a load instruction or by a latency specification of a prior instruction. This invention is useful in the great majority of cases where the code can tolerate incremental increases in load latency for a reduction in cache miss penalty.	02-19-2009

Daniel Chung, San Ramon, CA US

Patent application number	Description	Published
20110276321	DEVICE SPECIFIC CONFIGURATION OF OPERATING VOLTAGE - A method and circuit for device specific configuration of an operating voltage is provided. A circuit design is analyzed to determine a maximum gate-level delay for the circuit design. A minimum voltage value corresponding to the maximum gate-level delay is determined along with a default voltage value corresponding to a default gate-level delay. A voltage scaling factor corresponding to the minimum voltage and default voltage values is determined. The circuit design is synthesized such that the synthesized design includes the voltage scaling value. The synthesized design specifies setting an operating voltage to a value of a startup voltage value scaled by the voltage scaling value.	11-10-2011

Daniel Ji Young Park Chung, San Jose, CA US

Patent application number	Description	Published
20120099443	PATH DIAGNOSIS IN COMMUNICATION NETWORKS - One embodiment of the present invention provides a system for mapping all possible paths between a source node and a destination node. During operation, the system receives a management frame, determines all possible next-hop nodes based on a destination address carried in the payload of the management frame. The system then selects one of the next-hop nodes, and modifies payload of the received management frame to include information associated with the next-hop nodes and the selected next-hop node. The system then forwards the modified data frame to the selected next-hop node.	04-26-2012

David Chung, Santa Clara, CA US

Patent application number	Description	Published
20110137727	SYSTEMS AND METHODS FOR DETERMINING PROXIMITY OF MEDIA OBJECTS IN A 3D MEDIA ENVIRONMENT - Systems and methods for determining proximity of objects in a three-dimensional (3D) media guidance application are provided. A first rank may be associated with a first media object. A second rank lower than the first rank may be associated with a second media object. The first and second media objects may appear at respective first and second distances in 3D space when viewed using a stereoscopic optical device. The first and second distances may correspond respectively to the first and second ranks of the first and second media objects. The first and second ranks may be automatically associated with the first and second media objects using predetermined or viewer-defined criteria. A viewer may input ranking criteria using a user input device having an accelerometer.	06-09-2011
20110164175	SYSTEMS AND METHODS FOR PROVIDING SUBTITLES ON A WIRELESS COMMUNICATIONS DEVICE - A wireless communications device provides users with opportunities to access interactive media guidance or other applications and to control user equipment and interactive media guidance applications. In an exemplary embodiment, users can play a program with subtitles in one language on user equipment while simultaneously playing the same program with subtitles in another language on the wireless communications device.	07-07-2011
20120105720	SYSTEMS AND METHODS FOR PROVIDING SUBTITLES ON A WIRELESS COMMUNICATIONS DEVICE - A wireless communications device provides users with opportunities to access interactive media guidance or other applications and to control user equipment and interactive media guidance applications. In an exemplary embodiment, users can play a program with subtitles in one language on user equipment while simultaneously playing the same program with subtitles in another language on the wireless communications device.	05-03-2012
20120114303	SYSTEMS AND METHODS FOR PROVIDING SUBTITLES ON A WIRELESS COMMUNICATIONS DEVICE - A wireless communications device provides users with opportunities to access interactive media guidance or other applications and to control user equipment and interactive media guidance applications. In an exemplary embodiment, users can play a program with subtitles in one language on user equipment while simultaneously playing the same program with subtitles in another language on the wireless communications device.	05-10-2012

David Chung, Irvine, CA US

Patent application number	Description	Published
20100046601	HIGH SPEED RECEIVE EQUALIZER ARCHITECTURE - Various example embodiments are disclosed. According to an example embodiment, an apparatus may include a continuous time filter, a decision feedback equalizer, a clock and data recovery circuit, and an adaptation circuit. The adaptation circuit may be configured to adapt equalization according to at least one dithering algorithm by adjusting a delay adjust signal based on a mean square error of equalized data signals.	02-25-2010

David B. Chung, Cupertino, CA US

Patent application number	Description	Published
20100014038	Black and White Color Cholesteric Liquid Crystal Display - A cholesteric display may be formed, in some embodiments, using a single display element to produce multi-colors for display. A cholesteric material may be sandwiched between a pair of substrates, each associated with pairs of opposed electrodes that are arranged in general transversely to the optical axis of incident light. The first pair of electrodes produce one of two liquid crystal states and result in the reflection of light of a particular wavelength. Light of other wavelengths may be reflected when a second pair (or set) of opposed electrodes, arranged in general transversely, also to the optical axis of incident light, are biased appropriately. So does a third pair (or set) of electrodes. A black and white color display may be generated from a single display element by modulating the pitch length of the cholesteric material within each pairs (or sets).	01-21-2010

David Ho Suk Chung, Rancho Palos Verdes, CA US

Patent application number	Description	Published
20100272119	SYSTEM AND METHOD FOR FILTERING A DATA PACKET USING A COMBINED FILTER - System and method for filtering a data packet using a combined filter are disclosed. In one aspect, the method includes receiving a data packet and N filters. The method includes receiving a data packet and N (wherein N is an integer and N>1) filters, each filter comprising a bit mask and corresponding bit values. The method further includes, for each of the N filters, identifying a key element from a portion of the filter corresponding to a combined filter, the key element being a segment of the filter portion having the. richest bit pattern. The method further includes generating the combined filter by combining the key element of the N filters. The method further includes filtering the data packet with the combined filter to determine whether there is a match between the data packet and each key element.	10-28-2010
20100272120	SYSTEM AND METHOD FOR FILTERING A DATA PACKET USING A COMMON FILTER - System and method for filtering a data packet using a combined filter are disclosed. In one aspect, the method includes receiving a data packet and N filters each comprising a mask and value. The method includes receiving a data packet and N (wherein N is an integer and N>1) filters, each filter comprising a bit mask and corresponding bit values. The method further includes generating a common filter mask and the corresponding bit values by taking the overlapping mask bits among portions of the N filters corresponding to the common filter, the common filter being of a length smaller than each filter. The method further includes applying the common filter mask to the data packet to determine whether there is a match between the filtered data packet and each of the N filters.	10-28-2010

David Kyong-Sik Chung, Irvine, CA US

Patent application number	Description	Published
20110044384	DECISION FEEDBACK EQUALIZER CIRCUIT - An equalization circuit adjusts (e.g., equalizes) an input signal according to the value of one or more adjustment signals (e.g., equalization coefficients) without a multiplication operation. For example, the circuit may add or subtract a value of a coefficient signal to the amplitude of an input signal. Here, whether the coefficient is added or subtracted may depend on the sign of a control signal.	02-24-2011

De Michael Chung, Rowland Heights, CA US

Patent application number	Description	Published
20100081643	NOVEL CYCLIC BENZIMIDAZOLE DERIVATIVES USEFUL AS ANTI-DIABETIC AGENTS - Novel compounds of the structural formula (I) are activators of AMP-protein kinase and are useful in the treatment, prevention and suppression of diseases mediated by the AMPK-activated protein kinase. The compounds of the present invention are useful in the treatment of Type 2 diabetes, hyperglycemia, metabolic syndrome, obesity, hypercholesterolemia, and hypertension.	04-01-2010
20110195964	NOVEL CYCLIC BENZIMIDAZOLE DERIVATIVES USEFUL AS ANTI-DIABETIC AGENTS - Novel compounds of the structural formula (I) are activators of AMP-protein kinase and are useful in the treatment, prevention and suppression of diseases mediated by the AMPK-activated protein kinase. The compounds of the present invention are useful in the treatment of Type 2 diabetes, hyperglycemia, metabolic syndrome, obesity, hypercholesterolemia, and hypertension.	08-11-2011
20110218174	NOVEL CYCLIC BENZIMIDAZOLE DERIVATIVES USEFUL AS ANTI-DIABETIC AGENTS - Novel compounds of the structural formula (I) are activators of AMP-protein kinase and are useful in the treatment, prevention and suppression of diseases mediated by the AMPK-activated protein kinase. The compounds of the present invention are useful in the treatment of Type 2 diabetes, hyperglycemia, metabolic syndrome, obesity, hypercholesterolemia, and hypertension.	09-08-2011
20110263533	NOVEL CYCLIC BENZIMIDAZOLE DERIVATIVES USEFUL AS ANTI-DIABETIC AGENTS - Novel compounds of the structural formula (I) are activators of AMP-protein kinase and are useful in the treatment, prevention and suppression of diseases mediated by the AMPK-activated protein kinase. The compounds of the present invention are useful in the treatment of Type 2 diabetes, hyperglycemia, Metabolic Syndrome, obesity, hypercholesterolemia, and hypertension.	10-27-2011

Do H. Chung, San Ramon, CA US

Patent application number	Description	Published
20110145848	DISTRIBUTED CONTRIBUTION OF DISPARATE INTERACTIVE ELEMENTS - Mechanisms are provided for collecting user response information corresponding to a request transmitted as a part of unidirectional media broadcast. Mobile devices used to display media broadcast containing the request, such a survey, are also configured to send information using other communication networks, such as cellular networks. Mobile devices collect users' responses to the request and send information corresponding to these responses to a response processing server. The response processing server in turn processes the information, generate a report, and transmit this report to the broadcasting service. These reports may be used for a variety of purposes. In one example, reports are used to update broadcasted content such that mobile device user can view results of their responses as a part of the updated broadcast.	06-16-2011
20110161813	DATA MEASUREMENT AND FEEDBACK MECHANISM USING AN APPLICATION FRAMEWORK - Techniques and apparatuses are provided for conditioning media content based on user input. In one implementation, a barker screen is displayed on an output interface of the user device when a request to switch media channels is received. The barker screen may include a request for user input and at least partially block the output interface. As such, the content of the new channel may be at least partially unavailable until user input is received. Furthermore, techniques and apparatuses are provided for transmitting a request for user input to the user device switched to a unidirectional broadcast channel. Information contained in responses generated based on user inputs is then used to adjust media content.	06-30-2011
20110231878	TILE BASED MEDIA CONTENT SELECTION - Mechanisms are provided for allowing a user to dynamically manage rich media content in an efficient and effective manner. Tiles including media content, personalized video selections, content pack upgrades, and promotions for featured content are presented to a user. Each tile may include calls to view, purchase, discuss, rate, review, or read about associated content. Tiles may be presented as still images, logos, text, or live video. Multiple tiles may be manipulated using keyboard, mouse, touchpad, and/or touchscreen movements, motions, and gestures. In particular examples, an overlay provided on top of a tile mechanism provides a user with additional navigation and management options.	09-22-2011

Estella C. Chung, West Hills, CA US

Patent application number	Description	Published
20090001966	MOTOR SYSTEM EMPLOYING ANALOG ENCODED HALL EFFECT SENSOR POSITION INFORMATION FOR REDUCED WIRING - A system has a sensor assembly mounted adjacent to a moving magnetic member such as a motor rotor to sense its position. The sensor assembly includes Hall-effect sensors each having a binary output, configured such that distinct positions of the moving magnetic member correspond to distinct digital patterns of the outputs of the Hall-effect sensors. Encoding circuitry is coupled to the outputs of the Hall-effect sensors to generate a multi-valued analog output, distinct values of the multi-valued analog output representing corresponding distinct digital patterns of the outputs of the Hall-effect sensors. The encoding circuitry may employ a ladder network with weighted-value resistors contributing different components of an analog current sensed by the controller. The sensed current can be converted to digital position information using suitable analog-to-digital conversion circuitry. The multi-valued analog output can be conveyed on a single wire in contrast to the prior art which requires one wire per Hall-effect sensor.	01-01-2009
20090066274	MOTOR CONTROLLER WITH HALL SENSOR MISALIGNMENT COMPENSATION - A technique can recover from motor stalls caused by misalignment of motor position sensors such as Hall-effect sensors. In a normal operating mode, a motor controller provides motor drive current to the motor windings based on the sensor signals according to a normal commutation sequence, and monitors for occurrence of a motor stall condition. Upon detecting the motor stall condition, the motor controller first momentarily drives the windings according to one of an advanced commutation state and a delayed commutation state each adjacent to the given commutation state in the normal commutation sequence, and determines whether the motor stall condition persists. If the stall condition persists, then the motor controller next momentarily drives the windings according to the other of the advanced commutation state and the delayed commutation state. By this action, the controller attempts operation at both preceding and succeeding portions of the torque characteristic, such that operation with increased torque is ensured even though the direction of the sensor misalignment is unknown.	03-12-2009
20100259274	Testing an inductive load of a device using a modulated signal - A device has built-in inductive load testing capabilities. The device includes a device housing, an inductive load disposed within the device housing; and test circuitry disposed within the device housing. The test circuitry is constructed and arranged to effectuate application of a modulated test signal to the inductive load, and obtain a result signal in response to the application of the modulated test signal to the inductive load. The test circuitry is further constructed and arranged to generate an output signal indicating that the inductive load is in one of (i) a shorted inductive load state, (ii) a normal inductive load state, and (iii) an abnormally high inductive load state, based on the result signal. Such test circuitry is well-suited for testing a variety of devices having inductors/coils which are susceptible to defects (e.g., a solenoid, a motor winding, various actuator components, etc.).	10-14-2010

Ho Suk Chung, Rancho Palos Verdes, CA US

Patent application number	Description	Published
20110010747	METHOD AND SYSTEM FOR CUSTOMIZED INITIALIZATION OF DIGITAL HOST DEVICE - A method and system for customizing an interactive cable host initialization process for a cable host device, is provided. One implementation involves triggering an interactive cable host initialization process for a cable host device, detecting a initialization stage event for the cable host device and providing initialization stage event notification, and dynamically receiving content determined by a Multiple Service Operator (MSO) cable headend based on the initialization stage event notification over a network.	01-13-2011

Jack Vinh Chung, San Leandro, CA US

Patent application number	Description	Published
20090094218	Method and system for improving performance of counting hits in a search - One embodiment of the present invention includes a method for automatically enabling a search system or application to quickly and accurately count hits corresponding to a search expression. For example, a search expression is received or retrieved that may include redundant and/or overlapping search expression components. Each narrow search expression component is removed from the search expression if joined by an “OR” operator to a broader or equivalent search expression component. Additionally, each broad search expression component is removed from the search expression if joined by an “AND” operator to a narrower or equivalent search expression component. By modifying the received search expression in this fashion, a performance gain is typically achieved for calculating the hit count while maintaining its accuracy.	04-09-2009

Jimmy Young Jae Chung, Lakewood, CA US

Patent application number	Description	Published
20120157795	Patient Emergency Response System - An improved emergency response system is provided. The system includes a patient or subscriber location database having a schedule of patient or subscriber activities. In one implementation, an emergency services server detects when the patient or subscriber is having a possible medical event as indicated by medical physiologic data transmitted from a wireless communication device proximate the patient. A third party such as a technologist and/or doctor diagnoses the patient and determines whether treatment is required. If treatment is required, a phone located remotely from the patient is used to call an emergency services first responder from a public safety access point in the patient's location. The remotely located phone has an automatic location identification database record that is updated based on the patient's current location as indicate by the patient location database. The address information in the patient location database includes street number, building number, floor and room number information, if applicable, to ensure that first responders are directed to the patient's specific location. Other implementations of the emergency response system are also described, including natural disasters, home security, and travel applications.	06-21-2012

Jinwook Chung, Los Angeles, CA US

Patent application number	Description	Published
20120012894	PERFORMANCE OF NITRIDE SEMICONDUCTOR DEVICES - A method of forming a transistor over a nitride semiconductor layer includes surface-treating a first region of a nitride semiconductor layer and forming a gate over the first region. Surface-treating the first region can cause the transistor to have a higher intrinsic small signal transconductance than a similar transistor formed without the surface treatment. A portion of the bottom of the gate can be selectively etched. A resulting transistor can include a nitride semiconductor layer having a surface-treated region and a gate formed over or adjacent to the surface-treated region.	01-19-2012

John Chung, Santa Clara, CA US

Patent application number	Description	Published
20090038420	Rack System and a Method for Processing Manufactured Products - A rack system and method are provided for processing manufactured products prior to shipment. To simulate reality, the design of such rack system and method contemplates replicating field conditions for use of the manufactured products. A rack system for processing units of manufactured products may comprise one or more plates coupled to a frame. A preferred approach includes designing the rack for use by an operator without specialized skills. This approach includes verifying that there is a match between the configuration of the unit mounted on the plate and the operating mode of the plate before processing can commence. The rack may include a detector for obtaining data from the plate and unit and a processor for comparing the obtained data to determine whether there is a match. A rack system designed using this approach can be useful in processing outdoor units of a split-mount system such as a microwave radio system.	02-12-2009

Keicy Chung, Torrance, CA US

Patent application number	Description	Published
20090106480	COMPUTER STORAGE DEVICE HAVING SEPARATE READ-ONLY SPACE AND READ-WRITE SPACE, REMOVABLE MEDIA COMPONENT, SYSTEM MANAGEMENT INTERFACE, AND NETWORK INTERFACE - A storage device for use with a computer is disclosed. The storage device includes a processor communicably connected to a computer through a computer interface and a system interface. The computer interface enables communications exclusively between the processor and the computer, while the system interface enables to processor to manage one or more hardware components of the computer. A network interface is also included to enable the processor to communicate over a network with select file servers to the exclusion of other file servers. A storage means is communicably connected to the processor and includes first and second designated storage sections. The processor has read-write access to both storage sections, while the computer has read-only access to the first storage section and read-write access to the second storage section. A removable media storage component is also communicably connected to the processor.	04-23-2009
20100223452	CENTRAL PROCESSING UNIT CAPABLE OF MULTI-BOOT USING DESJOINT MEMORY SPACES - A central processing unit capable of multi-boot using disjoint memory spaces. The central processing unit comprises a plurality of internal registers communicably coupled to each of a plurality of disjoint memory spaces. The internal registers may be configured to designate one or more of the memory spaces as an active memory space or a standby memory space.	09-02-2010
20110276799	PERSONAL COMMUNICATION SYSTEM HAVING INDEPENDENT SECURITY COMPONENT - A personal communication system (PCS) incorporates a secure storage device, which includes a device processor, a CPU interface, and a system interface, a storage means and a removable storage media component. The device processor is communicably connected to the CPU of the PCS through the CPU interface, which exclusively enables communications between the device processor and the CPU. The system interface enables the device processor to manage one or more hardware components of the PCS. A network interface is also included to enable the device processor to communicate over a network with select file servers to the exclusion of other file servers. The storage means is communicably connected to the device processor and includes first and second designated storage sections. The device processor has read-write access to both storage sections and gives the CPU read-only access to the first storage section and read-write access to the second storage section.	11-10-2011

Keicy K. Chung, Torrance, CA US

Patent application number	Description	Published
20080294753	READ-ONLY STORAGE DEVICE HAVING NETWORK INTERFACE, A SYSTEM INCLUDING THE DEVICE, AND A METHOD OF DISTRIBUTING FILES OVER A NETWORK - A Read-only storage device having network interface, a system including the device, and a method of distributing files over a network. The storage device comprises a processor communicably connected to a computer interface, a network interface, and a storage means. The processor communicates with a computer and a file server through the computer interface and the network interface, respectively. The computer may request a file from the processor and the processor responds by either (1) providing the requested file to the computer on a read-only basis if the file is cached on the storage means, (2) obtains the file from the file server if the file is available from the file server, caches the obtained file on the storage means, and provides the obtained file to the computer on a read-only basis, or (3) returns a file unavailable notice to the computer.	11-27-2008

Ki S. Chung, Sunnyvale, CA US

Patent application number	Description	Published
20120125884	METHOD FOR MANUFACTURING A NARROW MAGNETIC READ WIDTH CURRENT PERPENDICULAR TO PLANE MAGNETORESISTIVE SENSOR - A method for manufacturing a magnetic read head having a very narrow track width. The method includes the use of a non-Si containing photoresist to form a mask prior to ion milling to define the track-width of the sensor. Previously only Si-containing resists were used. The Si in the resist turned to an oxide, which allowed the photoresist to withstand the reactive ion etching used for image transfer to an underlying hard mask. The Si-containing resist, however, has limitations as to how small the mask can be made. It has been found that a non-Si-containing resist provides better resolution at very narrow track-width definition, and also provides good temperature resistance. Some modifications to the process allow the non-Si-containing resist to be used in the construction of the magnetic read sensor.	05-24-2012

Kyong-Soo Chung, Sacramento, CA US

Patent application number	Description	Published
20090218187	Tilted Push-Pull Wheeled Luggage with a Removable Front Swingable Wheel with an Elongated Neck for the Removable Front Swingable Wheel - A wheeled luggage is configured to be pushed or pulled using a handle attached to the wheeled luggage. The wheeled luggage has a main luggage body with a plurality of fixed wheels and one or more swingable wheels in front of the plurality of fixed wheels. In one or more embodiments of the invention, one or more swingable wheels in front of the plurality of fixed wheels are easily removable and re-attachable by a user. Furthermore, each swingable wheel has an elongated neck attached or attachable on-demand to a lower front portion of the main luggage body, which creates a higher ground clearance (i.e. backward tilt) in the lower front portion of the wheeled luggage relative to a lower rear portion of the wheeled luggage. This backward tilt enables a user to push the wheeled luggage ergonomically by applying a “pushing” force to the handle.	09-03-2009

Kyong-Soo Chung, Elk Grove, CA US

Patent application number	Description	Published
20080308370	Push-pull wheeled luggage with swingable rear wheels and at least one fixed front wheel - A wheeled luggage is configured to be pushed or pulled using a handle attached to the wheeled luggage. This “push-pull” wheeled luggage has a main luggage body with one or more swingable rear wheels at a rear edge of a lower portion of the main luggage body and one or more fixed front wheels in front of the one or more swingable rear wheels. Each front wheel has an elongated neck attached to a front lower portion of the main luggage body, which creates a backward tilt due to a higher ground clearance in the front lower portion. Each swingable rear wheel is configured to receive a directional force to steer the push-pull wheeled luggage. The backward tilt created by the elongated neck attached to the front lower portion of the main luggage body enables a user to push the push-pull wheeled luggage ergonomically by applying a forward-downward force to the handle.	12-18-2008

Leland W.k. Chung, Los Angeles, CA US

Patent application number	Description	Published
20100144678	COMPOSITIONS AND METHODS FOR TREATING BONE CANCER - Small molecule bradykinin inhibitor bisphosphonate amide derivatives useful for inhibiting cancer growth and treating cancer residing in and around bone are disclosed. These compounds and pharmaceutical compositions containing these compounds are particularly useful for the treatment of prostate cancer bone metastases.	06-10-2010

Leland W.k. Chung, Beverly Hills, CA US

Patent application number	Description	Published
20110085974	SMALL MOLECULE LIGAND-DRUG CONJUGATES FOR TARGETED CANCER THERAPY - The present invention describes small molecule ligand-drug conjugates and methods of using the small molecule ligand-drug conjugates for targeted treatment of cancer in a patient in need thereof. Further described are methods of sterilizing circulating tumor cells and determining drug concentration in cancer tissue.	04-14-2011
20110142848	ANTI-BETA-2-MICROGLOBULIN AGENTS AND THE USE THEREOF - A method for treating cancer includes treating a subject with an agent against beta-2-microglobulin; and treating the subject with radiation or a cancer therapeutic agent. The agent against beta-2-microglobulin includes anti-b2-M antibodies and miRNAs.	06-16-2011

Leland W. K. Chung, Beverly Hills, CA US

Patent application number	Description	Published
20110262354	CYANINE-CONTAINING COMPOUNDS FOR CANCER IMAGING AND TREATMENT - This invention relates generally to cyanine-containing compounds; pharmaceutical compositions comprising cyanine-containing compounds; and methods of using cyanine-containing compounds for cancer cell imaging, cancer cell growth inhibition, and detecting cancer cells, for example. Compounds of the invention are preferentially taken up by cancer cells as compared to normal cells. This allows many uses in the cancer treatment, diagnosis, tracking and imaging fields.	10-27-2011

Leonard Chi Chiu Chung, San Francisco, CA US

Patent application number	Description	Published
20080319731	SYSTEM AND METHOD FOR MANAGING THE PERFORMANCE OF A COMPUTER SYSTEM BASED ON OPERATIONAL CHARACTERISTICS OF THE SYSTEM COMPONENTS - A performance manager and method for managing the performance of a computer system based on a system model that includes measured entities representing the operational characteristics of the system components and relationships among the measured entities. The performance manager includes data producers for interacting with the interface agents of the components, an engine for exchanging information with the data producers and the system model, and an interaction model for determining relevant measured entities in the system model. The system model and interaction model are maintained in a repository where data might be accessed via an access interface. Incoming performance data is analyzed by an analyzer in the background to detect trends and relationships among the entities. An operator might review the relevant entities and apply controls to selected entities to manage the overall system performance as well as to resolve problems affecting the performance of the components in the system.	12-25-2008

Lorinda Chung, Stanford, CA US

Patent application number	Description	Published
20100204058	Profiling for Determination of Response to Treatment for Inflammatory Disease - The present invention relates to compositions and methods for treating, characterizing, and diagnosing autoimmune diseases or other inflammatory diseases. In particular, the present invention provides gene expression profiles as well as novel TKI Responsive Signature(s) useful for the diagnosis, characterization, prognosis and treatment of autoimmune disease or other inflammatory diseases.	08-12-2010

Patrick Chung, Tracy, CA US

Patent application number	Description	Published
20080308526	Minimization of mask undercut on deep silicon etch - A method for forming features in a silicon layer is provided. A mask is formed with a plurality of mask openings over the silicon layer. A polymer layer is deposited over the mask by flowing a hydrogen free deposition gas comprising C	12-18-2008

Patrick Chung, Fremont, CA US

Patent application number	Description	Published
20120094502	METHODS FOR DEPOSITING BEVEL PROTECTIVE FILM - A method of film deposition using localized plasma to protect bevel edge of a wafer in a plasma chamber. The method includes adjusting an electrode gap between a movable electrode and a stationary electrode, the wafer being disposed on one of the movable electrode and the stationary electrode, to a gap distance configured to prevent plasma formation over a center portion of the wafer, the gap distance also dimensioned such that a plasma-sustainable condition around the bevel edge of the wafer is formed after the adjusting. The method also includes flowing deposition gas into the plasma chamber. The method includes maintaining, using a heater, a chuck temperature that is configured to facilitate film deposition on the bevel edge. The method further includes generating the localized plasma from the deposition gas for depositing a film on the bevel edge.	04-19-2012

Paul Chung, Woodland, CA US

Patent application number	Description	Published
20090061449	SYSTEMS AND METHODS FOR PROCESSING HYBRID SEED - The present disclosure provides for systems and method for producing hybrid seed. In various embodiments, the disclosure provides a system for the high-throughput, nondestructive sampling of seeds. In another embodiment, a high-throughput, nondestructive method for producing hybrid seeds comprises removing a sample from a plurality of seeds in the population while preserving the germination viability of the seed and analyzing the sample for the presence or absence of one or more genetic markers indicative of a male-sterile gene.	03-05-2009
20110055947	MELON SLIP HARVEST INDICATOR - The invention provides a	03-03-2011
20110225672	MELON HYBRID BUCANERO - The invention provides seed and plants of melon hybrid Bucanero and the parent lines thereof. The invention thus relates to the plants, seeds and tissue cultures of melon hybrid Bucanero and the parent lines thereof, and to methods for producing a melon plant produced by crossing such plants with themselves or with another melon plant, such as a plant of another genotype. The invention further relates to seeds and plants produced by such crossing. The invention further relates to parts of such plants, including the fruit and gametes of such plants.	09-15-2011

Rasyad Chung, Berkeley, CA US

Patent application number	Description	Published
20090273152	Rear truck and method - A compact lean steering truck assembly that provides deep deck lean capability. The lean steering truck assembly may be integrated into a four wheeled scooter. A pivotal coupling in the front hanger allows independent steering of the front and rear wheel assemblies. Front steering is controlled by the rider's hands twisting the handle bars to the right or left or straight ahead. Rear steering is controlled by the rider's feet and hands leaning the deck and handle bars relative to the plane of the ground. The ratio of deck lean to rear steering is a function of the hanger pivot axis angle but in general terms the deeper the deck lean the greater the rear wheel steering.	11-05-2009
20100072722	LEAN STEERING TRUCK WITH A TORSION SPRING ASSEMBLY - A mechanical assembly which enables multi-track vehicles to lean into turns and return to a neutral position thereafter.	03-25-2010
20110266079	LEANING WHEELED PERSONAL ELECTRIC VEHICLE - An electric vehicle which is able to be steered by conventional bicycle-style steering, leaning rear steering or a combination of the two is herein described.	11-03-2011

Richard Chung, Rowland Heights, CA US

Patent application number	Description	Published
20100229682	Cold cast mass element - A cold cast mass element has solid metal particles of greater than 75% by volume and a binding agent of less than 25% by volume, with an outside surface. The binding agent is exposed on the outside surface and encapsulates the solid metal particles within the cold cast mass element. The may have an outside surface has a hardness of greater than durometer 70 Shore A and preferably has a hardness of above about 75 Shore A or above about 100 Shore D. The mass element has a binding agent which is an epoxy resin or thermosetting phenol formaldehyde resin. The metal particles can be grinded iron of preferably 85% to 96% by volume with a binding agent 4% to 12% by volume. The mass element preferably has solid metal particles of greater than 85% by weight; and a binding agent of less than 15% by weight.	09-16-2010

Robin Chung, Milpitas, CA US

Patent application number	Description	Published
20110227738	WEARABLE ELECTRONIC GROUND INTEGRITY MONITOR - A device that can electronically track operator ground connectivity to; a) provide continuous visual and/or auditory indication of connection state, b) optionally provide that the ground connectivity state may be monitored and displayed remotely using RF communications, and c) optionally provide that the operators device can track RFID ‘follower’ tags specifically placed to facilitate work-flow data recording and the correlation of the operators activities with specific work-flow process.	09-22-2011

Ronald Chung, Millbrae, CA US

Patent application number	Description	Published
20090088876	PORTABLE, DIGITAL MEDIA PLAYER AND ASSOCIATED METHODS - The present media player includes alternative indicators, other than a graphical user interface, to facilitate user control. In one embodiment the player includes an illuminable indicator comprising a plurality of LED's. The LED's are configured to illuminate and dim according to a variety of different illumination patterns to indicate, for example, an operational mode of the player. In some embodiments the player is configured to generate auditory signals to indicate to the user that it is tuned to a particular preset station. In some embodiments the player includes apparatus for tracking one or more user parameters, such as heart rate. In some embodiments the player may be configured with a play list matching a tempo profile of an exercise program. Several methods related to the player are also disclosed.	04-02-2009

Roy B. Chung, Carlsbad, CA US

Patent application number	Description	Published
20120138891	METHOD FOR REDUCTION OF EFFICIENCY DROOP USING AN (Al,In,Ga)N/Al(x)In(1-x)N SUPERLATTICE ELECTRON BLOCKING LAYER IN NITRIDE BASED LIGHT EMITTING DIODES - A method for reduction of efficiency droop using an (Al, In, Ga)N/Al	06-07-2012
20120138986	METHOD FOR FABRICATION OF (AL,IN,GA) NITRIDE BASED VERTICAL LIGHT EMITTING DIODES WITH ENHANCED CURRENT SPREADING OF N-TYPE ELECTRODE - A method of fabricating an (Al, In, Ga)N based optoelectronic device, comprising forming an n-type ohmic contact on an (Al, In, Ga)N surface of the device, wherein the surface comprises an Nitrogen face (N-face) and a N-rich face of the (Al, In, Ga)N, the n-type contact is on the N-face and the N-rich face, and the current spreading of the n-type ohmic contact is enhanced by a combination of a lower and a higher contact resistance on the surface.	06-07-2012

Roy B. Chung, Goleta, CA US

Patent application number	Description	Published
20090250686	METHOD FOR FABRICATION OF SEMIPOLAR (Al, In, Ga, B)N BASED LIGHT EMITTING DIODES - A yellow Light Emitting Diode (LED) with a peak emission wavelength in the range 560-580 nm is disclosed. The LED is grown on one or more III-nitride-based semipolar planes and an active layer of the LED is composed of indium (In) containing single or multi-quantum well structures. The LED quantum wells have a thickness in the range 2-7 nm. A multi-color LED or white LED comprised of at least one semipolar yellow LED is also disclosed.	10-08-2009
20090310640	MOCVD GROWTH TECHNIQUE FOR PLANAR SEMIPOLAR (Al, In, Ga, B)N BASED LIGHT EMITTING DIODES - A III-nitride optoelectronic device comprising a light emitting diode (LED) or laser diode with a peak emission wavelength longer than 500 nm. The III-nitride device has a dislocation density, originating from interfaces between an indium containing well layer and barrier layers, less than 9×10	12-17-2009
20100108985	OPTOELECTRONIC DEVICE BASED ON NON-POLAR AND SEMI-POLAR ALUMINUM INDIUM NITRIDE AND ALUMINUM INDIUM GALLIUM NITRIDE ALLOYS - A high-power and high-efficiency light emitting device with emission wavelength (λ	05-06-2010
20120061645	OPTOELECTRONIC DEVICE BASED ON NON-POLAR AND SEMI-POLAR ALUMINUM INDIUM NITRIDE AND ALUMINUM INDIUM GALLIUM NITRIDE ALLOYS - A high-power and high-efficiency light emitting device with emission wavelength (λ	03-15-2012

Sherk Chung, Piedmont, CA US

Patent application number	Description	Published
20110137581	METHOD AND APPARATUS FOR ENHANCING IN-SITU GAS FLOW MEASUREMENT PERFORMANCE - An in-situ gas flow measurement controller measures the temperature and rate of pressure drop upstream from a flow control device (FCD). The controller samples the pressure and temperature data and applies the equivalent of a decimating filter to the data to produce filtered data at a slower sampling rate. The controller derives timestamps by counting ticks from the sampling clock of the A/D converter that is sampling the pressure at regular intervals to ensure the timestamps associated with the pressure samples are accurate and do not contain jitter that is associated with software clocks. The controller additionally normalizes the temperature reading to account for power supply fluctuations, filters out noise from the pressure and temperature readings, and excludes data during periods of instability. It calculates the gas flow rate accounting for possible non-linearities in the pressure measurements, and provides the computed gas flow measurement via one of many possible interfaces.	06-09-2011
20110137582	METHOD AND APPARATUS FOR ENHANCING IN-SITU GAS FLOW MEASUREMENT PERFORMANCE - An in-situ gas flow measurement controller measures the temperature and rate of pressure drop upstream from a flow control device (FCD). The controller samples the pressure and temperature data and applies the equivalent of a decimating filter to the data to produce filtered data at a slower sampling rate. The controller derives timestamps by counting ticks from the sampling clock of the A/D converter that is sampling the pressure at regular intervals to ensure the timestamps associated with the pressure samples are accurate and do not contain jitter that is associated with software clocks. The controller additionally normalizes the temperature reading to account for power supply fluctuations, filters out noise from the pressure and temperature readings, and excludes data during periods of instability. It calculates the gas flow rate accounting for possible non-linearities in the pressure measurements, and provides the computed gas flow measurement via one of many possible interfaces.	06-09-2011
20110137583	METHOD AND APPARATUS FOR ENHANCING IN-SITU GAS FLOW MEASUREMENT PERFORMANCE - An in-situ gas flow measurement controller measures the temperature and rate of pressure drop upstream from a flow control device (FCD). The controller samples the pressure and temperature data and applies the equivalent of a decimating filter to the data to produce filtered data at a slower sampling rate. The controller derives timestamps by counting ticks from the sampling clock of the A/D converter that is sampling the pressure at regular intervals to ensure the timestamps associated with the pressure samples are accurate and do not contain jitter that is associated with software clocks. The controller additionally normalizes the temperature reading to account for power supply fluctuations, filters out noise from the pressure and temperature readings, and excludes data during periods of instability. It calculates the gas flow rate accounting for possible non-linearities in the pressure measurements, and provides the computed gas flow measurement via one of many possible interfaces.	06-09-2011

Sherk Chung, Emeryville, CA US

Patent application number	Description	Published
20080253377	System and method for controlling process end-point utilizing legacy end-point system - Embodiments in accordance with the present invention allow a second end-point determination (EPD) system to actively control the end-pointing of a semiconductor process chamber, by leveraging a legacy EPD system that is already integrated with the chamber. In one embodiment, the second EPD system controls a shutter that regulates the amount of light transmitted between a plasma light source and an optical emission spectroscopy (OES) sensor of the legacy OES EPD system. In this embodiment, the legacy OES EPD system is pre-configured to call end-point when an artificial end-point condition occurs, i.e. the intensity of light falls below a pre-set threshold. When the second EPD system determines an actual end-point condition has been reached, it closes the shutter which, causes the light intensity being read by the OES sensor to fall below the pre-set threshold. This in turn triggers an end-point command to the chamber from the legacy OES EPD system.	10-16-2008

Shine C. Chung, San Jose, CA US

Patent application number	Description	Published
20120039107	Circuit and System of Aggregated Area Anti-Fuse in CMOS Processes - Gate oxide breakdown anti-fuse suffers notorious soft breakdown that reduces yield and reliability. This invention discloses circuit and system to enhance electrical field by blocking LDD so that the electrical field is higher and more focused near the drain junction, to make electrical field in the channel more uniform by creating slight conductive or conductive in part or all of the channel, or to neutralize excess carriers piled up in the oxide by applying alternative polarity pulses. The embodiments can be applied in part, all, or any combinations, depending on needs. This invention can be embodied as a 2 T anti-fuse cell having an access and a program MOS with drain area in the program MOS, or 1.5 T anti-fuse cell without any drain in the program MOS. Similarly this invention can also be embodied as a 1 T anti-fuse cell having a portion of the channel made conductive or slightly conductive to merge the access and program MOS into one device with drain area, or 0.5 T anti-fuse cell without any drain.	02-16-2012
20120044736	MEMORY DEVICES USING A PLURALITY OF DIODES AS PROGRAM SELECTORS FOR MEMORY CELLS - At least one junction diode fabricated in standard CMOS logic processes can be used as program selectors for the memory cells that can be programmed based on the directions of current flow. These memory cells are MRAM, RRAM, CBRAM, or other memory cells that have a resistive element coupled to the P terminal of the first diode and to the N terminal of a second diode. The diodes can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diodes. By applying a high voltage to a resistive element and switching the N terminal of the first diode to a low voltage while disabling the second diode, a current flows through the memory cell can change the resistance into one state. Similarly, by applying a low voltage to a resistive element and switching the P terminal of the second diode to a high voltage while disabling the first diode, a current flows through the memory cell can change the resistance into another state. The P+ active region of the diode can be isolated from the N+ active region in an N well by using dummy MOS gate, SBL, or STI isolations.	02-23-2012
20120044737	CIRCUIT AND SYSTEM OF USING POLYSILICON DIODE AS PROGRAM SELECTOR FOR ONE-TIME PROGRAMMABLE DEVICES - Polysilicon diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The OTP device has an OTP element coupled to a diode in a memory cell. The diode can be constructed by P+/N+ implants on a polysilicon as a program selector. By applying a high voltage to an OTP element coupled to the P-terminal of a diode and switching the N-terminal of a diode to a low voltage for suitable duration of time, a current flows through the OTP element may change the resistance state. On the polysilicon diode, the spacing and doping level of a gap between the P- and N-implants can be controlled for different breakdown voltages and leakage currents. The Silicide Block Layer (SBL) can be used to block silicide formation on the top of polysilicon to prevent shorting. If the OTP element is a polysilicon electrical fuse, the fuse element can be merged with the polysilicon diode in one piece to save area.	02-23-2012
20120044738	ONE-TIME PROGRAMMABLE MEMORIES USING POLYSILICON DIODES AS PROGRAM SELECTORS - Polysilicon diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, using electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse etc. as OTP element The diode can be constructed by P+/N+ implants on a polysilicon as a program selector. The OTP device has an OTP element coupled to a polysilicon diode. The OTP devices can be used to construct a two-dimensional OTP memory with the N-terminals of the diodes in a row connected as a wordline and the OTP elements in a column connected as a bitline. By applying a high voltage between a selected bitline and a selected wordline to turn on a diode in a selected cell for suitable duration of time, a current flows through an OTP element may change the resistance state. The cell data in the OTP memory can also be read by turning on a selected wordline and to couple a selected bitline to a sense amplifier. The wordlines may have high-resistivity local wordlines coupled to low-resistivity global wordlines through conductive contact(s) or via(s).	02-23-2012
20120044739	CIRCUIT AND SYSTEM OF USING JUNCTION DIODE AS PROGRAM SELECTOR FOR ONE-TIME PROGRAMMABLE DEVICES - Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The OTP device has an OTP element coupled to a diode in a memory cell. The diode can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diode. By applying a high voltage to the P terminal of a diode and switching the N terminal of a diode to a low voltage for suitable duration of time, a current flows through an OTP element in series with the program selector may change the resistance state. The P+ active region of the diode can be isolated from the N+ active region in the N well by using dummy MOS gate, SBL, or STI/LOCOS isolations. If the resistive element is an interconnect fuse based on CMOS gate material, the resistive element can be coupled to the P+ active region by an abutted contact such that the element, active region, and metal are connected in a single rectangular contact.	02-23-2012
20120044740	ONE-TIME PROGRAMMABLE MEMORIES USING JUNCTION DIODES AS PROGRAM SELECTORS - Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The diode can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diode. The OTP device has an OTP element coupled to the diode. The OTP device can be used to construct a two-dimensional OTP memory with the N terminals of the diodes in a row connected as a wordline and the OTP elements in a column connected as a bitline. By applying a high voltage between a selected bitline and a selected wordline to turn on a diode in a selected cell for suitable duration of time, a current flows through an OTP element in series with the program selector may change the resistance state. The cell data in the OTP memory can also be read by turning on a selected wordline and to couple a selected bitline to a sense amplifier. The wordlines may have high-resistivity local wordlines coupled to low-resistivity global wordlines through conductive contact(s) or via(s).	02-23-2012
20120044743	CIRCUIT AND SYSTEM OF USING A POLYSILICON DIODE AS PROGRAM SELECTOR FOR RESISTIVE DEVICES IN CMOS LOGIC PROCESSES - Polysilicon diodes fabricated in standard CMOS logic technologies can be used as program selectors for a programmable resistive device, such as electrical fuse, contact/via fuse, anti-fuse, or emerging nonvolatile memory such as MRAM, PCM, CBRAM, or RRAM. The diode can be constructed by P+/N+ implants on a polysilicon as a program selector. By applying a high voltage to a resistive element coupled to the P terminal of a diode and switching the N terminal of a diode to a low voltage for proper time, a current flows through a resistive element may change the resistance state. On the polysilicon diode, the spacing and doping level of a gap between the P+ and N+ implants can be controlled for different breakdown voltages and leakage currents. The Silicide Block Layer (SBL) can be used to block silicide formation on the top of polysilicon to prevent shorting. If the resistive element is a polysilicon electrical fuse, the fuse element can be merged with the polysilicon diode in one piece to save area.	02-23-2012
20120044744	PROGRAMMABLY REVERSIBLE RESISTIVE DEVICE CELLS USING POLYSILICON DIODES - Polysilicon diodes fabricated in standard CMOS logic processes can be used as program selectors for reversible resistive devices such as PCRAM, RRAM, CBRAM, or other memory cells. The reversible resistive devices have a reversible resistive element coupled to a diode. The diode can be constructed by P+/N+ implants on a polysilicon as a program selector. By applying a voltage or a current between a reversible resistive element and the N-terminal of a diode, the reversible resistive device can be programmed into different states based on magnitude, duration, voltage-limit, or current-limit in a reversible manner. On the polysilicon diode, the spacing and doping level of a gap between the P- and N-implants can be controlled for different breakdown voltages and leakage currents. The Silicide Block Layer (SBL) can be used to block silicide formation on the top of polysilicon to prevent shorting.	02-23-2012
20120044745	REVERSIBLE RESISTIVE MEMORY USING POLYSILICON DIODES AS PROGRAM SELECTORS - Embodiments of reversible resistive memory cells using polysilicon diodes are disclosed. The programmable resistive devices can be fabricated using standard CMOS logic processes to reduce cell size and cost. In one embodiment, polysilicon diodes can be used as program selectors for reversible resistive memory cells that can be programmed based on magnitude, duration, voltage-limit, or current-limit of a supply voltage or current. These cells are PCRAM, RRAM, CBRAM, or other memory cells that have a reversible resistive element coupled to a polysilicon diode. The polysilicon diode can be constructed by P+/N+ implants on a polysilicon substrate as a program selector. The memory cells can be used to construct a two-dimensional memory array with the N-terminals of the diodes in a row connected as a wordline and the reversible resistive elements in a column connected as a bitline. By applying a voltage or a current to a selected bitline and to a selected wordline to turn on the diode, a selected cell can be programmed into different states reversibly based on magnitude, duration, voltage-limit, or current-limit. The data in the reversible resistive memory can also be read by turning on a selected wordline to couple a selected bitline to a sense amplifier. The wordlines may have high-resistivity local wordlines coupled to low-resistivity global wordlines through conductive contact(s) or via(s).	02-23-2012
20120044746	CIRCUIT AND SYSTEM OF USING A JUNCTION DIODE AS PROGRAM SELECTOR FOR RESISTIVE DEVICES - Junction diodes fabricated in standard CMOS logic technologies can be used as program selectors for a programmable resistive device, such as electrical fuse, contact/via fuse, anti-fuse, or emerging nonvolatile memory such as MRAM, PCM, CBRAM, or RRAM. The diode can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diode. By applying a high voltage to the P terminal of a diode and switching the N terminal of a diode to a low voltage for proper duration of time, a current flows through a resistive element in series with the program selector may change the resistance state. The P+ active region of the diode can be isolated from the N+ active region in the N well by using dummy MOS gate, SBL, or STI isolations. If the resistive element is an interconnect fuse based on CMOS gate material, the resistive element can be coupled to the P+ active region by an abutted contact such that the element, active region, and metal can be connected in a single rectangular contact.	02-23-2012
20120044747	REVERSIBLE RESISTIVE MEMORY USING DIODES FORMED IN CMOS PROCESSES AS PROGRAM SELECTORS - Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for reversible resistive memory cells that can be programmed based on magnitude, duration, voltage-limit, or current-limit of a supply voltage or current. These cells are PCM, RRAM, CBRAM, or other memory cells that have a reversible resistive element coupled to a diode. The diode can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diode. The memory cells can be used to construct a two-dimensional memory array with the N terminals of the diodes in a row connected as a wordline and the reversible resistive elements in a column connected as a bitline. By applying a voltage or a current to a selected bitline and to a selected wordline to turn on the diode, a selected cell can be programmed into different states reversibly based on magnitude, duration, voltage-limit, or current-limit. The data in the reversible resistive memory can also be read by turning on a selected wordline to couple a selected bitline to a sense amplifier. The wordlines may have high-resistivity local wordlines coupled to low-resistive global wordlines through conductive contact(s) or via(s).	02-23-2012
20120044748	Sensing Circuit For Programmable Resistive Device Using Diode as Program Selector - A sensing circuit for programmable resistive device using diode as program selector is disclosed. The sensing circuit can have a reference and a sensing branch. In one embodiment, each branch can have a first type of MOS with the source coupled to a first supply voltage, the drain coupled to the drain of a second type of MOS, which can have the gate coupled to a bias supply voltage. The sources of the second type of MOS in the reference and sensing branches can be coupled to a reference resistor and a programmable resistance element, respectively, and they are further coupled to a second supply voltage through their diodes. The gate of the first type of MOS in the sensing branch can be coupled to the gate of the first type of MOS in the reference branch, which can have the drain coupled to the gate. The resistance difference between the reference resistor and the programmable resistive element can be sensed through the drain of the first type of MOS in the sensing branch into a logic level.	02-23-2012
20120044753	PROGRAMMABLY REVERSIBLE RESISTIVE DEVICE CELLS USING CMOS LOGIC PROCESSES - Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for reversible resistive devices, such as PCM, RRAM, CBRAM, or other memory cells. The reversible resistive devices have a reversible resistive element coupled to a diode. The diode can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diode. By applying a voltage or a current between a reversible resistive element and the N terminal of a diode, the reversible resistive device can be programmed into different states based on magnitude, duration, voltage-limit, or current-limit in a reversible manner. The P+ active region of the diode can be isolated from the N+ active region in the N well by using dummy MOS gate, SBL, or STI/LOCOS isolations.	02-23-2012
20120044757	MEMORY USING A PLURALITY OF DIODES AS PROGRAM SELECTORS WITH AT LEAST ONE BEING A POLYSILICON DIODE - Embodiments of programmable memory cells using a plurality of diodes as program selectors are disclosed for those memory cells that can be programmed based on direction of current flow. These memory cells are MRAM, RRAM, CBRAM, or other memory cells that have a programmable resistive element coupled to the P-terminal of a first diode and to the N-terminal of a second diode. At least one of the diodes can be a polysilicon diode fabricated using standard CMOS processes with P+ and N+ implants in two ends. The polysilicon diode can be constructed by P+/N+ implants on a polysilicon substrate as a program selector. The memory cells can be used to construct a two-dimensional memory array with the N-terminals of the first diodes and the P-terminals of the second diodes in a row connected as wordline(s) and the resistive elements in a column connected as a bitline.	02-23-2012
20120044758	CIRCUIT AND SYSTEM OF USING AT LEAST ONE JUNCTION DIODE AS PROGRAM SELECTOR FOR MEMORIES - At least one junction diode fabricated in standard CMOS logic processes can be used as program selectors for memory cells that can be programmed based on direction of current flow. These cells are MRAM, RRAM, CBRAM, or other memory cells that have a programmable resistive element coupled to a P terminal of a first diode and to an N terminal of a second diode. The diodes can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diodes. The memory cells can be used to construct a two-dimensional memory array with the N terminals of the first diodes and the P terminals of the second diodes in a row connected as wordline(s) and the resistive elements in a column connected as a bitline. By applying a high voltage to a selected bitline and a low voltage to a selected wordline to turn on the first diode while disabling the second diode, a selected cell can be programmed into one state. Similarly, by applying a low voltage to a selected bitline and a high voltage to a selected wordline to turn on the second diode while disabling the first diode, a selected cell can be programmed into another state. The data in the resistive memory cell can also be read by turning on a selected wordline to couple a selected bitline to a sense amplifier. The wordlines may have high-resistivity local wordlines coupled to low-resistivity global wordlines through conductive contact(s) or via(s).	02-23-2012
20120047322	Method and System of Using One-Time Programmable Memory as Multi-Time Programmable in Code Memory of Processors - A method, device and system of using an One-Time-Programmable (OTP) memory as an Multiple-Time Programming (MTP) memory equivalent is disclosed. The use of OTP memory in this manner allows code to be updated one or more times and yet remain small in size and relatively easy to process (fabricate). The code can be program code for a processor, such as boot code, boot code kernel or other instruction code. According to one aspect, an OTP memory is able to functionally operate as if it were a MTP memory through intelligent use of NOPs, which are no operations. Subsequently, if a particular subroutine or function in the program code needs to be modified, an instruction (e.g., JUMP instruction) can be programmed into the NOP so that certain existing instructions can be bypassed and the execution of instructions of a new module can be performed.	02-23-2012
20120106231	LOW-PIN-COUNT NON-VOLATILE MEMORY INTERFACE - A low-pin-count non-volatile (NVM) memory to be provided in an integrated circuit. In one embodiment, the low-pin-count non-volatile (NVM) memory can use only one external control signal and one internal clock signal to generate start, stop, device ID, read/program/erase pattern, starting address, and actual read/program/erase cycles. When programming or erasing begins, toggling of the control signal increments/decrements a program or erase address and a pulse width of the control signal determines the actual program or erase time. A data out of the low-pin-count non-volatile (NVM) memory can be multiplexed with the control signal. Since the clock signal can be derived and shared from the system clock of the integrated circuit, the NVM memory need only have one external control pin for I/O transactions to realize a low-pin-count interface.	05-03-2012
20120147653	CIRCUIT AND SYSTEM OF A HIGH DENSITY ANTI-FUSE - A high density anti-fuse cell can be built at the cross points of two perpendicular interconnect lines, such as active region lines, active and polysilicon lines, active and metal lines, or polysilicon and metal lines. The cell size can be very small. At least one of the anti-fuse cells have a thin oxide fabricated before, after, or between a diode in at least one contact holes at the cross points of the interconnect lines. The thin oxide of the anti-fuse cells at the cross points can be selected for rupture by applying supply voltages in the two perpendicular lines. In some embodiments, a diode can be created after thin oxide is ruptured so that explicitly fabricating a diode or opening a contact hole at the cross-point may not be necessary.	06-14-2012

Shine C. Chung, San Josa, CA US

Patent application number	Description	Published
20120044756	MEMORY DEVICES USING A PLURALITY OF DIODES AS PROGRAM SELECTORS WITH AT LEAST ONE BEING A POLYSILICON DIODE - Embodiments of programmable memory cells using a plurality of diodes as program selectors are disclosed for those memory cells that can be programmed based on direction of current flow. These memory cells are MRAM, RRAM, CBRAM, or other memory cells that have a programmable resistive element coupled to the P-terminal of a first diode and to the N-terminal of a second diode. At least one of the diodes can be a polysilicon diode fabricated using standard CMOS processes. The polysilicon diode can be constructed by P+/N+ implants on a polysilicon substrate as a program selector. The polysilicon diode can be constructed by P+/N+ implants on a polysilicon as a program selector. By applying a high voltage to a resistive element and switching the N-terminal of the first diode to a low voltage while disabling the second diode, a current flowing through the memory cell can change the resistance into one state. Similarly, by applying a low voltage to a resistive element and switching the P-terminal of the second diode to a high voltage while disabling the first diode, a current flowing through the memory cell can change the resistance into another state. On the polysilicon diode, the spacing and doping level of a gap between the P- and N-implants can be controlled for different breakdown voltages and leakage currents. A Silicide Block Layer (SBL) can be used to block silicide formation on the top of polysilicon to prevent shorting.	02-23-2012

Sung Chung, San Jose, CA US

Patent application number	Description	Published
20110320046	Drive method for starting and operating a resonant scanning MEMS device at its resonant frequency - The resonance frequency of a forced torsionally oscillating mirror MEMS device can be controlled in the presence of perturbations by means of a closed loop feedback device and method of using it. The method is implemented through a simple algorithm, implemented in either software or hardware, that maintains the condition of resonance, or another selected frequency, by recursively determining that the center of the driving voltage pulse is positioned at a point on the measured positional waveform of the oscillating system.	12-29-2011

Sung Hwan Chung, Fremont, CA US

Patent application number	Description	Published
20120128239	IMAGE QUALITY ASSESSMENT TO MERCHANDISE AN ITEM - Image-based features may be significantly correlated with click-through rates of images that depict a product, which may provide a more formal basis for the informal notion that good quality images will result in better click-through rates, as compared to poor quality images. Accordingly, an image assessment machine is configured to analyze image-based features to improve click-through rates for shopping search applications (e.g., a product search engine). Moreover, the image assessment machine may rank search results based on image quality factors and may notify sellers about low quality images. This may have the effect of improving the brand value for an online shopping website and accordingly have a positive long-term impact on the online shopping website.	05-24-2012

Sung Soo Chung, San Jose, CA US

Patent application number	Description	Published
20120047412	Apparatus and system for implementing variable speed scan testing - In an embodiment of the invention, variable test clock circuitry is provided within an integrated circuit desired to be tested. The variable test clock frequency implements a test clock control register that receives serial test data from a device tester and is configured to serially pass the received test data to scan test chains within the integrated circuit. The test clock control register stores test clock information. The test clock information is provided to a test clock generator where the test clock generator then produces test clock signals at a predetermined frequency. The test clock signal is then provided as a test clock frequency for the scan test chains within the integrated circuit. Methods are also disclosed for operating the variable test clock frequency.	02-23-2012
20120047413	Methods for implementing variable speed scan testing - In an embodiment of the invention, variable test clock circuitry is provided within an integrated circuit desired to be tested. The variable test clock frequency implements a test clock control register that receives serial test data from a device tester and is configured to serially pass the received test data to scan test chains within the integrated circuit. The test clock control register stores test clock information. The test clock information is provided to a test clock generator where the test clock generator then produces test clock signals at a predetermined frequency. The test clock signal is then provided as a test clock frequency for the scan test chains within the integrated circuit. Methods are also disclosed for operating the variable test clock frequency.	02-23-2012

Tae H. Chung, Murrieta, CA US

Patent application number	Description	Published
20100142582	GAS DISCHARGE LASER CHAMBER - One aspect of the disclosed subject matter describes a gas discharge laser chamber. The gas discharge laser chamber includes a discharge region formed between a first electrode and a second electrode, a tangential fan for circulating gas through the discharge region, wherein the fan is proximate to an input side of the discharge region, an input side acoustic baffle proximate to the input side of the discharge region. The input side acoustic baffle includes a vanishing point leading edge, a vanishing point trailing edge, a gas flow smoothing offset surface aligning a gas flow from a surface of the input side acoustic baffle to an input side of a cathode support in the discharge region, a plurality of ridges separated by a plurality of trenches, wherein the plurality of ridges and the plurality of trenches are aligned with a direction of gas flow through the discharge region and wherein the plurality of ridges have a random pitch between about 0.3 and about 0.7 inch.	06-10-2010

Tae (mark) H. Chung, Murrieta, CA US

Patent application number	Description	Published
20110058580	EXTENDABLE ELECTRODE FOR GAS DISCHARGE LASER - A movable electrode assembly for use in laser system includes a first electrode, a second electrode arranged opposite from the first electrode, the second electrode being spaced apart from the first electrode by a discharge gap and a discharge gap adjuster interfaced with at least one of the second electrode or the first electrode, the discharge gap adjuster configured to adjust the discharge gap. A movable electrode assembly for integration into a housing of a laser system includes a first electrode having a discharge surface, a second electrode having a discharge surface, such that the discharge surface of the first electrode and the discharge surface of the second electrode face each other in a spaced apart setting that defines a desired discharge gap, and a mechanism for moveably adjusting the spaced apart setting toward the desired discharge gap. A method of adjusting a discharge gap is also disclosed.	03-10-2011

Tae Seung Chung, San Jose, CA US

Patent application number	Description	Published
20120038062	STACKED SEMICONDUCTOR PACKAGE AND STACKING METHOD THEREOF - A stacked semiconductor package technique applicable to semiconductor chips having pins short enough that the semiconductor chips cannot be directly bonded together is provided. A printed circuit board (PCB) is inserted into a space between pins of an upper semiconductor chip and the exterior of bodies of stacked semiconductor chips. The PCB includes a plurality of conductive patterns at locations corresponding to the respective pins. The respective conductive patterns and the corresponding respective pins of the upper and lower semiconductor chips are bonded together. The PCB includes a plurality of recess patterns on one side, the recess patterns having the same pitch as the pins of the semiconductor chips. The PCB is disposed across the pins of the lower semiconductor chip, and thereby easily arranged with the stacked semiconductor chips.	02-16-2012

Tat Leung Chung, Alhambra, CA US

Patent application number	Description	Published
20080278582	Video Fusion Display Systems - Methods, systems, and apparatus, including medium-encoded computer program products, for managing video bandwidth over a network connecting one or more cameras and one or more client video display stations. In one aspect, a system includes a data communication network, cameras coupled with the network, arranged in different locations, and operable to provide video imagery of the different locations via the network, one or more video fusion clients operable to display the video imagery of the different locations received via the network, one or more camera manager components operable to manage transmission of the video imagery from the cameras over the network based on client-side information, and one or more client manager components operable to define the client-side information based on display parameters of the one or more video fusion clients.	11-13-2008

Vanessa Chung, Petaluma, CA US

Patent application number	Description	Published
20120084198	Method and System for ACH Debit Delayed Availability - A server includes a memory that stores a plurality of availability schedules, and a processor communicatively coupled to the memory. The processor is operable to access an automated clearing house (ACH) debit transaction received at an originating depository financial institution (ODFI) from an originator, determine an availability schedule associated with the originator from the plurality of availability schedules, credit a percentage of the amount of funds of the ACH debit transaction to a delayed settlement account associated with the originator, and transfer a portion of the amount of funds credited to the delayed settlement account to a general operating account of the originator on a particular day determined from the availability schedule. The delayed settlement account has one or more associated rules that prevent the originator from withdrawing funds from the delayed settlement account.	04-05-2012

Walter H. Chung, Rancho Palos Verdes, CA US

Patent application number	Description	Published
20110308296	High-frequency, hexapod six degree-of-freedom shaker - A shaker for enabling the testing of gyros and/or other devices for performance under realistic 6DOF motions. The shaker may be implemented as a hexapod, comprising a plate and six individually, simultaneously, and real-time controllable strut assemblies that are capable of extending and contracting linearly. The strut assemblies may comprise high-precision, linear electromagnetic actuators. The strut assemblies may also comprise high-precision non-contact sensors to sense the extension/contraction of the strut assemblies along their stroke length. In addition, the strut assemblies may comprise, at each end thereof, stiff, bendable flexures to attain the repeatable and linear motion required. The controller preferably has a control bandwidth of 1000 Hz or more, so that the motion of the plate can be precisely controlled to realize realistic 6DOF motions.	12-22-2011

Woody Chung, Burlingame, CA US

Patent application number	Description	Published
20090236313	GAS FLOW DISTRIBUTION RECEPTACLES, PLASMA GENERATOR SYSTEMS, AND METHODS FOR PERFORMING PLASMA STRIPPING PROCESSES - Systems, system components, and methods for plasma stripping are provided. In an embodiment, a gas flow distribution receptacle may have a rounded section that includes an inner surface defining a reception cavity, an outer surface forming an enclosed end, and a centerpoint on the outer surface having a longitudinal axis extending therethrough and through the reception cavity. First and second rings of openings provide flow communication with the plasma chamber. The second ring of openings are disposed between the first ring and the centerpoint, and each opening of the second ring of openings extends between the inner and outer surfaces at a second angle relative to the longitudinal axis that is less than the first angle and has a diameter that is substantially identical to a diameter of an adjacent opening and smaller than the diameters of an opening of the first ring of openings.	09-24-2009
20120097331	GAS FLOW DISTRIBUTION RECEPTACLES, PLASMA GENERATOR SYSTEMS, AND METHODS FOR PERFORMING PLASMA STRIPPING PROCESSES - Systems, system components, and methods for plasma stripping are provided. In an embodiment, a gas flow distribution receptacle may have a rounded section that includes an inner surface defining a reception cavity, an outer surface forming an enclosed end, and a centerpoint on the outer surface having a longitudinal axis extending therethrough and through the reception cavity. First and second rings of openings provide flow communication with the plasma chamber. The second ring of openings are disposed between the first ring and the centerpoint, and each opening of the second ring of openings extends between the inner and outer surfaces at a second angle relative to the longitudinal axis that is less than the first angle and has a diameter that is substantially identical to a diameter of an adjacent opening and smaller than the diameters of an opening of the first ring of openings.	04-26-2012

Yau Wing Chung, Fremont, CA US

Patent application number	Description	Published
20090122269	METHODS AND SYSTEMS FOR IMPROVING OPERATION OF A VIDEO PROJECTOR - A method of operating a video device includes determining an operating temperature, determining if the operating temperature is above normal operating temperature for the video projector, and setting the video projector in economy mode if the operating temperature is above the normal operating temperature.	05-14-2009
20120106759	SPEAKER SYSTEM AND METHOD FOR OPTIMIZING OUTPUT OF SPEAKER THEREOF - A speaker system and a method for optimizing an output of a speaker thereof are provided. The speaker system includes a speaker, an automatic gain control amplifier, a volume adjustment unit, a controller, and an indication unit. The function of the automatic gain control amplifier may be intelligently optimized by the controller, so that the controller may remind the user that the automatic gain control amplifier is operated in a reduced dynamic range through the indication unit in case that the volume adjustment unit receives an input sound frequency signal of a very high intensity. With the help of the indication unit, the user may easily find an optimal operation spot of the automatic gain control amplifier, and the speaker system may generate enough sound with a good dynamic range.	05-03-2012

Yishin Chung, Palo Alto, CA US

Patent application number	Description	Published
20080307526	METHOD TO PERFORM BOTNET DETECTION - A method and a system for monitoring network activities associated with a computer connected to a network are provided. The method may include detecting a bot activity associated with the computer; attributing a bot status to the computer, based on a bot activity type associated with the bot activity, prior detections of bot activities, and considering time stamps. The method may also include updating the bot status attributed to the computer, based upon detection of subsequent bot activities associated with the computer, the bot activity types associated with the subsequent bot activities, and one or more other criteria. In one example embodiment, the network activities may include network transmissions and behavioral patterns. According to example embodiments, the system may include a network monitor, a bot activity detection module, a bot status module, and a bot status update module.	12-11-2008

Young J. Chung, Calabasas, CA US

Patent application number	Description	Published
20090192251	NANO-STRUCTURED INORGANIC ZINC PHOSPHATE CORROSION PROTECTIVE COATING FOR METAL ALLOYS - A method is provided for enhancing corrosion resistance of a metal surface that includes the step of forming a sol-gel coating in which nanostructured zinc phosphate (Zn	07-30-2009
20100047124	Self decontaminating system and fabric - A self-decontaminating system for decontaminating a surface on demand is disclosed herein. The system contains an electrochemical cell and at least one portion of the surface forms a functional component of the cell. The system may include an electrocatalytic fabric which is flexible and resistant to tears and breaks, such that the fabric can be rolled up or pleated in order to provide a high surface area structure that can serve as an active filter. The fabric can function as a stand-alone system or a protective coating. Also disclosed are methods for fabricating, decontaminating, and regenerating the self-decontaminating fabric.	02-25-2010
20100221459	Laminated structures using UV-curable adhesion promoters - An adhesion promoter for enhancing the bond between adjacent layers of a multilayer structure to prevent delamination thereof is disclosed. The adhesion promoter comprises an aromatic polyimide-based UV-cured acrylate. Also disclosed are laminated structures including liquid crystal displays and bonded missile domes that utilize an adhesion promoter of the invention, and methods for fabricating such structures.	09-02-2010
20120111719	Multilayer self-decontaminating coatings - A layered construction for use in decontaminating a surface or enclosed space is described. The construction is an electrochemical cell which includes a cathode, an electrolyte layer, an anode and a protective surface layer. A precursor compound that can be electrically decomposed to release an oxidant, on demand and over an extended period of time, is included in the layered structure, preferably in the electrolyte layer. The oxidant compounds react with various different chemical or biological contaminants in contact the protective layer, thereby deactivating, destroying or devitalizing the contaminants. The layered construction is suitable for application to a device or substrate, or placement in an enclosed space, and can be used on sensitive surfaces such as electronic components and human skin.	05-10-2012

Younkyu Chung, Thousand Oaks, CA US

Patent application number	Description	Published
20100188146	High Efficiency Power Amplifier Having Embedded Switching - A power amplifier includes at least one amplification path comprising at least a first amplification device and a second amplification device, where the first amplification device has a common control terminal to provide amplification when biased on and to prevent conduction of a signal through the amplification path when biased off.	07-29-2010
20110032037	POWER AMPLIFIER BIAS CIRCUIT HAVING CONTROLLABLE CURRENT PROFILE - A power amplifier bias circuit having a controllable current profile includes a first transistor device configured as a switch, and configured to receive a non-regulated system voltage, and a plurality of resistors configured to provide a current and configured to determine an amount of a bias current that flows through a second transistor device, where the second transistor device is part of a current mirror comprising a third transistor device and the amount of bias current flowing through the second transistor device determines a power output of the third transistor device.	02-10-2011