| Patent application number | Description | Published |
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| 20080298266 | METHOD AND SYSTEM FOR ASSESSING STATUSES OF CHANNELS - An assessment system classifies a plurality of channels to several channel groups according to the characteristics of the channel groups and assesses the status of each channel by a corresponding method, such as a period comparison method or a SNR comparison method, defined based on the channel groups. Hence, the present invention allows simpler computations to be made and a simpler circuit structure to be used. | 12-04-2008 |
| 20090092179 | Method and a circuit for estimating the signal quality of a communication channel and a wireless receiving apparatus using the same - A method for estimating the signal quality of a communication channel is disclosed. Firstly, an input signal passes through a match filter at the initial stage of an estimation period. Next, the output of the match filter is calculated to obtain the noise reference value within a pre-determined period. The output value of the match filter and the noise reference value are compared. When the output value of the match filter is larger than the noise reference value, a valid power value is obtained according to the output value of the match filter. The valid power values are accumulated. Finally, a SNR is calculated according to the noise reference value and the accumulated valid power value at the end of the estimation period. Thereby, the signal quality of the wireless communication channel is estimated according to the SNR, and the signal transmission rate is determined. | 04-09-2009 |
| 20090109688 | Photoelectronic device - A photoelectronic device including a carrier, a light-emitting component mounted on the carrier; a patterned structure deposited on the carrier and around the light-emitting component; and a transparent sealing structure formed above the light-emitting component. The patterned structure mentioned above can cause the transparent sealing structure to be focused above the light-emitting component, and restrained in the patterned structure. The transparent sealing structure with predetermined proportional configuration is obtained by controlling the quantity of the transparent sealing structure. Therefore light efficiency of the photoelectronic device can be greatly improved. | 04-30-2009 |
| 20090154618 | Device and method for calculating Channel State Information - Device and method for calculating channel state information (CSI) are disclosed. The device and method are applied to calculate the channel state information of a dual-carrier modulation system. When a channel equalization value is transmitted into this system, an absolute-value computing unit computes the absolute value for each equalization value. The absolute-value computing unit is electrically connected to a channel classifying unit that is used to separate signals to two channels. Every channel is connected to the equalization-value comparing unit. One smaller value resulted from a comparison operation is employed as the new-defined CSI for these two channels. Afterward, this CSI can be used in a decoder for enhancing the performance of dual-carrier modulation system in a multi-path fading channel. | 06-18-2009 |
| Patent application number | Description | Published |
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| 20080231439 | Activity Detection Circuit for a Storage Device - An activity detection circuit for a storage device including a sampling module, a logic module, and an indication module. The sampling module is for detecting a state interface of the storage device by a reference signal. The logic module is for determining a state of the storage device according to a detection result generated by the sampling module. The indication module includes a light emitting device, wherein when the storage device is in a connected state, the light emitting device emits constant light, and when the storage device is in a read/write state, the light emitting device emits flickering light. The present invention also provides a storage module including a storage device, a connection port and the activity detection circuit described above. | 09-25-2008 |
| 20090129228 | Logic circuit and method for controlling display lights of hard disk - A logic circuit, for controlling display lights of a hard disk, includes a flip-flop, a logic gate and a buffer. The flip-flop receives a clock signal, a reset signal and a data signal and generates an output signal, in which the clock signal and the reset signal are obtained by a timing process of the data signal. The logic gate generates a logic signal according to the data signal and the output signal. The buffer receives the logic signal and an action signal. The logic signal enables the buffer such that the action signal passes through the buffer to drive a normal light during the normal operation of the hard disk, and the data signal drives a failure light during the failure or rebuilding operation of the hard disk. A method for controlling the display lights of the hard disk is also disclosed. | 05-21-2009 |
