Patent application number | Description | Published |
20100115188 | METHOD FOR MANAGING A MEMORY APPARATUS, AND ASSOCIATED MEMORY APPARATUS THEREOF - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: recording usage information of at least one block during accessing pages of the block; and determining whether to erase a portion of the blocks according to the usage information. For example, the usage information includes a valid page count table for recording valid page counts of the blocks, respectively; and the ranking of a field of the valid page count table represents a physical block address, and the content of the field represents an associated valid page count. In another example, the usage information includes an invalid page count table for recording invalid page counts of the blocks, respectively; and the ranking of a field of the invalid page count table represents a physical block address, and the content of the field represents an associated invalid page count. | 05-06-2010 |
20100115189 | METHOD FOR MANAGING A MEMORY APPARATUS, AND ASSOCIATED MEMORY APPARATUS THEREOF - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address linking table within the memory apparatus, wherein the local page address linking table comprises linking relationships between physical page addresses and logical page addresses of a plurality of pages; and building a global page address linking table of the memory apparatus according to the local page address linking table. | 05-06-2010 |
20100306455 | METHOD FOR MANAGING A PLURALITY OF BLOCKS OF A FLASH MEMORY, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF - A method for managing a plurality of blocks of a Flash memory includes: sieving out at least one first block having invalid pages from the plurality of blocks; and moving data of a portion of valid pages of the first block to a second block, where data of all valid pages of the first block is not moved to the second block at a time. An associated memory device and a controller thereof are also provided, where the controller includes: a ROM arranged to store a program code; and a microprocessor arranged to execute the program code to control the access to the Flash memory and manage the plurality of blocks. The controller that executes the program code by utilizing the microprocessor sieves out the first block from the plurality of blocks, and moves the data of the portion of valid pages of the first block to the second block. | 12-02-2010 |
20110087828 | METHOD FOR ENHANCING PERFORMANCE OF ACCESSING A FLASH MEMORY, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF - A method for enhancing performance of accessing a Flash memory, which includes a plurality of blocks and is positioned in a memory device, includes: during writing data into the Flash memory, establishing/updating at least one linking table in a random access memory (RAM) of the memory device, wherein regarding the Flash memory, the linking table indicates linking relationships between logical addresses and physical addresses, or indicates linking relationships between physical addresses and logical addresses; and writing the linking table into the Flash memory only when it is detected that a flush cache command is sent from a host device. An associated memory device and a controller thereof are also provided, where the controller includes: a read only memory (ROM) arranged to store a program code; and a microprocessor arranged to execute the program code to control the access to the Flash memory. | 04-14-2011 |
20110093649 | METHOD FOR MANAGING A PLURALITY OF BLOCKS OF A FLASH MEMORY, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF - A method for managing a plurality of blocks of a Flash memory includes: providing at least one logical-to-physical block linking table within the Flash memory, wherein regarding a plurality of logical block addresses, the logical-to-physical block linking table initially stores at least one initial value falling outside a range of respective physical block addresses of the Flash memory to prevent the logical block addresses from being initially linked to the physical block addresses; and when it is required to write data belonging to a logical block address into the Flash memory, writing a physical block address of the physical block addresses into an updated version of the logical-to-physical block linking table in order to link the logical block address to the physical block address. An associated memory device and a controller thereof are also provided, where the controller includes: a ROM; and a microprocessor. | 04-21-2011 |
20120221782 | METHOD FOR MANAGING A MEMORY APPARATUS, AND ASSOCIATED MEMORY APPARATUS THEREOF - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: recording usage information of at least one block, for use of managing the memory apparatus. For example, the method may further include: determining whether to erase a portion of blocks according to the usage information, where the usage information may include a valid/invalid page count table for recording valid/invalid page counts of the blocks, respectively. In another example, the method may further include: erasing at least a particular block of the blocks according to the usage information, where the usage information may include count information for representing valid/invalid page counts of the particular block, or include page count information for representing a number of effectively linked page of the particular block. Associated memory apparatus are also provided. | 08-30-2012 |
20120221829 | METHOD FOR MANAGING A MEMORY APPARATUS - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: recording valid/invalid page position information of at least one block; and moving valid data contained in at least a valid page of the block according to the valid/invalid page position information; where the block is an erasing unit. For example, the valid/invalid page position information may contain relative position information of the valid data in the block. More particularly, the valid/invalid page position information may contain a plurality of bits, the ranking of each bit may represent a page address offset of each page within the block, and each bit may respectively indicate whether each page in the block is valid or invalid. | 08-30-2012 |
20120331215 | METHOD FOR MANAGING A MEMORY APPARATUS, AND ASSOCIATED MEMORY APPARATUS THEREOF - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address linking table within the memory apparatus, wherein the local page address linking table includes linking relationships between physical page addresses and logical page addresses of a plurality of pages; and building a global page address linking table of the memory apparatus according to the local page address linking table. More particularly, the step of providing the block with the local page address linking table further includes: building a temporary local page address linking table for the local page address linking table corresponding to programming/writing operations of the memory apparatus; and temporarily storing the temporary local page address linking table in a volatile memory of the memory apparatus, and updating the temporary local page address linking table when needed. | 12-27-2012 |
20120331216 | METHOD FOR MANAGING A MEMORY APPARATUS, AND ASSOCIATED MEMORY APPARATUS THEREOF - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address linking table within the memory apparatus, wherein the at least one local page address linking table includes linking relationships between at least one physical page address of the at least one block and at least one logical page address; and building a global page address linking table of the memory apparatus according to the at least one local page address linking table. | 12-27-2012 |
20120331263 | METHOD FOR MANAGING A MEMORY APPARATUS - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: building at least one local page address linking table containing a page address linking relationship between a plurality of physical page addresses and at least a logical page address, wherein the local page address linking table includes a first local page address linking table containing a first page address linking relationship of a plurality of first physical pages, and a second local page address linking table containing a second page address linking relationship of a plurality of second physical pages that are different from the first physical pages; building a global page address linking table according to the local page address linking table; and accessing the memory apparatus according to the global page address linking table. | 12-27-2012 |
20120331267 | METHOD FOR MANAGING A MEMORY APPARATUS - A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: receiving a first access command from a host; analyzing the first access command to obtain a first host address; linking the first host address to a physical block; receiving a second access command from the host; and analyzing the second access command to obtain a second host address. For example, the method may further include: linking the second host address to the physical block, wherein a difference value of the first host address and the second host address is greater than a number of pages of the physical block. In another example, the method may further include: linking the first host address to at least a page of the physical block; and linking the second host address to at least a page of another physical block. | 12-27-2012 |