Patent application number | Description | Published |
20090207662 | Multi-Transistor Non-Volatile Memory Element - The present disclosure provides a multi-transistor element including a substrate, a first floating gate disposed on the substrate, a second floating gate disposed on the substrate and coupled to the first floating gate, and a first active region disposed in the substrate and coupled to the first and second floating gates. | 08-20-2009 |
20090303779 | Spin Torque Transfer MTJ Devices with High Thermal Stability and Low Write Currents - An integrated circuit structure includes a first fixed magnetic element; a second fixed magnetic element; and a composite free magnetic element between the first and the second fixed magnetic elements. The composite free magnetic element includes a first free layer and a second free layer. | 12-10-2009 |
20100214825 | Programming MRAM Cells Using Probability Write - A method of writing a magneto-resistive random access memory (MRAM) cell includes providing a writing pulse to write a value to the MRAM cell; and verifying a status of the MRAM cell immediately after the step of providing the first writing pulse. In the event of a write failure, the value is rewritten into the MRAM cell. | 08-26-2010 |
20100254181 | Raising Programming Currents of Magnetic Tunnel Junctions Using Word Line Overdrive and High-k Metal Gate - A method of operating magneto-resistive random access memory (MRAM) cells includes providing an MRAM cell, which includes a magnetic tunneling junction (MTJ) device; and a selector comprising a source-drain path serially coupled to the MTJ device. The method further includes applying an overdrive voltage to a gate of the selector to turn on the selector. | 10-07-2010 |
20100265759 | Raising Programming Current of Magnetic Tunnel Junctions by Applying P-Sub Bias and Adjusting Threshold Voltage - A method of operating magneto-resistive random access memory (MRAM) cells includes providing an MRAM cell, which includes a magnetic tunneling junction (MTJ) device and a word line selector having a source-drain path serially coupled to the MTJ device. A negative substrate bias voltage is connected to a body of the word line selector to increase the drive current of the word line selector. The threshold voltage of the word line selector is also reduced. | 10-21-2010 |
20120127788 | MRAM Cells and Circuit for Programming the Same - A circuit includes magneto-resistive random access memory (MRAM) cell and a control circuit. The control circuit is electrically coupled to the MRAM cell, and includes a current source configured to provide a first writing pulse to write a value into the MRAM cell, and a read circuit configured to measure a status of the MRAM cell. The control circuit is further configured to verify whether a successful writing is achieved through the first writing pulse. | 05-24-2012 |
20120281464 | Raising Programming Currents of Magnetic Tunnel Junctions Using Word Line Overdrive and High-k Metal Gate - A method of operating magneto-resistive random access memory (MRAM) cells includes providing an MRAM cell, which includes a magnetic tunneling junction (MTJ) device; and a selector comprising a source-drain path serially coupled to the MTJ device. The method further includes applying an overdrive voltage to a gate of the selector to turn on the selector. | 11-08-2012 |
20130155759 | Test Structures, Methods of Manufacturing Thereof, Test Methods, and MRAM Arrays - Test structures, methods of manufacturing thereof, test methods, and magnetic random access memory (MRAM) arrays are disclosed. In one embodiment, a test structure is disclosed. The test structure includes an MRAM cell having a magnetic tunnel junction (MTJ) and a transistor coupled to the MTJ. The test structure includes a test node coupled between the MTJ and the transistor, and a contact pad coupled to the test node. | 06-20-2013 |