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Chun-Chieh
Chun-Chieh Chang, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120068947 | TOUCH DETECTION METHOD AND TOUCH DETECTOR USING THE SAME - A method for double click detection includes the following steps. Firstly whether first event is detected is determined, if so, first corresponding position is obtained, a period counting is triggered, and first flag is set. Then whether the period ends is judged; if not and the first flag exists, a counter is incremented and second flag is set when first ending event is detected; if not and the second flag exists, second corresponding position is obtained and third flag is set when second event is detected; if not and the third flag exists, the counter is incremented when second ending event is detected; if so, a double click event is determined when the incremented value is greater than a threshold and a distance between the first and the second positions is smaller a threshold. | 03-22-2012 |
Chun-Chieh Chao, Yilan TW
| Patent application number | Description | Published |
|---|---|---|
| 20080231379 | Injection locker frequency divider - An injection locked frequency divider includes a ring oscillator, a first injection unit and a second injection unit. The ring oscillator includes a first delay cell and a second delay cell each including differential input terminals and differential output terminals. The differential input terminals and the differential output terminals of the first delay cell are respectively coupled to the differential output terminals and the differential input terminals of the second delay cell. The first injection unit connected between the differential output terminals of the first delay cell receives and injects a first injection signal to the differential output terminals of the first delay cell. The second injection unit connected between the differential output terminals of the second delay cell receives and injects a second injection signal to the differential output terminals of the second delay cell. | 09-25-2008 |
Chun-Chieh Chen, Taipei Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20100166194 | APPARATUS AND METHOD FOR PROCESSING AUDIO - In the specification and drawing an apparatus for processing audio is described and shown with an audio processor for acquiring at least one audio signal from an audio chip and transforming the audio signal into a surround sound signal and a transmitter for emitting the surround sound signal to a radio set. Moreover, a method for processing audio is also disclosed in the specification and drawing. | 07-01-2010 |
Chun-Chieh Chen, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090027409 | INTERFACE APPARATUS AND METHOD OF WRITING EXTENDED DISPLAY IDENTIFICATION DATA - An interface apparatus and a method of writing an extended display identification data (EDID) are provided. The interface apparatus includes a data processing unit, a memory unit and a switching unit. The memory unit is coupled to a connector corresponding to the memory unit and the data processing unit via the switching unit. When the interface apparatus is being initialized, the data processing unit detects whether or not the EDID stored in the memory unit is correct. If the EDID stored in the memory unit is incorrect, the data processing unit rewrites the EDID to the memory unit. | 01-29-2009 |
Chun-Chieh Chen, Chung Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20100259317 | HIGH-OUTPUT-IMPEDANCE CURRENT MIRROR - A current mirror with high output impedance for ensuring high accuracy current output comprises a first calibration circuit, a second calibration, a base circuit, a base current mirror, and an output circuit. The first calibration circuit further comprises plural MOS transistors and a first voltage. The second calibration circuit coupled with the first calibration circuit further comprises plural MOS transistors to calibrate the first calibration circuit. The base current mirror comprising two MOS transistors is coupled with both the first and the second calibration circuits via the base circuit. The output circuit with plural MOS transistors is coupled with the base circuit and the first calibration circuit. Upon an input current flows into the current mirror, the current mirror generates an output current which is several times in intensity than that of the input current. | 10-14-2010 |
Chun-Chieh Chen, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20110279962 | Support Frame and Electronic Apparatus - A support frame is adapted to provide support to a display device, and includes a pivot seat module, a first support module and a second support module. The pivot seat module is adapted to be mounted to the display device for rotation relative to the display device about a first axis passing through the display device. The first support module is coupled to the pivot seat module, and is disposed to form an angle with a backside of the display device for supporting the display device at a substantially upright position. The second support module is coupled to the pivot seat module, is pivotable relative to the pivot seat module about a second axis that is orthogonal to the first axis, and cooperates with the first support module to support the display device at a lying position. | 11-17-2011 |
Chun-Chieh Chuang, Chi-Lung TW
| Patent application number | Description | Published |
|---|---|---|
| 20100125252 | SAFETY SYRINGE - A safety syringe includes an outer barrel, a needle unit, an outer barrel plug, an inner barrel, an inner barrel plug, a needle clamper, and a vacuum generating device. The needle unit is disposed within the front end of the outer barrel. The outer barrel plug is disposed within the outer barrel; the outer barrel plug is connected with the needle unit so as to fix the needle unit. The inner barrel plug is disposed within the front end of the inner barrel. The needle clamper is connected with the inner barrel plug. The needle clamper is able to clamp a rear opening of the needle unit. The vacuum generating device is disposed within the inner barrel, and the needle unit can be retracted into the inner barrel by the low pressure which is generated by the vacuum generating device. | 05-20-2010 |
Chun-Chieh Fang, Tainan County TW
| Patent application number | Description | Published |
|---|---|---|
| 20090190629 | Temperature Sensing Device for Improving Series Resistance Cancellation Mechanism - A temperature sensing device for improving series resistance cancellation mechanism includes a temperature sensing unit, a signal processing unit, a first current source, a second current source, a third current source, a first switch, a second switch, and a third switch. A control circuit generates a first control signal, a second control signal and a third control signal for controlling the first current source, the second current source and the third current source so as to drive the temperature sensing unit, wherein the first control signal, the second control signal and the third control signal are outputted from the control circuit according to a specific cycle formed by a plurality of switches between the first control signal and the second control signal and a switch between the first control signal and the third control signal. | 07-30-2009 |
Chun-Chieh Lin, Hualien TW
| Patent application number | Description | Published |
|---|---|---|
| 20110059592 | NONVOLATILE MEMORY AND FABRICATION METHOD THEREOF - Non-volatile memories formed on a substrate and fabrication methods are disclosed. A bottom electrode comprising a metal layer is disposed on the substrate. A buffer layer comprising a LaNiO | 03-10-2011 |
Chun-Chieh Lin, Taichung TW
| Patent application number | Description | Published |
|---|---|---|
| 20090000908 | Systems and methods for buffering articles in transport - A system for buffering articles in transport is provided. The system comprises a buffer module configured to buffer articles and a computing system. The buffer module includes a first conveyor configured to transport the articles and a transference node configured to transfer the articles between the first conveyor and an external location. The computing system is configured to maintain an inventory list including a present location of each of the articles buffered by the buffer module. The computing system is further configured to control operation of the buffer module to transfer a selected article among the buffered articles to the external location. | 01-01-2009 |
| 20090017624 | Nodule Defect Reduction in Electroless Plating - An electroless plating method and the apparatus for performing the same are provided. The method includes providing a plating solution; contacting a front surface of the wafer with the plating solution; and incurring a plating reaction substantially simultaneously on an entirety of the front surface of the wafer. The step of incurring a plating reaction substantially simultaneously includes lift-dispense electroless plating and face-down immersion. | 01-15-2009 |
Chun-Chieh Lin, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080265256 | MOS devices with improved source/drain regions with SiGe - A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a SiGe region in the semiconductor substrate and adjacent the gate stack, wherein the SiGe region has a first atomic percentage of germanium to germanium and silicon; and a silicide region over the SiGe region. The silicide region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is substantially lower than the first atomic percentage. | 10-30-2008 |
| 20110256681 | MOS Devices with Improved Source/Drain Regions with SiGe - A method includes forming a gate stack over a semiconductor substrate, and forming a first silicon germanium (SiGe) region in the semiconductor substrate and adjacent the gate stack. The first SiGe region has a first atomic percentage of germanium to germanium and silicon. A second SiGe region is formed over the first SiGe region. The second SiGe region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is lower than the first atomic percentage, wherein the first and the second SiGe regions form a source/drain stressor of a metal-oxide-semiconductor (MOS) device. | 10-20-2011 |
Chun-Chieh Lin, Taichung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090035937 | In-Situ Deposition for Cu Hillock Suppression - A semiconductor interconnect structure having reduced hillock formation and a method for forming the same are provided. The semiconductor interconnect structure includes a conductor formed in a dielectric layer. The conductor includes at least three sub-layers, wherein the ratio of the impurity concentrations in neighboring sub-layers is preferably greater than about two. | 02-05-2009 |