Patent application number | Description | Published |
20110102339 | TOUCH SENSING METHOD AND ELECTRONIC DEVICE - A touch sensing method includes: scanning a plurality of first and second sensor lines, aligned in two different directions, of a touch sensor board; generating first and second indications based on the scan result, the first/second indication carrying information of at least one group of the first/second sensor lines that are adjacent to one another on the touch sensor board and that have detected a user's touch on the touch sensor board and of a number of the first/second sensor lines in the group; and generating a status signal that corresponds to a predetermined finger gesture at least based on a comparison result determined by comparing the number of the first sensor lines indicated by the first indication with the number of the second sensor lines indicated by the second indication. An electronic device that implements the touch sensing method is also disclosed. | 05-05-2011 |
20110247883 | TOUCH PAD - A touch pad including a printed circuit board, a plurality of column-conductor groups and a plurality of row-column groups. The printed circuit board is formed with an upper surface and a lower surface. The column-conductor groups include a plurality of first column-conductors and a plurality of second column-conductors. The row-conductor groups include a plurality of first row-conductors and a plurality of second row-conductors. The first column-conductors and the first row-conductors are provided on the upper surface. The second column-conductors and the second row-conductors are respectively provided on one and the other of the upper surface and the lower surface, and electrically connected to each other through column-vias and row-vias. Whereby the structure, the existing material and process can be still be used, and the problem of crossed wires can be avoided, also the yield of products can be increased with less waste of materials. | 10-13-2011 |
20120062480 | CAPACITIVE TOUCH SENSOR AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a capacitive touch sensor and a method for manufacturing the same. The capacitive touch sensor includes at least one transparent insulation substrate and at least one transparent capacitive touch conductor. The capacitive touch conductor is coated on the insulation substrate and formed with a boundary. The capacitive touch conductors are electrically connected to each other to form at least one first and second electrical-conductive set. At least one recess region is defined in the boundary. The recess region increases the light transmittance of the insulation substrate, reduces the necessary brightness of a light source for the capacitive touch pad, and saves the material cost. | 03-15-2012 |
20120212426 | TRANSPARENT TOUCH PAD AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a transparent touch pad and a method for manufacturing the same. The transparent touch pad includes a first transparent substrate, a second transparent substrate and an adhesion layer. The adhesion sides of the first transparent substrate and the second transparent substrate are respectively provided with a plurality of first sensing conductors and second sensing conductors and are adhered by the adhesion layer to form a transparent touch pad having two-dimensional arrangement of sensing conductors. Since the first transparent substrate has a low electrical resistance and the second transparent substrate is easy to process, the area of a visible region of the touch pad is increased and a lithographic process is no longer required. In this way, the structure of the touch pad is simplified and the production cost is reduced. | 08-23-2012 |
Patent application number | Description | Published |
20090034600 | Method for manufacturing an equalizer - A method for manufacturing an equalizer. The method first acquires a transmission line scattering-parameter, and a gain of the transmission line scattering-parameter at a frequency | 02-05-2009 |
20090183362 | Method for manufacturing a transmission line equalizer - A method for manufacturing an equalizer used to compensate a digital signal passed by a transmission line, in which the digital signal can be presented as a frequency-domain function. The method includes measuring a the transmission line scattering-parameter; performing an integration and a differentiation about the transmission line scattering-parameter, the frequency-domain function, the ideal gain, and an equalizer scattering-parameter to get the component impedances of the equalizer; and manufacturing the equalizer circuit with the derived component impedances. | 07-23-2009 |
20100007431 | SIGNAL TRANSMISSION STRUCTURE - A signal transmission structure includes two power planes, a signal line and a first pillar. The power planes spaced by an interval space provide a first voltage and a second voltage respectively. The signal line, disposed on first surfaces of the power planes, is disposed across the interval space. The first pillar is disposed within the interval space and is aside the signal line, in which the first pillar is apart from the power planes and the signal line. | 01-14-2010 |
20110095839 | PREVENTION STRUCTURE TO PREVENT SIGNAL LINES FROM TIME-SKEW - A prevention structure to prevent signal lines from time-skew is described. The prevention structure includes a plurality pairs of differential signal lines and a prevention line. The adjacent pairs of differential signal lines are separated from each other by a first gap. Each pair of the differential signal lines includes a positive signal line and a negative signal line each having a first line width. The prevention line has the second line width substantially equal to the first line width and is separated from the outmost differential signal line by a second distance substantially equal to the first distance. | 04-28-2011 |
Patent application number | Description | Published |
20110315533 | PRESS SWITCH - A press switch is composed of a base, a light-emitting device, a housing, a movable seat, and a pressing element. Due to the flat surfaces of the base and the ribs of the movable seat, the area of contact between the base and the movable seat is reduced. In addition, due to the ribs of the movable seat and the flat surfaces of the housing, the area of contact between the movable seat and the housing is also reduced. These reduced areas of contact allow the pressing element to be pressed stably and smoothly. | 12-29-2011 |
20120061227 | STRUCTURE OF PRESS SWITCH - An improved structure of a press switch includes a flexible flat cable connector provided in a base and connected to a circuit board. By pressing downward a housing of the improved structure, electrically conducting terminals on one lateral side of a movable seat are brought into contact with an electrically conducting element to establish electrical conduction. As the flat cable of the flexible flat cable connector is flexible, the pressing of the housing will not be hindered by the flexible flat cable, nor will the load of the pressing operation be increased. | 03-15-2012 |
20120061228 | ELECTRICALLY CONDUCTING STRUCTURE OF PRESS SWITCH - An electrically conducting structure of a press switch includes a flexible flat cable connector provided in a base and connected to a circuit board supported on a movable seat. By pressing a housing of the electrically conducting structure, an electrically conducting element located in a bottom portion of the movable seat is brought into contact with electrically conducting terminals in the base to establish electrical conduction. As the flat cable of the flexible flat cable connector is flexible, it does not add to the load experienced by the user when pressing the housing. | 03-15-2012 |
Patent application number | Description | Published |
20100301886 | TEST BOARD - A test board is provided. The test board includes a power connecting interface, diode modules, a power module a detecting module, and a processor. The power connecting interface includes power pins, wherein each of the power pins is electrically connected to a motherboard power socket to receive a power signal. Each of the diode modules is electrically connected to one of the power pins and includes at least one diode. The power module is electrically connected to the diode modules to receive the power signal through each of the diode modules. The detection module is electrically connected to points between the diode modules and the power connecting interface to generate a detection result according to the voltage between each diode module and the power connecting interface. The processor is used to determine the connecting state between the power pin and the corresponding motherboard power socket according to the detection result. | 12-02-2010 |
20110238346 | ELECTROSTATIC DISCHARGE AUTOMATIC DETECTION SYSTEM - The present invention provides an automatic electrostatic discharge (ESD) detection system connected to a plurality of current loops. For each of the current loops, the automatic ESD detection system can detect a plurality of electrical devices connected in sequence on the one current loop, and check if the electrical devices have abnormal ESD. The automatic ESD detection system includes a micro-controller, a plurality of circuit connection ports, a metrology unit, a circuit switching unit, a prompt unit, and two ground wires, wherein when one of the circuit connection ports is switched to be connected to the metrology unit, the one of the circuit connection ports remains electrically connected to one of the ground wires. | 09-29-2011 |
20140143511 | INTERFACE CONVERSION DEVICE AND STORAGE DEVICE USING THE SAME - An interface conversion device, applicable to a storage device, includes a first connection port, a second connection port, a measuring unit and a processing unit. The first connection port transmits a first signal and a power signal via a first communication interface. The second connection port transmits a second signal and the power signal to the storage device via a second communication interface. The first communication interface and the second communication interface are different from each other. The measuring unit receives the power signal from the first connection port to measure the power signal and produce a measurement signal. The measuring unit outputs the power signal to the second connection port. The processing unit receives and converts the first signal into the second signal and outputs the second signal via the second connection port. The processing unit receives the measurement signal to calculate a power consumption value. | 05-22-2014 |
Patent application number | Description | Published |
20100134942 | SURFACE-MOUNTED OVER-CURRENT PROTECTION DEVICE - A surface-mounted over-current protection device with positive temperature coefficient (PTC) behavior is disclosed. The surface-mounted over-current protection device comprises a first metal foil, a second metal foil corresponding to the first metal foil, a PTC material layer stacked between the first metal foil and the second metal foil, a first metal electrode, a first metal conductor electrically connecting the first metal foil to the first metal electrode, a second metal electrode corresponding to the first metal electrode, a second metal conductor electrically connecting the second metal foil to the second metal electrode, and at least one insulated layer to electrically insulate the first metal electrode from the second metal electrode. The surface-mounted over-current protection device, at 25° C., indicates that a hold current thereof divided by the product of a covered area thereof and the number of the conductive composite module is at least 0.16 A/mm | 06-03-2010 |
20110156859 | Over-current protection device - An over-current protection device comprises two metal foils and a positive temperature coefficient (PTC) material layer. The PTC material layer is sandwiched between the two metal foils and has a volume resistivity below 0.1 Ω-cm. The PTC material layer includes (i) plural crystalline polymers having at least one crystalline polymer of a melting point less than 115° C.; (ii) an electrically conductive nickel filler having a volume resistivity less than 500 μΩ-cm; and (iii) a non-conductive metal nitride filler. The electrically conductive nickel filler and non-conductive metal nitride filler are dispersed in the crystalline polymer. | 06-30-2011 |
20120182118 | OVER-CURRENT PROTECTION DEVICE AND METHOD FOR MANUFACTURING THE SAME - An over-current protection device includes a conductive composite having a first crystalline fluorinated polymer, a plurality of particulates, a conductive filler, and a non-conductive filler, wherein the plurality of particulates include a second crystalline fluorinated polymer. The first crystalline fluorinated polymer has a crystalline melting temperature of between 150 and 190 degrees Celsius. The plurality of particulates including the second crystalline fluorinated polymer are disposed in the conductive composite, having a crystalline melting temperature of between 320 and 390 degrees Celsius and having a particulate diameter of from 1 to 50 micrometers. The conductive filler and the non-conductive filler are dispersed in the conductive composite. | 07-19-2012 |
20130062045 | HEAT-CONDUCTIVE DIELECTRIC POLYMER MATERIAL AND HEAT DISSIPATION SUBSTRATE CONTAINING THE SAME - A heat-conductive dielectric polymer material includes a thermosetting epoxy resin, a nonwoven fiber component, a curing agent and a heat-conductive filler. The thermosetting epoxy resin is selected from the group consisting of end-epoxy-function group epoxy resin, side chain epoxy function group epoxy resin, multi-functional epoxy resin or the mixture thereof. The thermosetting epoxy resin comprises 4%-60% by volume of the heat-conductive dielectric polymer material. The curing agent is configured to cure the thermosetting epoxy resin at a curing temperature. The heat-conductive filler comprises 40%-70% by volume of the heat-conductive dielectric polymer material. The nonwoven fiber component comprises 1%-35% by volume of the heat-conductive dielectric polymer material. The heat-conductive dielectric polymer material has a thermal conductivity greater than 0.5 W/mK. | 03-14-2013 |
20130176654 | OVER-CURRENT PROTECTION DEVICE AND BATTERY PROTECTION CIRCUIT ASSEMBLY CONTAINING THE SAME - An over-current protection device is disposed on a circuit board and configured to protect a battery. The over-current protection device includes a resistive device, at least one insulation layer and a weld electrode layer. The resistive device exhibits positive temperature coefficient behavior. The insulation layer has a thickness of at least 0.03 mm. The weld electrode layer is configured to weld a strip interconnect member to electrically coupled to the battery, and has a thickness of at least 0.03 mm. The insulation layer and the resistive device are disposed between the weld electrode layer and the circuit board. The circuit board, the resistive device and the weld electrode layer are electrically coupled in series. The association of the resistive device and the weld electrode layer has a thermal mass capable of withstanding welding the strip interconnect member without significant damage to the over-current protection device. | 07-11-2013 |
Patent application number | Description | Published |
20100132978 | WHISKER-FREE COATING STRUCTURE AND METHOD OF FABRICATING THE SAME - A whisker-free coating structure and a method for fabricating the same are disclosed. The whisker-free coating structure includes a substrate, a tungsten doped copper layer overlaying the substrate, and a lead-free tin layer overlaying the tungsten doped copper layer. | 06-03-2010 |
20130108888 | APPLICATION OF METALLIC GLASS AND METALLIC GLASS THIN FILM COATING ON THE SHARPNESS ENHANCEMENT OF CUTTING TOOLS | 05-02-2013 |
20130244054 | COMPOSITE MATERIAL AND METHOD FOR IMPROVING FATIGUE PROPERTIES OF TITANIUM ALLOY BY COATING METALLIC GLASS LAYER - The invention provides a composite material, which includes a titanium alloy substrate and a metallic glass layer. The metallic glass layer is disposed on the titanium alloy substrate. The thickness of the metallic glass layer is 50 nm-200 nm, in which in comparison with the titanium alloy substrate, the fatigue life of the composite material of the invention is increased by 5-17 times. | 09-19-2013 |
20140353139 | APPLICATION OF METALLIC GLASS AND METALLIC GLASS THIN FILM COATING ON THE SHARPNESS ENHANCEMENT OF CUTTING TOOLS - A cutting tool having a metallic glass thin film (MGTF) coated thereon, a metallic glass cutting tool, and methods of fabricating the same are disclosed. The cutting tool having metallic glass thin film coated thereon comprises: a cutting element having a sharpened portion, and the cutting element is made of metal; and a metallic glass thin film coated on the cutting element, and the metallic glass is represented by the following formula 1 or formula 2, | 12-04-2014 |
Patent application number | Description | Published |
20100282504 | HIGH IMPEDANCE TRACE - A microwave conducting structure is described, in which a first electrically conductive layer, a first dielectric substrate with a first dielectric constant being arranged on the first electrically conductive layer, and at least one electrically conductive trace with a first width being arranged on or within the dielectric substrate are provided. A track of a second dielectric substrate having a second width being wider than the first width and a second dielectric constant being lower than the first dielectric constant, is arranged locally between the first dielectric substrate and the conductive trace so as to extend along the conductive trace such that the conductive trace operates electrically as being arranged on the second dielectric substrate. | 11-11-2010 |
20110125297 | METHOD FOR SETTING UP A LIST OF AUDIO FILES - A method for setting up a list of audio files and an audio re-production device utilizing the method for setting up the list of audio files are described. | 05-26-2011 |
20110258524 | GROUPING QUICK HYPERLINK - A hyperlink and navigation apparatus for providing a fast and flexible form of user navigation is presented. The hyperlink may be configured to simultaneously open multiple destinations when activated. The multiple destinations may include any number of applications or webpages. The hyperlink may also be user configurable to define the destinations associated with the hyperlink. | 10-20-2011 |
20120173994 | AUTOMATIC NOTIFICATION - A method may include displaying a document including a first item, receiving a first user input selecting the first item and receiving a second user input providing a target value associated with the first item. The method may also include accessing a site associated with the document, monitoring a value associated with the first item and determining whether the value associated with the first item meets the target value. The method may further include generating a notification when the value associated with the first item meets the target value. | 07-05-2012 |
Patent application number | Description | Published |
20120074590 | MULTIPLE BONDING IN WAFER LEVEL PACKAGING - The present disclosure provides a method for fabricating a MEMS device including multiple bonding of substrates. In an embodiment, a method includes providing a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, providing a semiconductor substrate including a second bonding layer, and providing a cap including a third bonding layer. The method further includes bonding the MEMS substrate to the semiconductor substrate at the first and second bonding layers, and bonding the cap to the semiconductor substrate at the second and third bonding layers to hermetically seal the MEMS substrate between the cap and the semiconductor substrate. A MEMS device fabricated by the above method is also provided. | 03-29-2012 |
20120091598 | HANDLING LAYER FOR TRANSPARENT SUBSTRATE - A device is provided which includes a transparent substrate. An opaque layer is disposed on the transparent substrate. A conductive layer disposed on the opaque layer. The opaque layer and the conductive layer form a handling layer, which may be used to detect and/or align the transparent wafer during fabrication processes. In an embodiment, the conductive layer includes a highly-doped silicon layer. In an embodiment, the opaque layer includes a metal. In embodiment, the device may include a MEMs device. | 04-19-2012 |
20120148870 | SELF-REMOVAL ANTI-STICTION COATING FOR BONDING PROCESS - A bond free of an anti-stiction layer and bonding method is disclosed. An exemplary method includes forming a first bonding layer; forming an interlayer over the first bonding layer; forming an anti-stiction layer over the interlayer; and forming a liquid from the first bonding layer and interlayer, such that the anti-stiction layer floats over the first bonding layer. A second bonding layer can be bonded to the first bonding layer while the anti-stiction layer floats over the first bonding layer, such that a bond between the first and second bonding layers is free of the anti-stiction layer. | 06-14-2012 |
20120261830 | MEMS DEVICE ETCH STOP - The present disclosure provides a micro-electro-mechanical systems (MEMS) device and a method for fabricating such a device. In an embodiment, a MEMS device includes a substrate, a dielectric layer above the substrate, an etch stop layer above the dielectric layer, and two anchor plugs above the dielectric layer, the two anchor plugs each contacting the etch stop layer or a top metal layer disposed above the dielectric layer. The device further comprises a MEMS structure layer disposed above a cavity formed between the two anchor plugs and above the etch stop layer from release of a sacrificial layer. | 10-18-2012 |
20130140653 | MEMS DEVICE ETCH STOP - The present disclosure provides a micro-electro-mechanical systems (MEMS) device and a method for fabricating such a device. In an embodiment, a MEMS device includes a substrate, a dielectric layer above the substrate, an etch stop layer above the dielectric layer, and two anchor plugs above the dielectric layer, the two anchor plugs each contacting the etch stop layer or a top metal layer disposed above the dielectric layer. The device further comprises a MEMS structure layer disposed above a cavity formed between the two anchor plugs and above the etch stop layer from release of a sacrificial layer. | 06-06-2013 |
20130203199 | Methods of Bonding Caps for MEMS Devices - A method includes bonding a first bond layer to a second bond layer through eutectic bonding. The step of bonding includes heating the first bond layer and the second bond layer to a temperature higher than a eutectic temperature of the first bond layer and the second bond layer, and performing a pumping cycle. The pumping cycle includes applying a first force to press the first bond layer and the second bond layer against each other. After the step of applying the first force, a second force lower than the first force is applied to press the first bond layer and the second bond layer against each other. After the step of applying the second force, a third force higher than the second force is applied to press the first bond layer and the second bond layer against each other. | 08-08-2013 |
20130208371 | BIOLOGICAL SENSING STRUCTURES AND METHODS OF FORMING THE SAME - A method of forming of biological sensing structures including a portion of a substrate is recessed to form a plurality of mesas in the substrate. Each of the plurality of mesas has a top surface and a sidewall surface. A first light reflecting layer is deposited over the top surface and the sidewall surface of each mesa. A filling material is formed over a first portion of the first light reflecting layer. A stop layer is deposited over the filling material and a second portion of the first light reflecting layer. A sacrificial layer is formed over the stop layer and is planarized exposing the stop layer. A first opening is formed in the stop layer and the first light reflecting layer. A second light reflecting layer is deposited over the first opening. A second opening is formed in the second light reflecting layer. | 08-15-2013 |
20130285170 | MULTIPLE BONDING IN WAFER LEVEL PACKAGING - A MEMS device is described. The device includes a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, a semiconductor substrate including a second bonding layer, and a cap including a third bonding layer, the cap coupled to the semiconductor substrate by bonding the second bonding layer to the third bonding layer. The first bonding layer includes silicon, the semiconductor substrate is electrically coupled to the MEMS substrate by bonding the first bonding layer to the second bonding layer, and the MEMS substrate is hermetically sealed between the cap and the semiconductor substrate. | 10-31-2013 |
20140054779 | Semiconductor Having a High Aspect Ratio Via - The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a via structure includes a via having via sidewall surfaces defined by a semiconductor substrate. The via sidewall surfaces have a first portion and a second portion. A conductive layer is disposed in the via on the first portion of the via sidewall surfaces, and a dielectric layer is disposed on the second portion of the via sidewall surfaces. The dielectric layer is disposed between the second portion of the via sidewall surfaces and the conductive layer. In an example, the dielectric layer is an oxide layer. | 02-27-2014 |
20140191341 | Method and Apparatus for a Semiconductor Structure - A semiconductor structure may include a first device having first surface with a first bonding layer formed thereon and a second device having a first surface with a second bonding layer formed thereon. The first bonding layer may provide an electrically conductive path to at least one electrical device in the first device. The second bonding layer may provide an electrically conductive path to at least one electrical device in the second device. One of the first or the second devices may include MEMS electrical devices. The first and/or the second bonding layers may be formed of a getter material, which may provide absorption for outgassing. | 07-10-2014 |
20150044759 | BIOLOGICAL SENSING STRUCTURES - A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa. | 02-12-2015 |
Patent application number | Description | Published |
20090184934 | Method For Determining The Number Of Fingers On A Sensing Device - A method for determining the number of fingers on a sensing device, which has a plurality of scanlines, includes the steps of: identifying the scanlines that generate a detecting signal, which has a value greater than a threshold value; finding adjacent ones of the scanlines; forming at least one group from the adjacent ones of the scanlines thus found; and counting the number of the scanlines in the at least one group thus formed in order to determine the number of fingers on the sensing device. | 07-23-2009 |
20110122072 | TOUCH DEVICE - A touch device includes a base and a touch pad. The base has an accommodating region and at least one first conductor. The touch pad is received in the accommodating region and subjected to a force to generate a changeable position relative to the base. The touch pad has a touch surface consist of a plurality of capacitive sensors and at least one second conductor conducted with at least one of the capacitive sensors. The second conductor is electrically conducted with the first conductor as the change of relative position between the touch pad and the base. Capacitances measured from the capacitive sensors are substantially different between the touch surface touched with a conductive object and the second conductor conducted with the first conductor, which is conducted to a fixed voltage, current or a ground. Therefore, a control unit connected to the capacitive sensors can generate different control signals from the connecting state between the first conductor and the second conductor. | 05-26-2011 |
20110227845 | METHOD FOR CONTROLLING AN ELECTRONIC DEVICE THAT INCLUDES A TOUCH PAD AND A DISPLAY SCREEN, AND THE ELECTRONIC DEVICE - A method for controlling an electronic device includes the steps of: upon detecting a single-object touch on a touch pad when the electronic device operates in a cursor mode, where movement of a cursor in a visual display displayed on the display screen is enabled and controlled in response to and in correspondence with a single-object sliding touch motion on the touch pad, configuring the electronic device to determine whether a time interval that the single-object touch remains substantially stationary on the touch pad reaches a predefined threshold value; and when it is determined that the time interval reaches the predefined threshold value, configuring the electronic device to exit the cursor mode and enter a scrolling mode, where scrolling of the visual display is enabled and controlled in response to and in correspondence with a single-object sliding touch motion on the touch pad. | 09-22-2011 |
20120206401 | HYBRID TOUCH PANEL DEVICE - A hybrid touch panel device includes a resistive touch panel and capacitive touch sensing panel having a single sensing electrode pattern. The resistive touch panel is operable to generate a press position signal in response to pressure detected thereby. The capacitive touch sensing panel is disposed on top of the resistive touch panel and is operable to generate a touch position signal in response to at least one touch action detected thereby. | 08-16-2012 |
20120262392 | PORTABLE ELECTRONIC DEVICE - A portable electronic device includes: a main module disposed in a main housing; a keyboard mounted on a mounting surface of the main housing and connected electrically to the main module; and a touch input unit mounted to the main housing and connected electrically to the main module. The touch input unit has first, second and third operating areas spaced apart from each other and exposed from the mounting surface of the main housing. The touch input unit generates an input signal corresponding to one touch point on any one of the first, second and third operating areas, and outputs the input signal to the main module such that the main module performs an operation corresponding to the input signal. | 10-18-2012 |
20120287078 | MULTI-TOUCH DETECTION METHOD AND DEVICE THEREOF - A multi-touch detection method and device thereof includes multiple first electrode rows spacedly intersecting with multiple second electrode rows. The first and second electrical signals are applied respectively to each first electrode row and each second electrode row to detect capacitance variations of the first and second electrode rows so as to select first and second candidate electrode rows from the first and second electrode rows based on the capacitance variations. Individual third electrical signals are applied respectively to the first candidate electrode rows to detect capacitance variations of the second candidate electrode rows so as to determine real touched points on the touch screen. | 11-15-2012 |
20120306755 | TOUCH KEYBOARD - A touch keyboard includes a touch panel that defines a plurality of touch input zones and that has opposite first and second surfaces, and an input member disposed on the first surface of the touch panel. The input member includes a body and a plurality of resilient key units disposed on the body. The resilient key units are separate from each other and protrude respectively from the body at positions corresponding to the touch input zones and are able to contact with the first surface of the touch panel during deformation thereof, respectively. | 12-06-2012 |
20120306756 | CAPACITIVE TOUCH KEYBOARD - A capacitive touch keyboard includes an insulating substrate that defines a plurality of press key zones, and a first and a second conductive layers, both disposed on the insulating substrate. Each conductive layer includes a plurality of electrode lines arranged in two different directions. Each electrode line includes a plurality of electrode units connected in series. Each electrode unit is disposed at a position corresponding to a respective one of the press key zones. For each of the press key zones, the electrode units of the first the second conductive layers that are disposed therein are adjacent to each other and cooperate to form a touch sensing structure. | 12-06-2012 |
20130050075 | CAPACITIVE POINTING DEVICE - A capacitive pointing device includes a capacitive sensor unit, a switch unit, and an operating unit. The capacitive sensor unit has a receiving space receiving the switch unit, and a plurality of capacitive sensors disposed around the receiving space. The operating unit is spaced apart from the capacitive sensors, and is configured to result in a capacitance effect with the capacitive sensors. The operating unit is movable toward the capacitive sensor unit to trigger the switch unit, and is movable horizontally relative to the capacitive sensors. Capacitance variation between the operating unit and each of the capacitive sensors is used for determining a moving direction and an amount of movement of the operating unit. | 02-28-2013 |
20130162531 | METHOD OF RECOGNIZING USER OPERATION AND CAPACITIVE POINTING DEVICE THEREOF - A method of recognizing user operation uses a capacitive pointing device. An original capacitance in the capacitive pointing device occurs when the capacitive pointing device is touched. The method includes the following steps of configuring the capacitive pointing device to detect a capacitance in the capacitive pointing device, and when the capacitance corresponds to the original capacitance, to implement an operation recognizing module to recognize the user operation by a duration of occurrence of the original capacitance, and to generate an operation command signal corresponding to the user operation determined thereby. | 06-27-2013 |
Patent application number | Description | Published |
20090073420 | Optical waveguide surface plasmon resonance sensor - An optical waveguide SPR sensor is adapted for differential measurement. The optical waveguide SPR sensor includes a base, a bottom layer, and at least one set of optical waveguide layers. The set of the optical waveguide layers includes a measuring optical waveguide channel and a reference optical waveguide channel. The measuring optical waveguide channel includes an SPR sensing film layer. The measuring optical waveguide channel and the reference optical waveguide channel are independently configured and substantially parallel one to another. The bottom layer has a refractive index higher than a refractive index of the optical waveguide layer. | 03-19-2009 |
20100227395 | CANINE TUMOR CELL AND ALLOGENEIC DENDRITIC CELL FUSED VACCINE AND METHOD FOR PREPARING THE SAME - The present invention provides a dendritic cell-based vaccine by fusing a canine tumor cell and an allogeneic dendritic cell, and a method for preparing the same. The fusion cells expressing canine tumor antigens are generated by fusing canine bone marrow-derived dendritic cells and canine tumor cells. The canine immune system can be induced to produce tumor specific T lymphocytes and natural killer cells when the fusion cells used as a vaccine is injected into a canine body. | 09-09-2010 |
20110275081 | BIOMARKER FOR DIAGNOSIS OF CANINE CANCER - The present invention is related to a biomarker for diagnosis of canine cancer, wherein the biomarker is KMO (kynureinie 3-monooxygenase) gene, and the canine cancers including CTVT (canine transmissible venereal tumor) and MGT (mammary gland tumor). The expression level of KMO gene in canine malignant tumor tissues is up-regulated as compared with benign tissues. Furthermore, the expression level of KMO gene in malignant tumor tissue is higher than in the non-metastasis tumor tissue. By detection of the expression level of the present invention biomarker in suspecting tissue specimen, malignancy of tumor tissues can be determined correctly and rapidly. | 11-10-2011 |
Patent application number | Description | Published |
20110233621 | Wafer Level Packaging Bond - The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum. | 09-29-2011 |
20120025389 | Hermetic Wafer Level Packaging - Provided is a wafer level packaging. The packaging includes a first semiconductor wafer having a transistor device and a first bonding layer that includes a first material. The packaging includes a second semiconductor wafer having a second bonding layer that includes a second material different from the first material, one of the first and second materials being aluminum-based, and the other thereof being titanium-based. Wherein a portion of the second wafer is diffusively bonded to the first wafer through the first and second bonding layers. | 02-02-2012 |
20120080761 | SEMICONDUCTOR HAVING A HIGH ASPECT RATIO VIA - A semiconductor device includes a substrate wafer, a dielectric layer overlying the substrate wafer, a patterned conductor layer in the dielectric layer, and a first barrier layer overlying the conductor layer. A silicon top wafer is bonded to the dielectric layer. A via is formed through the top wafer and a portion of the dielectric layer to the first barrier layer. A sidewall dielectric layer is formed along inner walls of the via, adjacent the top wafer to a distance below an upper surface of the top wafer, forming a sidewall dielectric layer shoulder. A sidewall barrier layer is formed inward of the sidewall dielectric layer, lining the via from the first barrier layer to the upper surface of the top wafer. A conductive layer fills the via and a top barrier layer is formed on the conductive layer, the sidewall barrier layer, and the top wafer. | 04-05-2012 |
20120235300 | SEMICONDUCTOR HAVING A HIGH ASPECT RATIO VIA - The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a via structure includes a via having via sidewall surfaces defined by a semiconductor substrate. The via sidewall surfaces have a first portion and a second portion. A conductive layer is disposed in the via on the first portion of the via sidewall surfaces, and a dielectric layer is disposed on the second portion of the via sidewall surfaces. The dielectric layer is disposed between the second portion of the via sidewall surfaces and the conductive layer. In an example, the dielectric layer is an oxide layer. | 09-20-2012 |
20120238091 | SEMICONDUCTOR HAVING A HIGH ASPECT RATIO VIA - The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a method for forming a via structure includes forming a via in a semiconductor substrate, wherein via sidewalls of the via are defined by the semiconductor substrate; forming a dielectric layer on the via sidewalls; removing the dielectric layer from a portion of the via sidewalls; and forming a conductive layer to fill the via, wherein the conductive layer is disposed over the dielectric layer and the portion of the via sidewalls. In an example, the dielectric layer is an oxide layer. | 09-20-2012 |
20140138853 | WAFER LEVEL PACKAGING BOND - A device is described in one embodiment that includes a micro-electro-mechanical systems (MEMS) device disposed on a first substrate and a semiconductor device disposed on a second substrate. A bond electrically connects the MEMS device and the semiconductor device. The bond includes an interface between a first bonding layer including silicon on the first substrate and a second bonding layer including aluminum on the second substrate. The physical interface between the aluminum and silicon (e.g., amorphous silicon) can provide an electrical connection. | 05-22-2014 |
20140154841 | Hermetic Wafer Level Packaging - Provided is a wafer level packaging. The packaging includes a first semiconductor wafer having a transistor device and a first bonding layer that includes a first material. The packaging includes a second semiconductor wafer having a second bonding layer that includes a second material different from the first material, one of the first and second materials being aluminum-based, and the other thereof being titanium-based. Wherein a portion of the second wafer is diffusively bonded to the first wafer through the first and second bonding layers. | 06-05-2014 |
Patent application number | Description | Published |
20100133686 | CHIP PACKAGE STRUCTURE - A chip package includes a die, a pad-mounting surface on the die, a plurality of bonding pad arranged at the pad-mounting surface, at least one dielectric layer cover over the pad-mounting surface, and at least one conductive wire set in the dielectric layer. The formation of the conductive wire consists of a plurality of steps. Coat a first dielectric layer on the pad-mounting surface and a slot is formed on each bonding pad correspondingly. Then coat a second dielectric layer and produce a wiring slot corresponding to each bonding pad and the slot thereof. Next each wiring slot is filled with electrically conductive metal so as to form a conductive wire. Later Coat a third dielectric layer and a corresponding slot is formed on one end of each conductive wire while this slot is filled with electrically conductive metal to form a solder point. The above steps can further be repeated so as to form an upper-layer and a lower-layer conductive wire. Thereby precision of the chip package, use efficiency of the wafer and yield rate of manufacturing processes are all improved. | 06-03-2010 |
20100244200 | Integrated circuit connecting structure having flexible layout - A wafer has a cutting part filled with a connecting medium. After the wafer is cut into chips along the cutting part, two contacts on two surfaces of the chip can be connected through corresponding leading wires and the connecting medium. Thus, the chip can have a flexible layout. | 09-30-2010 |
20110143536 | Method for Making an Aperture in a Carrier and Electrically Connecting Two Opposite Faces of the Carrier - Disclosed is a method for making an aperture in a carrier and electrically connecting two opposite faces of the carrier. At first, a carrier is provided. Secondly, a heater is provided for heating a portion of the carrier in an environment rich in oxygen, thus making an aperture in the carrier and forming an isolative layer on the wall of the aperture synchronously. Finally, the aperture is filled with a conductive material. | 06-16-2011 |
20110176021 | Image-Processing Integrated Circuit - An image-processing integrated circuit includes an image-processing die, a conductive layer, first optical units and a second optical unit. The conductive layer is provided on a face of the image-processing die. The first optical units are provided on an opposite face of the image-processing die. The second optical unit is provided on the first optical units. | 07-21-2011 |
20110260300 | Wafer-Bump Structure - A wafer-bump structure includes a wafer-state semiconductor die, a pre-treatment layer, a first ENIG laminate and at least one pillar bump. The wafer-state semiconductor die includes at least one die pad embedded therein and a passivation layer formed on the wafer-state semiconductor die and the die pad. The passivation layer includes an aperture for allowing access to a portion of the die pad. The pre-treatment layer is formed on the un-covered portion of the die pad. The first ENIG laminate is formed on the pre-treatment layer and an annular portion of the passivation layer around the pre-treatment layer. The pillar bump includes a conductive metal layer and a second ENIG laminate. The conductive metal layer is formed on the first ENIG laminate and another annular portion of the passivation layer around the first ENIG laminate. The second ENIG laminate is formed on the conductive metal layer and another annular portion of the passivation layer around the conductive metal layer. | 10-27-2011 |
20120074558 | Circuit Board Packaged with Die through Surface Mount Technology - A package of a circuit board and a die are packed through surface mount technology (SMT). The shortest circuit is formed with at a low cost. Thus, the package can work in high speed and high frequency applications. | 03-29-2012 |
20120196438 | CHIP PACKAGE STRUCTURE - The formation of the conductive wire of a chip package consists of a plurality of steps. Coat a first dielectric layer on the pad-mounting surface and a slot is formed on each bonding pad correspondingly. Then coat a second dielectric layer and produce a wiring slot corresponding to each bonding pad and the slot thereof. Next each wiring slot is filled with electrically conductive metal so as to form a conductive wire. Later Coat a third dielectric layer and a corresponding slot is formed on one end of each conductive wire while this slot is filled with electrically conductive metal to form a solder point. The above steps can further be repeated so as to form an upper-layer and a lower-layer conductive wire. Thereby precision of the chip package, use efficiency of the wafer and yield rate of manufacturing processes are all improved. | 08-02-2012 |
Patent application number | Description | Published |
20090199021 | POWER MANAGEMENT MODULE FOR CENTRAL PROCESSING UNIT - A power management module for a CPU is provided. The power management module includes a basic input/output system (BIOS) chip, a power stripping module, and a DC-DC converter module. The BIOS chip is coupled to the CPU, and has a power consumption information of the CPU. The power stripping module is coupled to BIOS chip, and is adapted for outputting a power control signal according to the power consumption information of the CPU. The DC-DC converter module is coupled to the CPU and the power stripping module. The DC-DC converter module includes a plurality of DC-DC converters. The power control signal is accorded to determine a quantity of the DC-DC converters for enabling, so as to provide a suitable power to the CPU. | 08-06-2009 |
20110302429 | SERVER RACK SYSTEM - A rack system for a server includes a number of server units, which includes first to the third sets of server units, voltage converter, first to third power supply circuits. The voltage converter receives and converters a three-phase alternating current (AC) power signal to provide first to third single-phase power signals. The first to the third sets of power supply circuits respectively provides first to third direct current (DC) power signals according to the first to the third single-phase power signals. The first set to the third set of server units is respectively powered by first to the third DC power signals or respectively powered by first part, second part, and third part of the first to the third DC power signals. | 12-08-2011 |
20120327591 | RACK SERVER SYSTEM - A rack server system includes a number of server units and a rack. The rack server includes a back plane, a control module, a fan module and a power supply module. The back plane includes a number of slots, via which the server units are respectively connected to the back plane. The fan module is connected to the control module, and dissipates heat generated by the server units under the control of the control module. The power supply module is connected to the control module, and powers the server units under the control of the control module. | 12-27-2012 |
20130010787 | RACK SERVER SYSTEM - A rack server system controlled by a remote controller includes a number of server units and a middle plane board. Each of the server units includes a baseboard management controller (BMC), a server-end connector, and a server-end switch, coupled to the BMC and the server-end connector for regulating communication operation therebetween. The middle plane board includes an integrated connector and a plane-end switch, coupled to the server-end switches of each of the server units and the integrated connector for regulating communication operation thereamong. The remote controller is coupled to the rack server system via one of the integrated connector and the server-end connectors and manages the communication operation of the server units. | 01-10-2013 |
20130039001 | SERVER SYSTEM - A server system includes a rack, a power supply module, a switch, and a plurality of servers. The rack can be divided into a plurality of rack units. The rack units are parallel to each other and vertically arranged. The power supply module and the switch are disposed in close proximity to each other in at least one of the rack units. The power supply is adjacent to the rear side of the rack. The switch is adjacent to the front side of the rack. Each of the servers is disposed in one of the other rack units and electrically connected to the power supply module and the switch. | 02-14-2013 |
20130179718 | SERVER RACK SYSTEM AND POWER MANAGEMENT METHOD APPLICABLE THERETO - A server rack system including a plurality of power supply units, a monitoring circuit, a rack management controller (RMC), and a plurality of server nodes is provided. The monitoring circuit is for monitoring the power supply units. The RMC is for monitoring the power supply units. When the monitoring circuit and/or the RMC finds that at least one of the power supply units failed to output a normal voltage, an operation status of the server nodes is lowered or at least one of the server nodes is forcibly shut down. | 07-11-2013 |
20150071646 | RACK SERVER - Provided herein is a rack server including a rack, a plurality of system boards and a fan plate. The system boards are disposed within the rack, and each system board has a first wireless transceiver. The fan plate is also disposed within the rack, and the fan plate has a plurality of second transceivers, and the second transceivers are wirelessly connected to the first transceivers, respectively. | 03-12-2015 |
Patent application number | Description | Published |
20120133506 | MOBILE POSITIONING APPARATUS, SERVER, AND MOBILE POSITIONING METHOD THEREOF - A mobile positioning apparatus, a server, and a mobile positioning method are provided. The mobile positioning apparatus can catch an environment image of the mobile positioning apparatus, retrieve a positioning marker from the environment image, and receive the positioning data from the server. Then the mobile positioning apparatus can calculate a current position of the mobile positioning apparatus according to the positioning marker and the positioning data. | 05-31-2012 |
20120136619 | COLLISION DETECTING METHOD, ELECTRONIC DEVICE, AND COMPUTER PROGRAM PRODUCT THEREOF - A collision detecting method, an electronic device, and a computer program product thereof are provided for the electronic device having an accelerometer, a positioning module, and a communication module. The method includes obtaining a plurality of acceleration variations within each of a plurality of sampling intervals respectively detected by the accelerometer. The method also includes transforming the corresponding acceleration variations into a plurality of frequency domain signals for each sampling interval, and calculating energy and entropy of the frequency domain signals. The method further includes determining a collision has occurred if the energy and the entropy corresponding to each of a plurality of specific sampling intervals among the sampling intervals both drastically increase then drastically decrease suddenly. | 05-31-2012 |