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Chu, Singapore
Ern Tang Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090289861 | RADIO FREQUENCY COMMUNICATION DEVICES AND METHODS - One embodiment relates to a circuit for efficient wireless communication. The circuit includes an antenna feed and a plurality of communication paths stemming from the antenna feed, where different communication paths are associated with different frequency bands. The circuit also includes a shunt coupled to the antenna feed and adapted to selectively divert power from the antenna feed as a function of shunt control signal. Other methods and systems are also disclosed. | 11-26-2009 |
Ern Teng Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090291647 | RADIO FREQUENCY COMMUNICATION DEVICES AND METHODS - One embodiment relates to a circuit for efficient wireless communication. The circuit includes a communication port adapted to be coupled to an antenna feed. Multiple communication paths stem from the communication port, where different communication paths are associated with different frequency bands. Multiple phase shift selection circuits are respectively associated with the multiple communication paths. The phase shift selection circuits have different respective impedances relative to the communication port and the respective impedances vary for the different frequency bands. Other methods and systems are also disclosed. | 11-26-2009 |
| 20100056204 | RADIO FREQUENCY COMMUNICATION DEVICES AND METHODS - One embodiment relates to a circuit for efficient wireless communication. The circuit includes an antenna interface module adapted to receive multiple frequency components via an antenna. Multiple reception paths stem from the antenna interface module, where different reception paths are associated with different frequency components. The circuit also includes multiple filter elements having inputs respectively coupled to the multiple reception paths. At least two of the filter elements cooperatively form a differential output signal based on their respective frequency components. Other methods and systems are also disclosed. | 03-04-2010 |
Feng Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20080320014 | Discriminative Feature Selection System Using Active Mining Technique - A discriminative feature set (DFS) selection method is described wherein a forward wrapper framework and a self error-correction concept are used. In this approach, the first feature is selected using a statistical measure. After that, the feature that aims to correct the errors made by the current feature set is selected using a measure called correction score (CS) and is subsequently added into the feature set. This error-corrective feature-adding process stops until a required number of features are included into the DFS or a pre-defined accuracy is achieved. According to different levels of error correction, this method has three derivatives for different tasks and data. The speediness and adaptability of this approach make it efficient and effective for high-dimensional discriminative feature selection. | 12-25-2008 |
Justin Jan Hann Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090092622 | MOLECULES, COMPOSITIONS, METHODS AND KITS FOR APPLICATIONS ASSOCIATED WITH FLAVIVIRUSES - A method for controlling a flavivirus entry into a cell, kits for assaying the flavivirus entry into the cell, and methods of treating and preventing flaviviruses infections are disclosed, together with vaccine and pharmaceutical compositions. | 04-09-2009 |
| 20110117118 | MOLECULES, COMPOSITIONS, METHODS AND KITS FOR APPLICATIONS ASSOCIATED WITH FLAVIVIRUSES - A method for controlling a flavivirus entry into a cell, kits for assaying the flavivirus entry into the cell, and methods of treating and preventing flaviviruses infections are disclosed, together with vaccine and pharmaceutical compositions. | 05-19-2011 |
Meng Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20080303561 | Frequency divider including latch circuits - A frequency divider is disclosed herein. The frequency divider includes a first latch circuit and a second latch circuit coupled to the first latch circuit. Each of the first latch circuit and the second latch circuit includes a first level for generating a source current, a second level for receiving a pair of input signals and for generating a pair of output signals, and a third level for receiving the source current and a pair of clock signals. The second level is coupled between the first level and the third level. The first level includes a first transistor having a source terminal and a substrate both coupled to a source voltage. The third level includes a plurality of transistors controlled by the pair of clock signals. Each transistor in the third level has a source terminal and a substrate both coupled to ground. | 12-11-2008 |
Sanford Shao-Fu Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100120244 | INTEGRATED CIRCUIT SHIELD STRUCTURE AND METHOD OF FABRICATION THEREOF - A method of forming an integrated circuit is disclosed. The method includes providing a substrate and forming on the substrate a shield structure comprising a shield member and a ground strap. The shield member comprises a non-metallic portion, and the ground strap comprises a metallic portion. | 05-13-2010 |
Shao-Fu Sanford Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090294904 | INTEGRATED CIRCUIT SYSTEM EMPLOYING BACK END OF LINE VIA TECHNIQUES - An integrated circuit system that includes: providing a substrate including front-end-of-line circuitry; forming a first metallization layer over the substrate and electrically connected to the substrate; forming a viabar or a via group over the first metallization layer; and forming a second metallization layer over the first metallization layer and electrically connected to the first metallization layer through either the viabar or the via group. | 12-03-2009 |
| 20100109097 | INTEGRATED CIRCUIT SYSTEM EMPLOYING AN ELEVATED DRAIN - A method for manufacturing an integrated circuit system that includes: providing a substrate including an active device; forming a drift region in the substrate, the drift region bounded in part by a top surface of the substrate and spaced apart from a source; and forming a drain above the drift region. | 05-06-2010 |
| 20100295153 | INTEGRATED CIRCUIT SYSTEM WITH HIERARCHICAL CAPACITOR AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being formed without a finger via; forming a second group of metal layers including a first finger, a second finger, and a finger via over the first group of metal layers utilizing a second design rule that is larger than the first design rule; and interconnecting the first group of metal layers with the second group of metal layers to form a capacitor. | 11-25-2010 |
| 20100320529 | INTEGRATED CIRCUIT SYSTEM WITH HIGH VOLTAGE TRANSISTOR AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit system includes: providing a semiconductor substrate having an active region, implanted with impurities of a first type at a first concentration; forming an isolation region around the active region; forming a parasitic transistor by applying a gate electrode, implanted with impurities of a second type at a second concentration, over the active region and the isolation region; and applying an isolation edge implant, with the impurities of the first type at a third concentration greater than or equal to the second concentration, for suppressing the parasitic transistor. | 12-23-2010 |
Wa Chu, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100199529 | FASTENING DEVICE FOR SYSTEM IRONS - A system iron comprises an iron and a base that has a receiving area for receiving the iron. The base comprises a fastening device for fastening the iron to the base. The fastening device includes a first engagement member and a second engagement member arranged at mutually opposite sides of the receiving area. At least one of the engagement members is displaceable in a direction away from the other engagement member and is biased towards the other engagement member. With such a fastening device, a user can safely and conveniently lock the iron to the base using just one of his hands for gripping the main grip portion of the iron. | 08-12-2010 |