Patent application number | Description | Published |
20100070751 | Preloader - This disclosure describes techniques and/or apparatuses for reducing the total time used to boot up a computer and load applications onto the computer. | 03-18-2010 |
20100174934 | Hibernation or Suspend Using a Non-Volatile-Memory Device - This disclosure describes techniques for using a non-volatile-memory device such as flash memory to store memory data during hibernation or suspend. By so doing, hard drives and/or data are safer, and less power may be used. | 07-08-2010 |
20100254173 | DISTRIBUTED FLASH MEMORY STORAGE MANAGER SYSTEMS - A flash memory storage system may include several modules of flash memory storage manager circuitry, each having some associated flash memory. The modules may be interconnected via the flash memory storage manager circuitry of the modules. The system may be able to write data to and/or read data from the flash memory associated with various ones of the modules by routing the data through the flash memory storage circuitry of the modules. The system may also be able to relocate data for various reasons using such read and write operations. The flash memory storage circuitry of the modules keeps track of where data actually is in the flash memory. | 10-07-2010 |
20110068836 | SPREAD-SPECTRUM CLOCK ACQUISITION AND TRACKING - Apparatus having corresponding methods and computer-readable media comprise: a phase detector configured to generate an error signal representing a phase difference between a recovered spread-spectrum clock signal and a serial data stream that includes a spread-spectrum clock signal; and a phase selector configured to provide the recovered spread-spectrum clock signal based on an error signal from a current spread-spectrum cycle of the spread-spectrum clock signal and an error signal from a previous spread-spectrum cycle of the spread-spectrum clock signal. | 03-24-2011 |
20110119438 | FLASH MEMORY FILE SYSTEM - Apparatus having corresponding methods and computer-readable media comprise: a plurality of flash modules, wherein each of the flash modules comprises a cache memory; a flash memory; and a flash controller in communication with the cache memory and the flash memory; wherein the flash controller of a first one of the flash modules is configured to operate the cache memories together as a global cache; wherein the flash controller of a second one of the flash modules is configured to operate a second one of the flash modules as a directory controller for the flash memories. | 05-19-2011 |
20120327697 | DISTRIBUTED FLASH MEMORY STORAGE MANAGER SYSTEMS - A flash memory storage system may include several modules of flash memory storage manager circuitry, each having some associated flash memory. The modules may be interconnected via the flash memory storage manager circuitry of the modules. The system may be able to write data to and/or read data from the flash memory associated with various ones of the modules by routing the data through the flash memory storage circuitry of the modules. The system may also be able to relocate data for various reasons using such read and write operations. The flash memory storage circuitry of the modules keeps track of where data actually is in the flash memory. | 12-27-2012 |
20130046966 | Preloader - This disclosure describes techniques and/or apparatuses for reducing the total time used to boot up a computer and load applications onto the computer. | 02-21-2013 |
20130159595 | Serial Interface for FPGA Prototyping - In aspects of serial interface for FPGA prototyping, an advanced crossbar interconnect (AXI) bridge structure enables serial data communication between field programmable gate arrays (FPGA) in a system-on-chip (SoC). The AXI bridge structure includes a parallel interface configured to receive AXI data signals from an AXI component implemented at a first FPGA. A transmit (TX) engine is configured to packetize the AXI data signals into an AXI data packet, and transmit the AXI data packet to a second FPGA via a serial link. The AXI bridge structure also includes a receive (RX) engine configured to receive an additional AXI data packet from the second FPGA via the serial link, and extract AXI data signals from the additional AXI data packet. The parallel interface is further configured to provide the additional AXI data signals to the AXI component. | 06-20-2013 |
20150058383 | SYSTEMS AND METHODS FOR OPERATING A FLASH MEMORY FILE SYSTEM - A flash memory file system including a plurality of flash modules. Each of the plurality of flash modules includes a respective cache memory, a respective flash memory, and a respective flash controller in communication with the respective cache memory and the respective flash memory. A first flash module of the plurality of flash modules is configured to receive a file lookup message including a path name for file data stored on a second flash module of the plurality of flash modules. A third flash module of the plurality of flash modules is configured to select the second flash module based on the path name and a directory table, and generate a file metadata message responsive to the file lookup message. The file metadata message identifies the second flash module as containing the file data. | 02-26-2015 |
Patent application number | Description | Published |
20130128193 | Displays with Multilayer Masks and Color Filters - An electronic device may have a display such as a liquid crystal display. The display may have multiple layers of material such as a color filter layer and a thin-film transistor layer. An opaque masking layer may be formed on a display layer such as the color filter layer. In an inactive portion of the display, the opaque masking layer may form a rectangular ring that serves as a border region surrounding a rectangular active portion of the display. In the active portion of the display, the opaque masking layer may be patterned to from an opaque matrix that separates color filter elements in an array of color filter elements. The opaque masking layer and color filter elements may be formed from polymers such as photoresist. The opaque masking layer may include a black pigment such as carbon black. Color filter elements and opaque masking material may include multiple sublayers. | 05-23-2013 |
20130234919 | DEVICES AND METHODS FOR DISCHARGING PIXELS HAVING OXIDE THIN-FILM TRANSISTORS - Methods and devices for discharging a pixel of an electronic display to be turned off are provided. In one example, a method may include supplying an activation signal to the pixel to activate the pixel. The method may also include supplying a data signal of substantially ground to a pixel electrode of the pixel. The method may include controlling a common electrode voltage of the pixel toward substantially ground. The method may also include removing the activation signal from the pixel after the common electrode voltage reaches substantially ground. | 09-12-2013 |
20140063422 | DEVICES AND METHODS TO COMPENSTE FOR IMAGE COLOR VARIANCE DUE TO DISPLAY TEMPERATURES - Methods and devices to compensate for image color variance due to display temperatures are provided. In one example, a display of an electronic device may include a first pixel section that has multiple pixels. The pixels may include a red subpixel, green subpixel, and blue subpixel that each has a respective aperture ratio. The display may also include a second pixel section that has multiple pixels. Again, the pixels may include a red subpixel, green subpixel, and blue subpixel that each has a respective aperture ratio. One or more of the subpixel aperture ratios of the first pixel section may be greater than a respective one or more of the subpixel aperture ratios of the second section to overcome image color variance that may exist due to temperature variations of the display. | 03-06-2014 |
20140071177 | SUBTRACTIVE COLOR BASED DISPLAY WHITE POINT CALIBRATION - Systems, methods, and devices for white point calibration using subtractive color measurements are provided. Specifically, a white point of a display may be calibrated using subtractive color measurements rather than merely additive color measurements. In one example, a display having red, green, and blue pixels may measure the responses in a subtractive color space (e.g., CMY) rather than additive color space (e.g., RGB). Measurements of the display response using subtractive color space may involve providing image data to two or more color channels at once. Thus, any crosstalk effect between channels may be accounted for, even though the same crosstalk effect might not be apparent using additive color measurements in which only a single channel color channel were measured. | 03-13-2014 |
Patent application number | Description | Published |
20090206676 | ULTRASOUND TRANSMIT PULSE GENERATOR - A ultrasound transmit pulse waveform generator for driving a piezoelectric transducer in medical ultrasound imaging, nondestructive testing (NDT) ultrasound imaging applications, includes a capacitor, switching programmable current sources, and a power amplifier. | 08-20-2009 |
20100201428 | HIGH VOLTAGE ANALOG MULTIPLEX SWITCH INTEGRATED CIRCUIT ARCHITECTURE - An integrated circuit high voltage analog switch has digital logic-level control interface circuit. A level translator is coupled to the digital logic-level control interface circuit. A plurality of output multi-channel high voltage switches is coupled to the level translator. | 08-12-2010 |
20120007216 | Multi-Chip Package Module And A Doped Polysilicon Trench For Isolation And Connection - A circuit module comprises a die attach pad with a surface and a plurality of leads surrounding the surface. A nonconductive adhesive is on the surface. A plurality of electronic circuit dies are on the surface of the die attach pad. Each die has a top surface and a bottom surface with the bottom surface on the adhesive. The top surface has a plurality of bonding pads. A first electronic circuit die has at least one routing path of a conductive material connecting a first bonding pad to a second bonding pad. A first bonding wire connects a bonding pad of a second electronic circuit die to the first bonding pad of the first electronic die. A second bonding wire connects the second bonding pad of the first electronic circuit die to a lead. Where one of the dies contains vertical circuit element, where a doped layer forms a terminal along the bottom surface of the layer, a trench filled with doped polysilicon extends from the top surface to the terminal to connect to the terminal. The doped polysilicon filled trench also serves to isolate and separate different circuit elements. | 01-12-2012 |
20140049299 | PROGRAMMABLE ULTRASOUND TRANSMIT BEAMFORMER INTEGRATED CIRCUIT AND METHOD - An electrical waveform generating circuit has a programmable current source-driver. A digital switched current source is coupled to the programmable current source-driver and controlled by waveforms stored in the programmable current source-driver. A plurality of MOSFETs is coupled to the programmable current source driver. A first coupled inductor is connected to the plurality of high voltage MOSFETs. A transducer is coupled to the first coupled inductor. | 02-20-2014 |
20150049577 | ULTRASOUND CAPACITIVE T/R SWITCH DEVICE, CIRCUIT - An ultrasound image system has a plurality of channels. At least one of the plurality of channels has a capacitive T/R switch. | 02-19-2015 |
20150070034 | CAPACITIVE PARAMETRIC ZERO CROSSING DETECTOR DEVICE, CIRCUIT AND METHOD - A capacitive parametric zero crossing detection circuit has a nonlinear voltage controlled capacitive device coupled to an input voltage to convert a zero crossing current pulse into zero crossing voltage signal. | 03-12-2015 |
20150098307 | PULSE AMPLITUDE CONTROLLED CURRENT SOURCE FOR ULTRASOUND TRANSMIT BEAMFORMER AND METHOD THEREOF - An electrical waveform generating circuit has a pair of Pulse Amplitude Controlled Switching Current Sources (PACS). A gate pulse driver circuit is coupled to an input of each of the pair of PACS for sending gate pulses for driving the pair of PACS. A digital-to-analog converter (DAC) circuit is coupled to the gate pulse driver circuit for controlling amplitudes of the gate pulses. A transducer is coupled to the PACS. | 04-09-2015 |
Patent application number | Description | Published |
20130086210 | MOBILE APPLICATION, IDENTITY RELATIONSHIP MANAGEMENT - Techniques for managing identities are provided. In some examples, identity management, authentication, authorization, and token exchange frameworks may be provided for use with mobile devices, mobile applications, cloud applications, and/or other web-based applications. For example a mobile client may request to perform one or more identity management operations associated with an account of a service provider. Based at least in part on the requested operation and/or the particular service provider, an application programming interface (API) may be utilized to generate and/or perform one or more instructions and/or method calls for managing identity information of the service provider. | 04-04-2013 |
20130086211 | MOBILE APPLICATION, RESOURCE MANAGEMENT ADVICE - Techniques for a resource management advice service are provided. In some examples, resource management advice and/or instructions may be provided for use with mobile devices, mobile applications, cloud applications, and/or other web-based applications. For example a mobile client may request to perform one or more resource management operations associated with a service provider. Based at least in part on the requested operation and/or the particular service provider, advice and/or instructions for managing the resource may be provided. | 04-04-2013 |
20130086639 | MOBILE APPLICATION, IDENTITY INTERFACE - Techniques for managing identities are provided. In some examples, identity management, authentication, authorization, and token exchange frameworks may be provided for use with mobile devices, mobile applications, cloud applications, and/or other web-based applications. For example a mobile client may request to perform one or more identity management operations associated with an account of a service provider. Based at least in part on the requested operation and/or the particular service provider, an application programming interface (API) may be utilized to generate and/or perform one or more instructions and/or method calls for managing identity information of the service provider. | 04-04-2013 |
20150089569 | BUNDLED AUTHORIZATION REQUESTS - A framework, which conforms to the OAuth standard, involves a generic OAuth authorization server that can be used by multiple resource servers in order to ensure that access to resources stored on those resource servers is limited to access to which the resource owner consents. Each resource server registers, with the OAuth authorization server, metadata for that resource server, indicating scopes that are recognized by the resource server. The OAuth authorization server refers to this metadata when requesting consent from a resource owner on behalf of a client application, so that the consent will be of an appropriate scope. The OAuth authorization server refers to this metadata when constructing an access token to provide to the client application for use in accessing the resources on the resource server. The OAuth authorization server uses this metadata to map issued access tokens to the scopes to which those access tokens grant access. | 03-26-2015 |
20150089571 | PLUGGABLE AUTHORIZATION POLICIES - A framework, which conforms to the OAuth standard, involves a generic OAuth authorization server that can be used by multiple resource servers in order to ensure that access to resources stored on those resource servers is limited to access to which the resource owner consents. Each resource server registers, with the OAuth authorization server, metadata for that resource server, indicating scopes that are recognized by the resource server. The OAuth authorization server refers to this metadata when requesting consent from a resource owner on behalf of a client application, so that the consent will be of an appropriate scope. The OAuth authorization server refers to this metadata when constructing an access token to provide to the client application for use in accessing the resources on the resource server. The OAuth authorization server uses this metadata to map issued access tokens to the scopes to which those access tokens grant access. | 03-26-2015 |
20150089596 | USING REPRESENTATIONAL STATE TRANSFER (REST) FOR CONSENT MANAGEMENT - A framework, which conforms to the OAuth standard, involves a generic OAuth authorization server that can be used by multiple resource servers in order to ensure that access to resources stored on those resource servers is limited to access to which the resource owner consents. Each resource server registers, with the OAuth authorization server, metadata for that resource server, indicating scopes that are recognized by the resource server. The OAuth authorization server refers to this metadata when requesting consent from a resource owner on behalf of a client application, so that the consent will be of an appropriate scope. The OAuth authorization server refers to this metadata when constructing an access token to provide to the client application for use in accessing the resources on the resource server. The OAuth authorization server uses this metadata to map issued access tokens to the scopes to which those access tokens grant access. | 03-26-2015 |
20150089597 | MULTIPLE RESOURCE SERVERS INTERACTING WITH SINGLE OAUTH SERVER - A framework, which conforms to the OAuth standard, involves a generic OAuth authorization server that can be used by multiple resource servers in order to ensure that access to resources stored on those resource servers is limited to access to which the resource owner consents. Each resource server registers, with the OAuth authorization server, metadata for that resource server, indicating scopes that are recognized by the resource server. The OAuth authorization server refers to this metadata when requesting consent from a resource owner on behalf of a client application, so that the consent will be of an appropriate scope. The OAuth authorization server refers to this metadata when constructing an access token to provide to the client application for use in accessing the resources on the resource server. The OAuth authorization server uses this metadata to map issued access tokens to the scopes to which those access tokens grant access. | 03-26-2015 |
20150089623 | SERVICE PROFILE-SPECIFIC TOKEN ATTRIBUTES AND RESOURCE SERVER TOKEN ATTRIBUTE OVERRIDING - A framework, which conforms to the OAuth standard, involves a generic OAuth authorization server that can be used by multiple resource servers in order to ensure that access to resources stored on those resource servers is limited to access to which the resource owner consents. Each resource server registers, with the OAuth authorization server, metadata for that resource server, indicating scopes that are recognized by the resource server. The OAuth authorization server refers to this metadata when requesting consent from a resource owner on behalf of a client application, so that the consent will be of an appropriate scope. The OAuth authorization server refers to this metadata when constructing an access token to provide to the client application for use in accessing the resources on the resource server. The OAuth authorization server uses this metadata to map issued access tokens to the scopes to which those access tokens grant access. | 03-26-2015 |
20150310202 | MOBILE APPLICATION, IDENTITY INTERFACE - Techniques for managing identities are provided. In some examples, identity management, authentication, authorization, and token exchange frameworks may be provided for use with mobile devices, mobile applications, cloud applications, and/or other web-based applications. For example a mobile client may request to perform one or more identity management operations associated with an account of a service provider. Based at least in part on the requested operation and/or the particular service provider, an application programming interface (API) may be utilized to generate and/or perform one or more instructions and/or method calls for managing identity information of the service provider. | 10-29-2015 |
Patent application number | Description | Published |
20090174475 | Smart linearized power amplifier and related systems and methods - A power amplifier subsystem that includes a first stage amplifier and a second stage amplifier. A first bias circuit is coupled to the first stage amplifier, and the first bias circuit has a variable impedance that increases with radio frequency (RF) power. A second bias circuit is coupled to the second stage amplifier, and the second bias circuit has impedance relatively fixed with respect to radio frequency (RF) power. According to an embodiment of the invention, the first bias circuit comprises a transistor having a collector current that increases as radio frequency (RF) power increases. The second bias circuit can have a relatively fixed impedance. A method of designing an amplifier subsystem, where transistor size and resistor values are selected to obtain the desired bias and linearity characteristics, or transistor size and resistor values are selected to operate within a selected range, and amplifier performance is adjusted by changing the bias control voltage. | 07-09-2009 |
20140036471 | Thin Leadframe QFN Package Design of RF Front-Ends for Mobile Wireless Communication - Systems and methods are disclosed herein for a low cost, compact size, and thin half-etched leadframe quad-flat no-leads (QFN) package that integrates RF passive elements in the QFN leadframe for linearized PA design and RF FEMs. The integrated RF passive elements in the QFN leadframe may include RF inductors (e.g., meanders lines or spirals) for amplifier bias or RF matching, extension bar of the ground paddle for inter-stage matching or jumper pads for connection. The integrated RF passive elements may also include transmission lines for output power matching, coupled line structures such as RF couplers, RF divider or combiner realized using transmission lines with proper impedance and length, jumper pads for adjusting the bond wire length, etc. The RF parameters of the integrated passive elements are adjustable using different length and number of wire bond for fine tuning the performance of the PAM or the RF FEM. | 02-06-2014 |
Patent application number | Description | Published |
20100046265 | Separate CAM Core Power Supply For Power Saving - A CAM system includes an integrated circuit chip having: logic & control circuitry, a CAM cell array, read/write access circuitry that performs read and write accesses to the CAM cell array, comparison access circuitry that performs comparison operations to the CAM cell array, a first voltage supply pad coupled to the read/write access circuitry; and a second voltage supply pad coupled to the comparison access circuitry. A first voltage supply, external to the integrated circuit chip, provides a first supply voltage to the first voltage supply pad, wherein the logic & control circuitry is powered by the first supply voltage. A second voltage supply, external to the integrated circuit chip, provides a second supply voltage to the second voltage supply pad, wherein at least a portion of the comparison access circuitry is powered by the second supply voltage, wherein the second supply voltage is less than the first supply voltage. | 02-25-2010 |
20100232194 | Content Addressable Memory Having Bidirectional Lines That Support Passing Read/Write Data And Search Data - A CAM column structure includes an interface that drives search data to a plurality of CAM cells via a search line pair. The CAM cells are divided into sections, each section including: a set of CAM cells, a bit line pair coupled to the set of CAM cells, a sense amplifier coupled to the bit line pair, a tri-state read buffer configured to drive read data from the sense amplifier to the search line pair, and a pair of tri-state write buffers configured to drive write data from the search line pair to the bit line pair. In one embodiment, the pair of tri-state write buffers is replaced by a pair of switches that couple the search line pair to the sense amplifier. The search line pair may be segmented by tri-state buffers, which are controlled to drive the search, read and write data along the search line pair. | 09-16-2010 |
20100271854 | Ternary Content Addressable Memory Having Reduced Leakage Effects - A column of ternary content addressable memory (TCAM) cells includes a bit line pair that is twisted at a location at or near the center of the column. Data is written to (and read from) TCAM cells located above the twist location with a first bit line polarity. Data is written to (and read from) TCAM cells located below the twist location with a second bit line polarity, opposite the first bit line polarity. As a result, read leakage currents introduced by TCAM cells storing ‘Don't Care’ values are reduced. | 10-28-2010 |