| Patent application number | Description | Published |
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| 20090035927 | METHOD OF FORMING DIELECTRIC LAYERS ON A SUBSTRATE AND APPARATUS THEREFOR - Methods of forming dielectric layers on a substrate comprising silicon and oxygen are disclosed herein. In some embodiments, a method of forming a dielectric layer on a substrate includes provide a substrate having an exposed silicon oxide layer; treating an upper surface of the silicon oxide layer with a plasma; and depositing a silicon nitride layer on the treated silicon oxide layer via atomic layer deposition. The silicon nitride layer may be exposed to a plasma nitridation process. The silicon oxide and silicon nitride layers may be subsequently thermally annealed. The dielectric layers may be used as part of a gate structure. | 02-05-2009 |
| 20090090952 | PLASMA SURFACE TREATMENT FOR SI AND METAL NANOCRYSTAL NUCLEATION - A device, such as a nonvolatile memory device, and methods for forming the device in an integrated process tool are provided. The method includes depositing a tunnel oxide layer on a substrate, exposing the tunnel oxide layer to a plasma so that the plasma alters a morphology of a surface and near surface of the tunnel oxide to form a plasma altered near surface. Nanocrystals are then deposited on the altered surface of the tunnel oxide. | 04-09-2009 |
| 20090311877 | POST OXIDATION ANNEALING OF LOW TEMPERATURE THERMAL OR PLASMA BASED OXIDATION - Embodiments of the present invention provide methods of forming oxide layers on semiconductor substrates. In some embodiments, a method of forming an oxide layer on a semiconductor substrate includes forming an oxide layer on a substrate using an oxidation process having a first process gas at a first temperature less than about 800 degrees Celsius; and annealing the oxide layer formed on the substrate in the presence of a second process gas and at a second temperature. The oxidation process may be a plasma or thermal oxidation process performed at a temperature of about 800 degrees Celsius or below. In some embodiments, the post oxidation annealing process may be a spike or soak rapid thermal process, a laser anneal, or a flash anneal performed at a temperature of at least about 700 degrees Celsius, at least about 800 degrees Celsius, or at least about 950 degrees Celsius. | 12-17-2009 |
| 20100055905 | METHOD OF FORMING AN ALUMINUM OXIDE LAYER - Methods of forming aluminum oxide layers on substrates are disclosed. In some embodiments, the method includes depositing an aluminum oxide seed layer on the substrate using a first process having a first deposition rate. The method further includes depositing a bulk aluminum oxide layer atop the seed layer using a metalorganic chemical vapor deposition (MOCVD) process having a second deposition rate greater than the first deposition rate. | 03-04-2010 |
| 20100075499 | METHOD AND APPARATUS FOR METAL SILICIDE FORMATION - Embodiments described herein include methods of forming metal silicide layers using a diffusionless annealing process. In one embodiment a method for forming a metal silicide material on a substrate is provided. The method comprises depositing a metal material over a silicon containing surface of a substrate, depositing a metal nitride material over the metal material, depositing a metallic contact material over the metal nitride material, and exposing the substrate to a diffusionless annealing process to form a metal silicide material. The short time-frame of the diffusionless annealing process reduces the time for the diffusion of nitrogen to the silicon containing interface to form silicon nitride thus minimizing the interfacial resistance. | 03-25-2010 |
| 20100120245 | PLASMA AND THERMAL ANNEAL TREATMENT TO IMPROVE OXIDATION RESISTANCE OF METAL-CONTAINING FILMS - Method and apparatus are provided for treatment of a deposited material layer. In one embodiment, a method is provided for processing a substrate including depositing a metal-containing layer using an atomic layer deposition technique, exposing the metal-containing layer to a plasma treatment process at a temperature of less than about 200° C., and exposing the metal-containing layer to a thermal anneal process at a temperature of about 600° C. or greater. The plasma treatment process and/or the thermal anneal process may use a nitrating gas, which may form a passivating surface or layer with the metal-containing layer. | 05-13-2010 |
| 20100216317 | Methods for Forming Conformal Oxide Layers on Semiconductor Devices - Methods and apparatus for forming an oxide layer on a semiconductor substrate are disclosed. In one or more embodiments, plasma oxidation is used to form a conformal oxide layer by controlling the temperature of the semiconductor substrate at below about 100° C. Methods for controlling the temperature of the semiconductor substrate according to one or more embodiments include utilizing an electrostatic chuck and a coolant and gas convection. | 08-26-2010 |
| 20100248435 | METHOD OF SELECTIVE NITRIDATION - Methods of forming semiconductor devices are provided herein. In some embodiments, a method of forming a semiconductor device may include providing a substrate having an oxide surface and a silicon surface; forming a nitrogen-containing layer on exposed portions of both the oxide and silicon surfaces; and oxidizing the nitrogen-containing layer to selectively remove the nitrogen-containing layer from atop the oxide surface. In some embodiments, an oxide layer is formed atop a remaining portion of the nitrogen-containing layer formed on the silicon feature. In some embodiments, the oxide surface is an exposed surface of a shallow trench isolate region (STI) disposed adjacent to one or more floating gates of a semiconductor device. In some embodiments, the silicon surface is an exposed surface of a silicon or polysilicon floating gate of a semiconductor device. | 09-30-2010 |
| 20100267247 | Dual Frequency Low Temperature Oxidation of a Semiconductor Device - Methods and apparatus for forming an oxide layer on a semiconductor substrate are disclosed. A two frequency plasma source is used to form a plasma in a plasma reactor. In various embodiments, different quantities of power are supplied to a power source operating at the first frequency and a power source operating at the second frequency over time. | 10-21-2010 |
| 20100267248 | Post Treatment Methods for Oxide Layers on Semiconductor Devices - Methods and apparatus for post treating an oxide layer on a semiconductor substrate are disclosed. In one or more embodiments, the oxide layer is formed by thermal oxidation or plasma oxidation and treated with a plasma comprising helium. The helium-containing plasma may also include hydrogen, neon, argon and combinations thereof. In one or more embodiments, a SiO | 10-21-2010 |
| 20100311203 | Passivation process for solar cell fabrication - Embodiments of the invention contemplate the formation of a high efficiency solar cell using a novel plasma oxidation process to form a passivation film stack on a surface of a solar cell substrate. In one embodiment, the methods include providing a substrate having a first type of doping atom on a back surface of the substrate and a second type of doping atom on a front surface of the substrate, plasma oxidizing the back surface of the substrate to form an oxidation layer thereon, and forming a silicon nitride layer on the oxidation layer. | 12-09-2010 |
| 20100330814 | METHODS OF FORMING OXIDE LAYERS ON SUBSTRATES - Methods for processing substrates are provided herein. In some embodiments, a method for processing a substrate includes providing a substrate having an oxide layer disposed thereon, the oxide layer including one or more defects; and exposing the oxide layer to a plasma formed from a process gas comprising an oxygen-containing gas to repair the one or more defects. In some embodiments, the oxide layer may be formed on the substrate. In some embodiments, forming the oxide layer further comprises depositing the oxide layer atop the substrate. In some embodiments, forming the oxide layer further comprises thermally oxidizing the surface of the substrate to form the oxide layer. In some embodiments, a processing temperature is maintained at about 700 degrees Celsius or below during the thermal oxidation of the surface. | 12-30-2010 |
| 20110061810 | Apparatus and Methods for Cyclical Oxidation and Etching - Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device. | 03-17-2011 |
| 20110061812 | Apparatus and Methods for Cyclical Oxidation and Etching - Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device. | 03-17-2011 |
| 20110065276 | Apparatus and Methods for Cyclical Oxidation and Etching - Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device. | 03-17-2011 |
| 20110101442 | Multi-Layer Charge Trap Silicon Nitride/Oxynitride Layer Engineering with Interface Region Control - A non-volatile memory semiconductor device comprising a semiconductor substrate having a channel and a gate stack above the channel. The gate stack comprises a tunnel layer adjacent to the channel, a charge trapping layer above the tunnel layer, a charge blocking layer above the charge trapping layer, a control gate above the charge blocking layer, and an intentionally incorporated interface region between the charge trapping layer and the charge blocking layer. The charge trapping layer comprises a compound including silicon and nitrogen, the charge blocking layer contains an oxide of a charge blocking component, and the interface region comprises a compound including silicon, nitrogen and the charge blocking component. The tunnel layer may comprise up to three tunnel sub-layers, the charge trapping layer may comprise two trapping sub-layers, and the charge blocking layer may comprise up to five blocking sub-layers. Various gate stack formation techniques can be employed. | 05-05-2011 |
