Patent application number | Description | Published |
20080259334 | MULTI LAYER ALIGNMENT AND OVERLAY TARGET AND MEASUREMENT METHOD - A target system for determining positioning error between lithographically produced integrated circuit fields on at least one lithographic level. The target system includes a first target pattern on a lithographic field containing an integrated circuit pattern, with the first target pattern comprising a plurality of sub-patterns symmetric about a first target pattern center and at a same first distance from the first target pattern center. The target system also includes a second target pattern on a different lithographic field, with the second target pattern comprising a plurality of sub-patterns symmetric about a second target pattern center and at a same second distance from the second target pattern center. The second target pattern center is intended to be at the same location as the first target pattern center. The centers of the first and second target patterns may be determined and compared to determine positioning error between the lithographic fields. | 10-23-2008 |
20090011346 | FOCUS BLUR MEASUREMENT AND CONTROL METHOD - A method for optimizing imaging and process parameter settings in a lithographic pattern imaging and processing system. The method includes correlating the dimensions of a first set of at least one control pattern printed in a lithographic resist layer, measured at three or more locations on or within the pattern which correspond to differing dose, defocus and blur sensitivity. The method then includes measuring the dimensions on subsequent sets of control patterns, printed in a lithographic resist layer, at three or more locations on or within each pattern, of which a minimum of three locations match those measured in the first set, and determining the effective dose, defocus and blur values associated with forming the subsequent sets of control patterns by comparing the dimensions at the matching locations with the correlated dependencies. | 01-08-2009 |
20090053627 | METHODS AND SYSTEMS FOR NORMALIZING ERROR - A method for fabricating parts using a photolithography system, includes: performing a search of normalization data for an estimated dose operating point; and using the estimated dose operating point for fabrication of new parts. Other methods are provided. | 02-26-2009 |
20110058170 | MULTI LAYER ALIGNMENT AND OVERLAY TARGET AND MEASUREMENT METHOD - A target system for determining positioning error between lithographically produced integrated circuit fields on at least one lithographic level. The target system includes a first target pattern on a lithographic field containing an integrated circuit pattern, with the first target pattern comprising a plurality of sub-patterns symmetric about a first target pattern center and at a same first distance from the first target pattern center. The target system also includes a second target pattern on a different lithographic field, with the second target pattern comprising a plurality of sub-patterns symmetric about a second target pattern center and at a same second distance from the second target pattern center. The second target pattern center is intended to be at the same location as the first target pattern center. The centers of the first and second target patterns may be determined and compared to determine positioning error between the lithographic fields. | 03-10-2011 |
20110069314 | MULTILAYER ALIGNMENT AND OVERLAY TARGET AND MEASUREMENT METHOD - A target system for determining positioning error between lithographically produced integrated circuit fields on at least one lithographic level. The target system includes a first target pattern on a lithographic field containing an integrated circuit pattern, with the first target pattern comprising a plurality of sub-patterns symmetric about a first target pattern center and at a same first distance from the first target pattern center. The target system also includes a second target pattern on a different lithographic field, with the second target pattern comprising a plurality of sub-patterns symmetric about a second target pattern center and at a same second distance from the second target pattern center. The second target pattern center is intended to be at the same location as the first target pattern center. The centers of the first and second target patterns may be determined and compared to determine positioning error between the lithographic fields. | 03-24-2011 |
Patent application number | Description | Published |
20090186286 | Method To Control Semiconductor Device Overlay Using Post Etch Image Metrology - A method of determining positioning error between lithographically produced integrated circuit patterns on at least two different lithographic levels of a semiconductor wafer comprising. The method includes exposing, developing and etching one or more lithographic levels to create one or more groups of marks comprising a target at one or more wafer locations. The method then includes exposing and developing a subsequent group of marks within the target on a subsequent lithographic level. The method then comprises measuring the position of the marks on each level with respect to a common reference point, and using the measured positions of the groups of marks to determine the relative positioning error between one or more pairs of the developed and etched lithographic levels on which the marks are located. | 07-23-2009 |
20100190096 | TARGET AND METHOD FOR MASK-TO-WAFER CD, PATTERN PLACEMENT AND OVERLAY MEASUREMENT AND CONTROL - A method for mask-to-wafer correlation among multiple masking levels of a semiconductor manufacturing process. The method includes creating compact targets containing structure patterns suitable for pattern placement, critical dimension and overlay measurement at a set of common locations on two or more patterning layers, and creating at least two masks containing functional circuit structure patterns and the compact targets at locations between functional circuit structure patterns. The method then includes measuring the targets, determining overlay variation between the masks, exposing and creating with one mask a first lithographic processing layer on a wafer, and exposing and creating with another mask a second lithographic processing layer on the wafer, over the first layer. The method further includes measuring the targets on the wafer at one or more of the layers, and correlating the mask and wafer measurements to distinguish mask and lithography induced components of critical dimension and overlay variation. | 07-29-2010 |
20120191236 | DISCRETE SAMPLING BASED NONLINEAR CONTROL SYSTEM - System, method and computer program product including instructions executed by a processor system for configuring and controlling a facility to perform a manufacturing process and updating a tool controlling the process according to a model employed for mapping calculated coefficients that characterize non-linear variations observed of a product to actual control parameters governing the processes/tools used by the facility during the manufacturing process. In a semiconductor manufacturing process, the method enables real-time control of variation in an exposure step of a patterning process using an exposure tool to minimize a nonlinear variation in one or more pattern attributes by adjusting the exposure tool or the patterning process corresponding to the calculated coefficients. In the method, measurements of product attributes, obtained by finite sampling over a well defined domain (e.g., a region such as a field/wafer in lithographic patterning), are projected onto a predefined reference mesh spanning the domain, using a physically based model comprised of functions constructed to be orthogonal and normalized over a discrete set of reference mesh locations. | 07-26-2012 |
Patent application number | Description | Published |
20130041494 | ALIGNMENT DATA BASED PROCESS CONTROL SYSTEM - Deformation of a substrate due to one or more processing steps is determined by measuring substrate alignment data at lithographic processing steps before and after the one or more processing steps. Any abnormal pattern in the alignment data differential is identified by comparing the calculated alignment data differential with previous data accumulated in a database. By comparing the abnormal pattern with previously identified tool-specific patterns for alignment data differential, a processing step that introduces the abnormal pattern and/or the nature of the abnormal processing can be identified, and appropriate process control measures can be taken to rectify any anomaly in the identified processing step. | 02-14-2013 |
20130044320 | Self-Calibrated Alignment and Overlay Target and Measurement - An alignment feature disposed on a substrate, the alignment feature including a first lithographic pattern having a first aggregate geometric center point defined by a first sub-pattern comprising alignment marks having a first sub-pattern geometric center point arranged a distance (d | 02-21-2013 |
20140065733 | DISCRETE SAMPLING BASED NONLINEAR CONTROL SYSTEM - System, method and computer program product for configuring and controlling a facility to perform a manufacturing process and updating a tool controlling the process according to a model employed for mapping calculated coefficients that characterize non-linear variations observed of a product to actual control parameters governing the processes/tools used by the facility during the manufacturing process. The method enables real-time control of variation in an exposure step of a patterning process using an exposure tool to minimize a nonlinear variation in one or more pattern attributes by adjusting the exposure tool or the patterning process corresponding to the calculated coefficients. In the method, measurements of product attributes, obtained by finite sampling over a well defined domain, are projected onto a predefined reference mesh spanning the domain, using a physically based model comprised of functions constructed to be orthogonal and normalized over a discrete set of reference mesh locations. | 03-06-2014 |
20150048525 | METROLOGY MARKS FOR UNIDIRECTIONAL GRATING SUPERPOSITION PATTERNING PROCESSES - Cut spacer reference marks, targets having such cut spacer reference marks, and methods of making the same by forming spacer gratings around grating lines on a first layer, and fabricating an angled template mask that extends across and resides at an angle with respect to such spacer gratings. Angled, cut spacer gratings are etched into a second layer using the angled template mask to superimpose at least a portion of the spacer gratings of the first layer into the second layer. | 02-19-2015 |
20150050755 | METROLOGY MARKS FOR BIDIRECTIONAL GRATING SUPERPOSITION PATTERNING PROCESSES - Cut spacer reference marks, targets having such cut spacer reference marks, and methods of making the same by forming spacer gratings around grating lines on a first layer, and fabricating a template mask that extends across and perpendicular to such spacer gratings. Cut spacer gratings are etched into a second layer using the template mask to superimpose at least a portion of the spacer gratings of the first layer into the second layer. | 02-19-2015 |