| Patent application number | Description | Published |
| 20090210185 | System and method for measuring DC offset in a sensor output by modulating a signal-independent operating parameter of the sensor - A sensor circuit enables detection of DC offset in a sensor output signal. The sensor circuit includes a sensor that generates a sensor output signal corresponding to a physical signal coupled to an input of the sensor, and a modulator that generates a modulation signal, the modulator being coupled to the sensor to modulate a physical parameter of the sensor and to enable a DC offset to be separated from the sensor output signal. To enable the circuit to measure the DC offset even though the sensor output signal is inversely proportional to the output signal, the circuit includes a feedback circuit configured to generate a feedback signal. The feedback signal is coupled to the input of the sensor to enable the physical parameter of the sensor to be modulated without modulating a portion of the sensor output signal attributable to the physical signal being converted to an electrical signal by the sensor. | 08-20-2009 |
| 20090273499 | SYSTEM AND METHOD FOR IMPROVING LINEARITY OF ELECTRONIC CIRCUITS WITH MECHANICAL OSCILLATORS - A system converts an analog input signal to an output signal in a very linear manner using very low chip area and very low power consumption. The system includes a micro electromechanical oscillating signal source for generating a linearly varying oscillating signal, an analog signal generator coupled to the micro electromechanical oscillating signal source, the analog signal generator being configured to convert the linearly varying oscillating signal to an electrical analog signal, a minimum transistor circuit having an input for receiving an analog signal, a switch that selectively couples the electrical analog signal to the input of the minimum transistor circuit, the minimum transistor circuit being configured to process the electrical analog signal and generate digital output values, an error detection circuit coupled to the minimum transistor circuit to detect non-linearity errors in the digital output values, and a linearity correction circuit coupled to the error detection circuit, the linearity correction circuit being configured to compensate for the non-linearity errors detected by the error detection circuit. | 11-05-2009 |
| 20100090724 | System And Method For Removing Nonlinearities And Cancelling Offset Errors In Comparator Based/Zero Crossing Based Switched Capacitor Circuits - A method compensates for errors in an output signal of a comparator based/zero crossing based circuit. The method includes generating with a comparator based/zero crossing based switched capacitor circuit a first output signal with an input signal, generating with the comparator based/zero crossing based switched capacitor circuit a second output signal with the input signal of an opposite polarity, and subtracting the second output signal from the first output signal to generate a final output signal for the comparator based/zero crossing based switched capacitor circuit. | 04-15-2010 |
| 20100103012 | Multi-Stage Resettable Sigma-Delta Converters - A resettable multi-stage sigma-delta analog-to-digital (A/D) converter enables a sampled analog signal to be resolve with fewer cycles than a resettable single sigma-delta A/D converter. The resettable multi-stage converter includes a cascade of at least two resettable sigma-delta loops having a total number of integrators and an allocation of delays, a digital decimation filter, the digital decimation filter being coupled to the at least two resettable sigma-delta loops and the digital decimation filter includes a cascade of integrators, a number of the integrators in the cascade of integrators for the decimation filter being equal to the total number of integrators in the cascade of at least two resettable sigma-delta loops and an allocation of delays in the cascade of integrators being equal to the allocation of delays in the cascade of at least two resettable sigma-delta loops, a plurality of A/D converters having a resolution that is less than a resolution of the resettable multi-stage sigma-delta A/D converter, a plurality of digital-to-analog (D/A) converters, the plurality of A/D converters and the plurality of D/A converters coupling the cascade of at least two resettable sigma-delta loops to the digital decimation filter, and a reset line coupled to the integrators in the cascade of integrators for the at least two resettable sigma-delta loops and coupled to the integrators in the cascade of integrators for the digital decimation filter. | 04-29-2010 |
| 20100145657 | INTEGRATED SENSOR ARRAY WITH OFFSET REDUCTION - A method and system for providing increased accuracy in a CMOS sensor system in one embodiment includes a plurality of sensor elements having a first terminal and a second terminal on a complementary metal oxide semiconductor substrate, a first plurality of switches configured to selectively connect the first terminal to a power source and to selectively connect the first terminal to a readout circuit, and a second plurality of switches configured to selectively connect the second terminal to the power source and to selectively connect the second terminal to the readout circuit. | 06-10-2010 |
| 20100145660 | MEMS SENSOR WITH BUILT-IN SELF-TEST - A method and system for testing a MEMS sensor element during operation of a MEMS sensor system in one embodiment includes a test signal generator configured to generate a broad frequency band test signal, and a verification signal substantially identical to the test signal, a microelectrical-mechanical system (MEMS) sensor element operatively connected to the test signal generator for generating a sensor output in response to the test signal, a comparison component configured to generate an evaluation signal output based upon the verification signal and the test signal, and an evaluation circuit operatively connected to the comparison component and configured to identify a mismatch between the verification signal and the sensor output based upon the evaluation signal. | 06-10-2010 |
| 20100219810 | VERTICAL HALL EFFECT SENSOR WITH CURRENT FOCUS - A complimentary metal oxide semiconductor (CMOS) sensor system in one embodiment includes a doped substrate, a doped central island extending downwardly within the doped substrate from an upper surface of the doped substrate, and a first doped outer island extending downwardly within the doped substrate from the upper surface of the doped substrate, the first outer island electrically isolated from the central island within an upper portion of the substrate, and electrically coupled to the central island within a lower portion of the substrate. | 09-02-2010 |
| 20100219821 | VERTICAL HALL EFFECT SENSOR - A complimentary metal oxide semiconductor (CMOS) sensor system in one embodiment includes a doped well extending along a first axis of a doped substrate, a first electrical contact positioned within the doped well, a second electrical contact positioned within the doped well and spaced apart from the first electrical contact along the first axis, a third electrical contact positioned within the doped well and located between the first electrical contact and the second electrical contact along the first axis, and a fourth electrical contact electrically coupled to the doped well at a location of the doped well below the third electrical contact. | 09-02-2010 |
| 20110001515 | COMPARATOR WITH SELF-LIMITING POSITIVE FEEDBACK - A method and circuit for attenuating positive feedback in a comparator in one embodiment includes an amplifier configured to compare a first input signal with a second input signal and to provide an output based upon the comparison, a non-linear function with a first input operably connected to an output of the amplifier, and a feedback loop operably connected to the output of the non-linear function and to a second input of the non-linear function, the feedback loop including a feedback limiting circuit configured to attenuate a feedback signal to the second input of the non-linear function. | 01-06-2011 |
| 20110074617 | CHARGE-SHARING DIGITAL TO ANALOG CONVERTER AND SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER - In one embodiment, an analog to digital converter includes a comparator having a first input, a second input and an output, the first input being coupled to an analog signal, a successive approximation register having a serial input coupled to the output of the comparator, and being configured to generate a plurality of control signals and an N-bit digital value corresponding to the analog signal, and a digital to analog converter having an input coupled to the plurality of control signals, the digital to analog converter further comprising a first, a second, and a third capacitor and a plurality of switches controlled by the plurality of control signals and being configured to couple the first capacitor to the second capacitor and the third capacitor to the second capacitor mutually exclusively to share charge on the first capacitor and charge on the third capacitor with charge on the second capacitor and to generate an analog signal on the second capacitor, the second capacitor being coupled to the second input of the comparator. | 03-31-2011 |
| 20110091870 | MULTISITE BIOSENSOR AND ASSOCIATED METHOD - A method of detecting a biomarker in one embodiment includes identifying a quantity of biomolecule types in a sample, exposing the sample to a plurality of test sites, wherein the number of test sites in the plurality of test sites is equal to or greater than the identified quantity of biomolecule types, establishing, for each of the plurality of test sites, a respective test environment, wherein the test environment for each of the plurality of test sites is different from the test environment for each of the other of the plurality of test sites, obtaining a detection signal associated with each of the plurality of test sites, and determining the concentration of one of the biomolecule types based upon the obtained detection signals. | 04-21-2011 |