Cho, Hsinchu City
Chia-Hung Cho, Hsinchu City TW
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20140175270 | DISPLAY MEASURING DEVICE - A display measuring device for measuring a display, includes a photosensitive unit, a first rotation plane mirror, a second rotation plane mirror, a first lens module, a second lens module, and an optic reflecting unit. The first lens module projects a first incident image from the display to the first rotation plane minor. The first rotation plane minor reflects the projected first incident image from the first lens module to the optic reflecting unit. The second lens module projects a second incident image from the display to the second rotation plane minor. The second rotation plane minor reflects the projected second incident image from the second lens module to the optic reflecting unit. The optic reflecting unit reflects the reflected first incident image to the photosensitive unit, and reflects the reflected second incident image to the photosensitive unit. | 06-26-2014 |
20140333936 | THICKNESS MEASURING SYSTEM AND METHOD FOR A BONDING LAYER - In a thickness measuring system for a bonding layer according to an exemplary embodiment, an optical element changes the wavelength of a first light source to enable at least one second light source propagating through a bonding layer to be incident to an object, wherein the bonding layer has an upper interface and a lower interface that are attached to the object; and an optical image capturing and analysis unit receives a plurality of reflected lights from the upper and the lower interfaces to capture a plurality of interference images of different wavelengths, and analyzes the intensity of the plurality of interference images to compute the thickness information of the bonding layer. | 11-13-2014 |
Ching-Hua Cho, Hsinchu City TW
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20120245882 | WAFER TILT DETECTION SYSTEM - A method of improving wafer yield by accurately identifying tilted wafer conditions may include providing inquiry signals in gaps defined between machine signals where the inquiry signals relate to temperature information indicative of a temperature of a hot plate having an item placed thereon, receiving the temperature information, and determining a seating condition of the item based on a comparison of the temperature information to an expected heat profile for a fully seated item. A corresponding apparatus is also provided. | 09-27-2012 |
Chun-Ming Cho, Hsinchu City TW
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20100083074 | Block Code Decoding Method And Device Thereof - A block code decoding method and device thereof are provided. The procedure of the bounded distance decoding is simplified and the number of correlation calculating is reduced via a set of pre-established XOR masks. The decoding method includes: picking up the source code part of the received message; executing a XOR calculating for the source code part with the XOR masks, and encoding the results thereof to produce a set of compared codes; executing a correlation calculating for the set of compared codes and the received message; and determining a compared code having the maximum correlation result as the decision. | 04-01-2010 |
Hsiu-Ying Cho, Hsinchu City TW
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20120212316 | INTEGRATED CIRCUITS INCLUDING INDUCTORS - An integrated circuit includes a substrate having a surface. An inductor is disposed over the surface of the substrate. The inductor is operable to generate a magnetic field through itself that is substantially parallel with the surface. | 08-23-2012 |
20130049919 | VERTICAL SLOW-WAVE SYMMETRIC INDUCTOR STRUCTURE FOR SEMICONDUCTOR DEVICES - A vertical inductor structure in a semiconductor device includes a plurality of vertically oriented spirals that produce magnetic field in a dielectric material above the surface of a semiconductor substrate thereby preventing any eddy currents from propagating in the substrate. An inductor shield structure is also provided. The inductor shield structure is formed over the substrate surface and between an inductor such as the vertical inductor structure or other inductor types and also prevents eddy currents from being induced in the substrate. The inductor shield may surround the inductor to various degrees. | 02-28-2013 |
20130168810 | INTEGRATED CIRCUITS INCLUDING INDUCTORS - An integrated circuit includes a substrate having a surface and an inductor disposed over the surface of the substrate. The inductor includes a first conductive line disposed over the surface and first conductive structures disposed over and electrically coupled with the first conductive line. The inductor includes second conductive structures disposed over and electrically coupled with the first conductive structures. The inductor includes a second conductive line disposed over and electrically coupled with the second conductive structures. The inductor includes third conductive structures disposed over and electrically coupled with the first conductive line and at least one fourth conductive structure disposed over and electrically coupled with the third conductive structures. The inductor includes a third conductive line disposed over and electrically coupled with the at least one fourth conductive structure, the third conductive line extending substantially parallel to the second conductive line. | 07-04-2013 |
20130234221 | MOS Transconductance Gain Boosting Techniques in Millimeter-Wave Range - The present disclosure relates to a semiconductor device, such as a transistor. The device includes a gate terminal, a source terminal, a drain terminal, a transconductance component, and a boost component. The gate terminal is configured to receive a bias voltage. The drain terminal is coupled to the boost component. The transconductance component is coupled to the gate terminal, the source terminal and the drain terminal and provides an output current proportional to the bias voltage. The boost component is coupled to the transconductance component and boosts the output current at a selected frequency range. | 09-12-2013 |
20130334657 | PLANAR INTERDIGITATED CAPACITOR STRUCTURES AND METHODS OF FORMING THE SAME - A planar interdigitated capacitor structure, methods of forming, and devices including, the same. The device includes first and second planar electrode structures including respective first and second pluralities of planar continuous rectangular plate electrode elements formed above a semiconductor substrate and extending continuously in first and second orthogonal directions substantially parallel to a plane of the substrate, and first and second conductors interconnecting the respective first and second pluralities of planar electrode elements parallel to a third axis substantially normal to the plane of the substrate. The first and second planar electrode structures are arranged with respective continuous rectangular plate electrode elements of each planar electrode structure interleaved and substantially parallel with each other between the first and second conductors. The device also includes a dielectric material between the first planar electrode structure and the second planar electrode structure. | 12-19-2013 |
20140035100 | PLANAR INTERDIGITATED CAPACITOR STRUCTURES AND METHODS OF FORMING THE SAME - A planar interdigitated capacitor structure, methods of forming, and devices including, the same. The device includes first and second planar electrode structures including respective first and second pluralities of planar continuous rectangular plate electrode elements formed above a semiconductor substrate and extending continuously in first and second orthogonal directions substantially parallel to a plane of the substrate, and first and second conductors interconnecting the respective first and second pluralities of planar electrode elements parallel to a third axis substantially normal to the plane of the substrate. The first and second planar electrode structures are arranged with respective continuous rectangular plate electrode elements of each planar electrode structure interleaved and substantially parallel with each other between the first and second conductors. The device also includes a dielectric material between the first planar electrode structure and the second planar electrode structure. | 02-06-2014 |
Hsun-Jung Cho, Hsinchu City TW
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20100161204 | Method for identification of traffic lane boundary - The invention provides a method for identification of traffic lane boundary. Firstly the microwave signal is received, and the noise reduction is treated for the microwave signal. Then the frequency domain information is employed to calculate the legal set of closed interval, in order to form the frequency span information. Finally, the probability density function model is employed to calculate the frequency span information in order to identify the traffic lane boundary. | 06-24-2010 |
Jin-Hong Cho, Hsinchu City TW
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20130119500 | IMAGE SENSOR WITH IMPROVED DARK CURRENT PERFORMANCE - Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon nitride. The image sensor device includes a metal shield formed on the compressively-stressed layer. The metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a second compressively-stressed layer formed on the metal shield and the first compressively-stressed layer. The second compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the second compressively-stressed layer. | 05-16-2013 |
20140197513 | Image Sensor with Improved Dark Current Performance - Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon nitride. The image sensor device includes a metal shield formed on the compressively-stressed layer. The metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a second compressively-stressed layer formed on the metal shield and the first compressively-stressed layer. The second compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the second compressively-stressed layer. | 07-17-2014 |
Lan-Chou Cho, Hsinchu City TW
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20150131204 | VERTICAL METAL INSULATOR METAL CAPACITOR - A capacitor structure includes at least two capacitors. A first electrode includes a bottom conductive plane and first vertical conductive structures. The bottom conductive plane is disposed over a substrate. The bottom conductive plane has a first area and a first shape. At least two second electrodes include top conductive planes and second vertical conductive structures. A combined area of the top conductive planes and a gap area between adjacent top conductive planes has a second area and a second shape. The first area and the second area are about the same and the first shape and the second shape are about the same. An insulating structure is disposed between the first electrode and the second electrodes. The first vertical conductive structures and the second vertical conductive structures are interlaced with each other. The capacitors share the bottom conductive plane and have separate top conductive planes. | 05-14-2015 |
Shih-Keng Cho, Hsinchu City TW
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20130019046 | DATA TRANSMITTING DEVICE AND SYSTEM FOR PORTABLE DEVICE AND METHOD THEREOFAANM SHIEH; Yeong-RueyAACI Hsinchu CityAACO TWAAGP SHIEH; Yeong-Ruey Hsinchu City TWAANM Cho; Shih-KengAACI Hsinchu CityAACO TWAAGP Cho; Shih-Keng Hsinchu City TWAANM Liu; Hsu-PinAACI Hsinchu CityAACO TWAAGP Liu; Hsu-Pin Hsinchu City TWAANM Hsu; Wei-ShuAACI Hsinchu CityAACO TWAAGP Hsu; Wei-Shu Hsinchu City TWAANM Lin; Chi-HanAACI Hsinchu CityAACO TWAAGP Lin; Chi-Han Hsinchu City TWAANM Wang; Yu-ShiangAACI Hsinchu CityAACO TWAAGP Wang; Yu-Shiang Hsinchu City TW - A data transmitting method for communicating one of a plurality of portable devices with a host computer via a data transmitting device having a plurality of USB connector is disclosed. In one embodiment of the present invention, the method includes the following steps: firstly, a switch circuit is configured in one of the portable devices. Then, the portable device having the switch circuit is coupled with the data transmitting device. Afterward, a data transmission path between the host computer and the portable device having the switch circuit is connected by the switch circuit to transmit data between the portable device having the switch circuit and the host computer, or the data transmission path between the USB connector, which is not connecting with the portable device having the switch circuit, and the host computer is connected by the switch circuit. | 01-17-2013 |
20130286733 | METHOD OF PROGRAMMING/READING A NON-VOLATILE MEMORY WITH A SEQUENCE - A method of programming/reading a multi-bit per cell non-volatile memory with a sequence is disclosed. A plurality of less-significant-bit pages are programmed, and a plurality of consecutive most-significant-bit pages of a plurality of consecutive word lines are programmed one after the other in a consecutive order. The most-significant-bit pages through all word lines in at least one memory block of the non-volatile memory are programmed or read after the less-significant-bit pages through all the word lines in the at least one memory block are programmed or read. | 10-31-2013 |
Shu-Ying Cho, Hsinchu City TW
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20090195327 | TRANSMITTING RADIO FREQUENCY SIGNAL IN SEMICONDUCTOR STRUCTURE - A semiconductor device for transmitting a radio frequency signal along a signal line includes a signal line that extends along a principal axis. On one side of the signal line is a first dielectric, and on the opposite side of the signal line is a second dielectric. First and second ground lines are proximate to the first and second dielectrics, respectively, and the ground lines are approximately parallel to the signal line. The device has a transverse cross-section that varies along the principal axis. | 08-06-2009 |
Wen-Hao Cho, Hsinchu City TW
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20090098307 | MANUFACTURING METHOD FOR FAR-INFRARED IRRADIATING SUBSTRATE - A manufacturing method for a far-infrared irradiating substrate is provided. The manufacturing method comprises steps of providing a substrate, providing a far-infrared irradiating material and evaporating the far-infrared irradiating material to form a thin film onto the substrate. The far-infrared irradiating substrate provided by the present invention not only has a high emission coefficient of far-infrared ray, but also do not cause a potential exposure of an ionizing radiation. | 04-16-2009 |
20090246514 | ANTIREFLECTION STRUCTURE AND MANUFACTURING METHOD THEREOF - An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index. | 10-01-2009 |
20090246553 | REFLECTIVE FILM AND METHOD FOR MANUFACTURING THE SAME - A reflective film is provided. The reflective film includes a substrate; a middle layer disposed on the substrate and mainly having a crystallized transition metal; and a metal layer disposed on the middle layer. | 10-01-2009 |
Yi Fang Cho, Hsinchu City TW
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20090114714 | RFID REAL-TIME INFORMATION SYSTEM ACCOMMODATED TO SEMICONDUCTOR SUPPLY CHAIN - This invention provides an RFID real-time information system accommodated to a semiconductor supply chain for exchanging real-time information. The RFID real-time information system is characterized by comprising an RFID middleware module for generating a stock and logistic information corresponding to a plurality of carriers and wafers from a tag information; a manufacturing information module for storing an object information corresponding to the plurality of wafers; a real-time information module for integrating the RFID middleware module with the manufacturing information module to generate real-time information corresponding to the plurality of wafers and carriers; and a business-to-business (B2B) e-commerce module comprising a plurality of B2B servers respectively disposed in vendors in the semiconductor supply chain for connecting and exchanging the real-time information through a standard protocol of e-commerce. | 05-07-2009 |
20090237098 | WAFER TESTING SYSTEM INTEGRATED WITH RFID TECHNIQUES AND THESTING METHOD THEREOF - This invention provides a wafer testing system and testing method thereof. The wafer testing system comprises a wafer storage section, a prober, a tester, an RFID middleware unit, an EDA system and an MES system. The wafer storage section stores a multiplicity of carriers, each of which is provided with at least a RFID tag. The prober comprises a RFID reader to read a tag information. The tester sends a test signal to the prober for implementing the wafer test so as to generate a test result and calls an interface program to convert the test result into a file conformed with a specific data format. The RFID middleware unit receives the tag information and calls related applications to process the tag information so as to generate a wafer information. The EDA system receives the file of the specific data format converted from the interface program and calculates thereof to generate a wafer yield information after wafer test. The MES system integrates the wafer information from the RFID middleware unit with the yield information from the EDA system so as to allow monitoring the wafer manufacturing process and testing yield rate in a real-time manner. | 09-24-2009 |
Yu-Hui Cho, Hsinchu City TW
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20130080882 | METHOD FOR EXECUTING AN APPLICATION PROGRAM - A method for executing an application program is applied to an electronic device. A frame displayed by the electronic device includes a first icon, and the first icon corresponds to the application program. The method includes storing a first predetermined parameter corresponding to a first function of the application program; generating a first graph at a first location of the frame; dragging the first icon to overlap at least part of the first graph; comparing the first graph with the first predetermined parameter; starting the first function of the application program if the first graph matches the first predetermined parameter. | 03-28-2013 |
Yu-Sung Cho, Hsinchu City TW
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20120287976 | NETWORK DEVICE RELATING TO DIGITAL SUBSCRIBER LINE - A network device relating to a digital subscriber line (DSL) such as an asymmetrical DSL (ADSL) or a very high bit rate DSL (VDSL) is provided. In the present invention, the capacitors equipped into the network device are separated and grouped into two independent groups. When the network device runs out of power, the energy of one of the two independent groups is provided for generating the dying gasp signal, and the energy of the other of the two independent groups is provided for amplifying and transmitting the dying gasp signal to a Central Office (CO). Accordingly, the CO can be accurately known whether the network device runs out of power or not, and the respective capacitances of the two independent groups can be significantly reduced so as to reduce the cost of the network device. | 11-15-2012 |