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Cho, Chungcheongbuk-Do
Dong-Heon Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090309010 | IMAGE SENSOR WITH DECREASED OPTICAL INTERFERENCE BETWEEN ADJACENT PIXELS - An image sensor with decreased optical interference between adjacent pixels is provided. An image sensor, which is divided into a pixel region and a peripheral region, the image sensor including a photodiode formed in a substrate in the pixel region, first to Mth metal lines formed over the substrate in the pixel region, where M is a natural number greater than approximately 1, first to Nth metal lines formed over a substrate in the peripheral region, where N is a natural number greater than M, at least one layer of dummy metal lines formed over the Mth metal lines but formed not to overlap with the photodiode, and a microlens formed over the one layer of the dummy metal lines to overlap with the photodiode. | 12-17-2009 |
Ga Young Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20120107427 | COMPOSITION FOR PROMOTING ADIPOCYTE DIFFERENTIATION CONTAINING AN EXTRACT OF REHMANNIA GLUTINOSA, LICORICE, COICIS SEMEN, HORDEI FRUCTUS, CHAENOMELIS FRUCTUS, ACANTHOPANACIS CORTEX OR PUERARIAE RADIX - Disclosed is a composition containing an active ingredient comprising one or more extracts selected from the group consisting of | 05-03-2012 |
Heung-Won Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110305564 | LOCAL EXHAUST APPARATUS - A local exhaust system includes a motor provided in an exhaust pipe to generate a rotary drive force when power is applied thereto, in which air is taken in through an intake port and exhausted through the exhaust pipe, a rotor structure disposed on the leading end of the intake port and connected to a drive shaft of the motor, the rotor structure rotating about a central portion of the exhaust pipe, and a plurality of turbulence-generating outer blades for generating a turbulent flow when rotated. Each of the turbulence-generating outer blades is assembled to the outer surface of the rotor structure via an angle-adjusting member in such a fashion that the angle of the turbulence-generating outer blade is adjustable with respect to the direction in which air is taken in through the intake port. | 12-15-2011 |
Hyun-Ja Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110164006 | DISPLAY DRIVE CIRCUIT - A display driving circuit includes a buffer section, an N-dot switch circuit, a charge sharing switch circuit, and a sharing voltage level control switch circuit. The buffer section buffers a plurality of pixel driving signals outputted from a plurality of DACs. The N-dot switch circuit selects paths of the plurality of pixel driving signals outputted from the buffer section in response to a first path selecting signal or a second path selecting signal that is determined depending upon a dot inversion method, and switches the paths to a plurality of output terminals. The charge sharing switch circuit shares charges among the plurality of output terminals in response to a charge sharing control signal. The sharing voltage level control switch circuit controls charge sharing between the plurality of output terminals and a voltage level upon charge sharing, in response to a sharing voltage level control signal. | 07-07-2011 |
| 20110164020 | DISPLAY DRIVE CIRCUIT AND DRIVE METHOD - A display driving circuit and method is capable of minimizing the residual image of a display panel as well as consumption electric current. The display driving circuit generates driving signals corresponding to valid data and black data and transmits the driving signals to a display panel, and includes N data selection switches (where N is the integer), N buffers, N buffer output selection switches, and multiple charge sharing switches. The N data selection switches select one of the valid data and the black data. The N buffers buffer the signal selected by the respective data selection switches. The N buffer output selection switches switch outputs of the buffers to output the respective driving signals. The multiple charge sharing switches connect the neighboring pairs of the driving signals. | 07-07-2011 |
| 20110169808 | AMPLIFIER INCLUDING DITHERING SWITCH AND DISPLAY DRIVING CIRCUIT USING THE AMPLIFIER - An amplifier and a display driving circuit. The amplifier includes an input stage, a bias stage and an output stage. The input stage determines voltage levels of two nodes in correspondence to two input voltages received in response to a first bias voltage, and includes four path selecting switches, two input transistors and one bias transistor. The bias stage generates two class AB output voltages which correspond to the voltage levels of the two nodes, and includes current mirrors, ten path selecting switches, class AB bias circuits and two bias transistors. The output stage generates an output voltage VOUT that corresponds to the two class AB output voltages, and includes two coupling capacitors and two push-pull transistors. The plurality of path selecting switches operate by one signal of a first path selecting signal and a second path selecting signal that are exclusively enabled with respect to each other. | 07-14-2011 |
| 20110199821 | POWER MANAGEMENT CHIP FURNISHED WITH VOLTAGE CONTROLLER - A power management IC includes a first IC having a boost converter IC which generates a second voltage using a first voltage supplied from an outside and supplies the second voltages to a charge pump, a reference voltage generation circuit, and an EEPROM; and a second IC configured to be inputted with a third voltage and a fourth voltage as outputs of the charge pump and output a fifth voltage and a sixth voltage. The second IC has a voltage regulator which regulates the third voltage and the fourth voltage or the fifth voltage and the sixth voltage and generates an eighth voltage and a ninth voltage as voltages required for programming operation or erasing operation of the EEPROM. | 08-18-2011 |
Hyun Kil Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090284335 | ELECTROMAGNETIC SWITCH AND MAKING METHOD THEREOF - The present invention provides a low-noise electromagnetic switch applied to an electric car, whereby noise generated by vibration from an inner switch is prevented from being transmitted to the outside box by filling up a filler-up material between the inner switch and the outside box. | 11-19-2009 |
Jeong-Ho Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100270605 | NONVOLATILE MEMORY CELL AND METHOD FOR FABRICATING THE SAME - A nonvolatile memory cell and a method for fabricating the same can secure stable operational reliability as well as reducing a cell size. The nonvolatile memory cell includes a drain region formed in a substrate, a source region formed in the substrate to be separated from the drain region, a floating gate formed over the substrate between the drain region and the source region, a halo region formed in the substrate in a direction that the drain region is formed, a dielectric layer formed on sidewalls of the floating gate, and a control gate formed over the dielectric layer to overlap with at least one sidewall of the floating gate. | 10-28-2010 |
Jin-Youn Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100117197 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device and a method for fabricating the same are provided. The method includes: forming a contact plug passing through an inter-layer insulation layer; sequentially forming a lower electrode layer, a dielectric layer and an upper electrode layer on the inter-layer insulation layer; patterning the upper electrode layer; patterning the dielectric layer and the lower electrode layer, thereby obtaining a capacitor including an upper electrode, a patterned dielectric layer and a lower electrode; and sequentially forming a first metal interconnection line connected with the contact plug and second metal interconnection lines connected with the capacitor. | 05-13-2010 |
| 20100155889 | CAPACITOR AND METHOD FOR FABRICATING THE SAME - A capacitor includes a lower electrode; a dielectric layer formed on a predetermined portion of the lower electrode; an upper electrode formed on the dielectric layer; a hard mask pattern formed on the upper electrode; and an isolation layer having a shape of a spacer, formed on one sidewall of the hard mask pattern, the upper electrode, and the dielectric layer. | 06-24-2010 |
Ju Hyun Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100285176 | FERMENTATION PRODUCT OF ALOE, METHOD OF MANUFACTURING THE SAME AND FUNCTIONAL FOODS USING THE SAME - There are provided a fermentation product of aloe, a method of manufacturing the same and functional foods using the same. More particularly, the present invention relates to a method of manufacturing a fermentation product of aloe by culturing mushroom mycelia in an aloe natural medium containing many effective ingredients and thus having diverse bioactive effects, and a method of manufacturing functional foods having various pharmacological effects of improving stomach function, enhancing immunity and having effectiveness against cancer by using the fermentation product of aloe. | 11-11-2010 |
Si-Hyung Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090262565 | METHOD FOR PROGRAMMING NONVOLATILE MEMORY DEVICE - Disclosed is a method for programming a nonvolatile memory device including one time programmable unit cells. The method for programming a nonvolatile memory device including one time programmable (OTP) unit cells, the method comprising applying a pulse type program voltage having a plurality of cycles. The present invention relates to a method for programming a nonvolatile memory device, which can prevent malfunctions by enhancing a data sensing margin in a read operation through the normal dielectric breakdown of an antifuse during a program operation, and thus improve the reliability in the read operation of an OTP unit cell. | 10-22-2009 |
Soon Jin Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110097553 | TRENCH SUBSTRATE AND METHOD OF FABRICATING THE SAME - Disclosed is a trench substrate, which includes a first insulating layer having trenches formed therein, a second insulating layer disposed on a lower surface of the first insulating layer and having laser processability inferior to that of the first insulating layer, and a negative pattern formed in the trenches, and in which the second insulating layer having laser processability inferior to that of the first insulating layer functions as a stopper, so that the trenches having the same shape are formed in the first insulating layer, thus enabling the formation of a fine and uniform circuit pattern. A method of fabricating the trench substrate is also provided. | 04-28-2011 |
Whee Won Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090004814 | METHOD OF FABRICATING FLASH MEMORY DEVICE - The invention relates to a method of fabricating a flash memory device. According to the method, select transistors and memory cells are formed on, and junctions are formed in a semiconductor substrate. The semiconductor substrate between a select transistor and an adjacent memory cell are over etched using a hard mask pattern. Accordingly, migration of electrons can be prohibited and program disturbance characteristics can be improved. Further, a void is formed between the memory cells. Accordingly, an interference phenomenon between the memory cells can be reduced and, therefore, the reliability of a flash memory device can be improved. | 01-01-2009 |
| 20090029522 | Method of Forming Isolation Layer of Semiconductor Device - A method of forming isolation layers of a semiconductor device including forming a first insulating layer on a semiconductor substrate including trenches formed in the semiconductor substrate, substituting a top surface of the first insulating layer with salt, removing the salt to expand a space between sidewalls of the first insulating layer, and forming a second insulating layer on the first insulating layer so that the trenches are gap-filled. Thus, trenches can be easily gap-filled with an insulating material. | 01-29-2009 |
Yang Ilwan Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110123778 | INTERIOR DESIGN FILM GIVING AN IMPRESSION OF THE APPEARANCE OF METAL - Provided is a plastic interior film having an effect of metallic feeling. The interior film includes a base film; and a pattern layer having one or more pattern selected from a group of a hairline pattern, a mirror pattern, a bead blast pattern, an uneven pattern, an etching pattern and a vibration pattern. | 05-26-2011 |
Young Sang Cho, Chungcheongbuk-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100237498 | PACKAGE FOR SEMICONDUCTOR DEVICE AND PACKAGING METHOD THEREOF - A semiconductor device package and a method thereof are able to reliably package a semiconductor device on a substrate without using flux. The semiconductor device package includes a semiconductor device and a substrate reciprocally disposed with respect to the semiconductor device, wherein the substrate includes a side reciprocal to the semiconductor device on which there are formed a plurality of prominences surrounding an accommodation region where the semiconductor device is to be disposed. The method of packaging a semiconductor device includes preparing the semiconductor device, preparing a substrate, forming a plurality of prominences to surround an accommodation region on the substrate where the semiconductor device is to be disposed, dropping the semiconductor device within the accommodation region, and packaging the semiconductor device on the substrate. | 09-23-2010 |
| 20110193231 | ELECTRONIC DEVICE PACKAGE AND METHOD FOR FABRICATING THE SAME - An electronic device package includes a substrate assembly, an electronic device disposed to face the substrate assembly, and a sealing ring or rings including a sealing layer and a bonding layer that is disposed between the substrate assembly and the electronic device, wherein the sealing ring(s) has a closed loop shape surrounding a sealing region of the electronic device, and the bonding layer is formed through a reaction of the sealing layer and sealing layer pad with a low-melting-point material layer whose melting point is lower than that of the sealing layer and sealing ring pad. The bonding layer is formed of an intermetallic compound of the sealing layer, sealing ring pad and low-melting-point material that melts at a temperature greater than the melting temperature of the low-melting-point material. The device package also includes electrical connections in the form of joints between the substrate assembly and electronic device. | 08-11-2011 |
| 20110260275 | ELECTRONIC DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME - Provided are an electronic device package and a method of manufacturing the same. The electronic device package includes an electronic device including a polymer layer and a passivation layer configured to protect a device layer, a substrate assembly facing the electronic device, and a sealing ring formed in a closed loop between the electronic device and the substrate assembly and surrounding a sealing region. At least one side surface of the sealing ring contacts the polymer layer, and the sealing ring is disposed on the passivation layer. A polymer layer such as a microlens and a color filter is removed from a region provided with a sealing ring to form the sealing ring on a passivation layer, thereby making the sealing ring and joints the same height, thus preventing an electrical defect. | 10-27-2011 |