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Chiu, Hsinchu City
Chi-Hao Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110002087 | Stacked capacitor with positive multi-pin structure - A stacked capacitor with positive multi-pin structure includes a plurality of capacitor units, a substrate unit and a package unit. Each capacitor unit has a positive electrode that has a positive pin extended outwards therefrom. The positive pins of the capacitor units are divided into a plurality of positive pin units that are separated from each other, and the positive pins of each positive pin unit are electrically stacked onto each other. Each capacitor unit has a negative electrode, and the negative electrodes of the capacitor units are electrically stacked onto each other. The substrate unit has a positive guiding substrate electrically connected to the positive pins of the capacitor units and a negative guiding substrate electrically connected to the negative electrodes of the capacitor units. The package unit covers the capacitor units and one part of the substrate unit. | 01-06-2011 |
| 20110007451 | STACKED SOLID ELECTROLYTIC CAPACITOR WITH MULTI-PIN STRUCTURE - A stacked solid electrolytic capacitor with positive multi-pin structure includes a plurality of capacitor units, a substrate unit and a package unit. The positive electrode of each capacitor unit has a positive pin extended outwards therefrom. The positive pins are divided into a plurality of positive pin units that are separated from each other and electrically stacked onto each other. The negative electrode of each capacitor unit has a negative pin extended outwards therefrom. The negative pins are divided into a plurality of negative pin units. The negative pin units are separated from each other and the negative pins of each negative pin unit are electrically stacked onto each other. The substrate unit has a positive guiding substrate electrically connected to the positive pins and a negative guiding substrate electrically connected to the negative pins. The package unit covers the capacitor units and one part of the substrate unit. | 01-13-2011 |
| 20110007452 | Lamellar Stacked Solid Electrolytic Capacitor - A lamellar stacked solid electrolytic capacitor includes a plurality of capacitor units, a substrate unit and a package unit. Each capacitor unit is composed of a negative foil, an isolation paper with conductive polymer substance, a positive foil, an isolation paper with conductive polymer substance and a negative foil that are stacked onto each other in sequence, the positive foils of the capacitor units are electrically connected to each other, the negative foils of the capacitor units are electrically connected to each other, and the positive foils and the negative foils are insulated from each other. The substrate unit has a positive guiding substrate electrically connected to the positive foils of the capacitor units and a negative guiding substrate electrically connected to the negative foils of the capacitor units. The package unit covers the capacitor units and one part of the substrate unit. | 01-13-2011 |
| 20110122544 | STACKED SOLID ELECTROLYTIC CAPACITOR AND A METHOD FOR MANUFACTURING THE SAME - A stacked solid electrolytic capacitor and a method for manufacturing the same are disclosed. The stacked solid electrolytic capacitor includes two capacitor sets, a positive electrode conducting device, a negative electrode conducting device, and a package unit. Each capacitor set includes at least one capacitor unit. The front side of the positive electrode portion of the capacitor set extends to form a positive electrode pin. The positive electrode conducting device has at least one first positive electrode conducting lead frame and at least one second positive electrode conducting lead frame. The first positive electrode conducting lead frame is electrically connected with the second positive electrode conducting lead frame. The negative electrode conducting device has at least one negative electrode conducting lead frame, and is electrically connected with the negative electrode of the two capacitor sets by using metal conductive material. | 05-26-2011 |
| 20110216475 | STACKED SOLID-STATE ELECTROLYTIC CAPACITOR WITH MULTI-DIRECTIONAL PRODUCT LEAD FRAME STRUCTURE - A stacked solid-state electrolytic capacitor with multi-directional product lead frame structure includes a plurality of capacitor units, a substrate unit and a package unit. The capacitor units are stacked onto each other. Each capacitor unit has a positive electrode and a negative electrode, the positive electrode of each capacitor unit has a positive pin extended outwards, the positive pins are electrically stacked onto each other, and the negative electrodes are electrically stacked onto each other. The substrate unit has at least one positive guiding substrate electrically connected to the positive pins of the capacitor units and a plurality of negative guiding substrates electrically connected to the negative electrodes of the capacitor units. The package unit covers the capacitor units and one part of the substrate unit in order to expose an end of the at least one positive guiding substrate and an end of each negative guiding substrate. | 09-08-2011 |
| 20120099247 | SOLID ELECTROLYTIC CAPACITOR HAVING A PROTECTIVE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A solid electrolytic capacitor with a protective structure, which includes stacked capacitor elements electrically connected to the positive and negative terminal. A packaging material such as synthetic resin is used to encapsulate the capacitor elements, the positive terminal, and the negative terminal. Before packaging, a protective layer is formed by a colloid material, which covers the main body of the capacitor that includes the capacitor elements, the positive terminal, and the negative terminal. The protective layer provides a better seal and relieves the external pressure exerting on the capacitor during the packaging process. The protection prevents structural damage to the capacitor's main body while reducing the risk of short-circuits and excessive current leakage. | 04-26-2012 |
Chin-Fong Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110169056 | HYDROGEN ION-SENSITIVE FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF - A hydrogen ion-sensitive field effect transistor and a manufacturing method thereof are provided. The hydrogen ion-sensitive field effect transistor includes a semiconductor substrate, an insulating layer, a transistor gate, and a sensing film. A gate area is defined on the semiconductor substrate having a source area and a drain area. The insulating layer is formed within the gate area on the semiconductor substrate. The transistor gate is deposited within the gate area and includes a first gate layer. Further, the first gate layer is an aluminum layer, and a sensing window is defined thereon. The sensing film is an alumina film formed within the sensing window by oxidizing the first gate layer. Thus, the sensing film is formed without any film deposition process, and consequently the manufacturing method is simplified. | 07-14-2011 |
Ching-Hua Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110266674 | Laser Etch Via Formation - The present disclosure provides methods for forming semiconductor devices with laser-etched vias and apparatus including the same. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside and a backside, and providing a layer above the frontside of the substrate, the layer having a different composition from the substrate. The method further includes controlling a laser power and a laser pulse number to laser etch an opening through the layer and at least a portion of the frontside of the substrate, filling the opening with a conductive material to form a via, removing a portion of the backside of the substrate to expose the via, and electrically coupling a first element to a second element with the via. A semiconductor device fabricated by such a method is also disclosed. | 11-03-2011 |
| 20120012871 | LIGHT EMITTING DEVICE - The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies. | 01-19-2012 |
| 20120032212 | METHOD OF LIGHT EMITTING DIODE SIDEWALL PASSIVATION - A Light-Emitting Diode (LED) includes a light-emitting structure having a passivation layer disposed on vertical sidewalls across a first doped layer, an active layer, and a second doped layer that completely covers at least the sidewalls of the active layer. The passivation layer is formed by plasma bombardment or ion implantation of the light-emitting structure. It protects the sidewalls during subsequent processing steps and prevents current leakage around the active layer. | 02-09-2012 |
| 20120064642 | METHOD TO REMOVE SAPPHIRE SUBSTRATE - A Light-Emitting Diode (LED) is formed on a sapphire substrate that is removed from the LED by grinding and then etching the sapphire substrate. The sapphire substrate is ground first to a first specified thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching. | 03-15-2012 |
| 20120080698 | HIGH EFFICIENCY LIGHT EMITTING DIODES - The present disclosure relates to high efficiency light emitting diode devices and methods for fabricating the same. In accordance with one or more embodiments, a light emitting diode device includes a substrate having one or more recessed features formed on a surface thereof and one or more omni-directional reflectors formed to overlie the one or more recessed features. A light emitting diode layer is formed on the surface of the substrate to overlie the omni-directional reflector. The one or more omni-directional reflectors are adapted to efficiently reflect light. | 04-05-2012 |
| 20120104409 | FORMING LIGHT-EMITTING DIODES USING SEED PARTICLES - A seed layer for growing a group III-V semiconductor structure is embedded in a dielectric material on a carrier substrate. After the group III-V semiconductor structure is grown, the dielectric material is removed by wet etch to detach the carrier substrate. The group III-V semiconductor structure includes a thick gallium nitride layer of at least 100 microns or a light-emitting structure. | 05-03-2012 |
Chinq-Shiun Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090203346 | DOWN-CONVERTER AND CALIBRATION METHOD THEREOF - A mixer and calibration method thereof are provided. A direct conversion receiver comprises a differential loading pair utilizing at least one binary weighted resistor. The binary weighted resistor is adjustable to provide a resistance linear to a digital code, comprising a fixed resistor and an adjustable resistor cascaded to the fixed resistor in parallel. Every increment of the digital code induces an equal increment of the resistance. The magnitude of every incremental resistance is below a negligible ratio of the fixed resistor. | 08-13-2009 |
| 20090213764 | FULL DIVISION DUPLEX SYSTEM AND A LEAKAGE CANCELLATION METHOD - An exemplary embodiment of a full division duplex system comprises a receiver, a transmitter and an auxiliary circuit. The receiver receives an inbound RF signal of a first band to generate an inbound baseband signal, and the transmitter up converts an outbound baseband signal by an oscillation signal to generate an outbound RF signal of a second band for transmission. The auxiliary circuit calculates leakages from the outbound RF signal to generate a blocker replica, in which a LNA is coupled to a non-conductive coupling path extended from the input of receiver to collect leakages from the outbound RF signal to produce an induction signal. The induction signal is down converted to perform an adjustment, and thereafter up converted again to generate the blocker replica. In this way, the inbound baseband signal is generated from a subtraction of the inbound RF signal and the blocker replica. | 08-27-2009 |
| 20090305656 | DIRECT CONVERSION RECEIVER AND DC OFFSET CONCELLATION METHOD - A direct conversion receiver and a DC offset cancellation method are provided. An RF module receives a transmission signal to generate an RF signal. A mixer converts the RF signal to a mixer output comprising baseband and imaginary parts. A filter module filters out the imaginary part of the mixer output and adjusts gain of the baseband part to generate a baseband signal. A calibrator performs a calibration to determine a mismatch value of the mixer. A static DC offset canceller provides a constant offset compensation according to the mismatch value; wherein the mismatch value is used to minimize component mismatching effects of the mixer. | 12-10-2009 |
| 20100317303 | SELF-CALIBRATING DIRECT CONVERSION TRANSMITTER WITH CONVERTING/STEERING DEVICE - A steering and mixing module comprises a double balanced switch quad and a steering quad. The double balanced switch quad comprises a first output pair, and the first output pair is coupled to a first load stage. The steering quad comprises a second output pair, and the second output pair is coupled to a second load stage. The double balanced switch quad and the steering quad share an input pair. | 12-16-2010 |
Ho-Hsin Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100124065 | Led lamp with depending arms of led integral with glass housing - An LED lamp includes a glass housing, an LED having two depending arms extending therefrom, a leg releasably secured to the depending arms, and an electrical socket releasably secured to both the leg and a base portion of the glass housing. The housing and the depending arms are formed integrally in a manufacturing process so that in case the LED lamp is malfunctioned, a replacement of both the LED and the glass housing can be made easy by removing the base portion of the glass housing from the socket without worrying of breaking the glass housing. | 05-20-2010 |
| 20100296300 | LED lamp - An LED lamp includes a glass electric light bulb ( | 11-25-2010 |
Hung-Hsien Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090015511 | ANTENNA MODULE FOR A WIRELESS ELECTRONIC DEVICE - The antenna module fabrication for a wireless electronic device includes setting up the antenna and the assembly base that is to connect the antenna to the designated circuit board. The antenna and the assembly base are two independent pieces, and the positioning parts are for positioning so that the antenna and assembly base are one body. The antenna module of the invention can achieve the advantages such as simple production, cost effectiveness, prevention of the antenna module from deforming and quality improvement. | 01-15-2009 |
Hung-Yen Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090185345 | Computer Module Replacement of Digital Signage - The invention provides a computer module replacement design of a digital signage. The digital signage has a main circuit board and a plug-board disposed therein and connected to each other. The plug-board has a plug-card with a plug-slot, and a track disposed on each side thereof. The digital signage is covered up by a back cover so that an opening can be formed at one side edge of the digital signage. The computer module has a frame and a motherboard. The frame has a rail disposed on each side thereof and the motherboard has a slot and a connecting terminal disposed thereon. The slot has an interface socket card. The computer module can be placed into the digital signage through the opening with the rail placed into the track. Therefore, the connecting terminal is connected to the plug-slot and the computer module can be drawn out for maintenance. | 07-23-2009 |
| 20090185347 | HEAT DISSIPATION SYSTEM FOR DIGITAL ELECTRONIC SIGNBOARD - A heat dissipation system for digital electronic signboard includes a first heat dissipation subsystem disposed in a main circuit board area of a digital electronic signboard, and a second heat dissipation subsystem disposed in a computer mainboard area of the digital electronic signboard. The main circuit board area has a plurality of heat dissipation fans disposed therein, wherein one heat dissipation fan is disposed at a side of the main circuit board area, while another heat dissipation fan is disposed at a side of a power supply and can be externally connected to an air guide pipe. The computer mainboard area can also have a plurality of heat dissipation fans disposed therein, wherein one heat dissipation fan is disposed at a side of the computer mainboard, while another heat dissipation fan is disposed on the top of a microprocessor of the computer mainboard. | 07-23-2009 |
I-Hsiang Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090057817 | Microelectromechanical System and Process of Making the Same - A micro electromechanical system and a fabrication method thereof, which has trenches formed on a substrate to prevent circuits from interfering each other, and to prevent over-etching of the substrate when releasing a microstructure. | 03-05-2009 |
Jui-Te Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100172517 | Microphone Preamplifier Circuit and Voice Sensing Devices - A microphone preamplifier circuit is provided. An amplifier comprises a first input end, a second input end, and an output end. A bias voltage is provided by a bias voltage source. A first sensor is coupled to the first input end and the bias voltage source for sensing a first physical parameter and a second physical parameter. A second sensor is coupled to the second input end and the bias voltage source for sensing the first physical parameter, wherein the second sensor is insensitive to the second physical parameter. The output end of the amplifier outputs a difference of the first and second input ends whereby noises and interferences are reduced. | 07-08-2010 |
| 20100177913 | MICROPHONE PREAMPLIFIER CIRCUIT AND VOICE SENSING DEVICES - A microphone preamplifier circuit is provided in a system on chip. An amplifier comprises a first input end, a second input end, and an output end. A bias voltage is provided by a bias voltage source. A first sensor is coupled to the first input end and the bias voltage source for sensing a first physical parameter and a second physical parameter. A second sensor is coupled to the second input end and the bias voltage source for sensing the first physical parameter, wherein the second sensor is insensitive to the second physical parameter. The output end of the amplifier outputs a difference of the first and second input ends whereby noises and interferences are reduced. | 07-15-2010 |
| 20100322440 | AUDIO PROCESSING CIRCUIT AND PREAMPLIFIER CIRCUIT - An audio processing circuit is provided, receiving a microphone signal from a microphone to output a differential signal. A preamplifier receives the microphone signal to output a first preamplified voltage and a second preamplified voltage. A gain stage receives the first preamplified voltage and the second preamplified voltage to output the differential signal comprising a first differential output and a second differential output. In the preamplifier, a first operational amplifier is provided. A first voltage controlled current source is controlled by the output end of the first operational amplifier to provide a first current. A first transistor has a gate coupled to a ground voltage supply, a source coupled to the first voltage controlled current source for receiving the first current, and a drain coupled to a voltage ground. Likewise, a second voltage controlled current source and a second transistor are presented symmetrically to render the differential output. | 12-23-2010 |
Ko-Wen Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090184834 | SYSTEM AND METHOD FOR MONITORING STEP MOTOR - A method for monitoring a step motor is provided, wherein the step motor rotates from a start position to an end position and then back to the start position repeatedly. The monitoring method includes: detecting a status signal of the step motor and a command signal received by the step motor in real time; recording a variation of the difference between the command signal and the status signal vs. time as an error data; and determining whether the step motor is starting from the start position, in action, reaching the end position, or returning to the start position according to the status signal and the command signal. If it is determined that the step motor is in action, the error data is recorded as a tracking error, and whether an alarm is issued is determined according to the tracking error. | 07-23-2009 |
Kuo-Chuang Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080277662 | SEMICONDUCTOR STRUCTURES - A semiconductor structure is disclosed. The semiconductor structure includes a polycrystal substrate, a first single crystal layer formed thereon and a second single crystal layer formed on the first single crystal layer. A variation of coefficients of thermal expansion (CTE) between the first single crystal layer and the polycrystal substrate is less than 25%. There is no lattice mismatch between the first single crystal layer and the polycrystal substrate. | 11-13-2008 |
| 20090152113 | Gas detection system - A gas detection system used for detecting a concentration of a gas in a second environment based on a concentration of the gas in a first environment is provided. The gas detection system may include a gas detecting device having two detection module, a first dielectric layer a second dielectric layer and a programmed control module. The control module may detect the voltage outputted by the first detection module to obtain the concentration of the gas in the second environment, when the detected voltage is smaller than a predetermined value. The control module may output a voltage signal to the second detection module and may detect the steady state current corresponding to the voltage signal to obtain the concentration of the gas in the second environment corresponding to the steady state current. | 06-18-2009 |
| 20100148133 | P-TYPE METAL OXIDE SEMICONDUCTOR MATERIAL AND FABRICATION METHOD THEREOF - A fabrication method for a p-type metal oxide semiconductor material is disclosed, including providing a lithium salt and a zinc salt to be mixed in a solution, wherein the solution is added a chelating agent to form a metal complex compound comprising lithium and zinc. A heating process for the metal complex compound to form a p-type metal oxide semiconductor material powder is performed, having a formula Li | 06-17-2010 |
| 20100163429 | GAS SENSING MATERIAL AND GAS SENSOR EMPLOYING THE SAME - Gas sensing material and gas sensor employing the same are provided. The gas sensing material includes an inorganic metal oxide and an organic polymer, wherein the organic polymer includes a repeat unit having the structure of | 07-01-2010 |
| 20100288348 | SOLAR CELL DEVICE AND METHOD FOR FABRICATING THE SAME - A solar cell device is provided, including a transparent substrate, a composite transparent conductive layer disposed over the transparent substrate, a photovoltaic element formed over the composite transparent conductive layer, and an electrode layer disposed over the photovoltaic element. In one embodiment, the composite transparent conductive layer includes a first transparent conductive layer and a second transparent conductive layer sequentially stacked over the transparent substrate, and the first transparent conductive layer is made of lithium and fluorine-codoped tin oxide and the second transparent conductive layer is made of a material selected from a group consisting of zinc oxide and titanium dioxide. | 11-18-2010 |
| 20120107631 | BONDING MATERIAL, METHOD, AND STRUCTURE - Disclosed is a bonding structure, including a heat dissipation substrate, a eutectic layer on the heat dissipation substrate, and a copper layer on the eutectic layer. The thermal dissipation substrate includes aluminum oxide, aluminum nitride, or zirconium oxide. The eutectic layer includes aluminum oxide, aluminum nitride, or zirconium oxide doped with zinc, tin, indium, or combinations thereof. | 05-03-2012 |
Lin-Kai Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110223872 | WIRELESS TRANSCEIVING APPARATUS - A wireless transceiving apparatus is adapted for transceiving data between communication terminals and signal processing devices and includes transceiving devices. Each transceiving device includes: a number (M) of antenna units each including a number (T) of antenna elements; a number (M) of first processing unit for performing radio frequency (RF) beamforming; a number (M) of frequency converters; and a second processing unit for performing baseband beamforming. The wireless transceiving apparatus receives signals from the communication terminals and transmits processed signals to the communication terminals with an improved signal to interference plus noise ratio (SINR), thereby ensuring the quality of service for each communication terminal. | 09-15-2011 |
Ming-Jer Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080237885 | Method for Improving Design Window - A method of forming photo masks having rectangular patterns and a method for forming a semiconductor structure using the photo masks is provided. The method for forming the photo masks includes determining a minimum spacing and identifying vertical conductive feature patterns having a spacing less than the minimum spacing value. The method further includes determining a first direction to expand and a second direction to shrink, and checking against design rules to see if the design rules are violated for each of the vertical conductive feature patterns identified. If designed rules are not violated, the identified vertical conductive feature pattern is replaced with a revised vertical conductive feature pattern having a rectangular shape. The photo masks are then formed. The semiconductor structure can be formed using the photo masks. | 10-02-2008 |
Ming-Yen Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110115057 | DESIGN STRUCTURE FOR INTEGRATED CIRCUIT ALIGNMENT - A method and device for pattern alignment are disclosed. The device can include an exposure field; a die within the exposure field, wherein the die comprises an integrated circuit region, a seal ring region, and a corner stress relief region; and a die alignment mark disposed between the seal ring region and the corner stress relief region. | 05-19-2011 |
Pi-Chen Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100165911 | RELAY STATION AND COMMUNICATION METHOD THEREOF - An embodiment of a relay station for a base station and a mobile station is provided. The relay station includes a first base station module and a mobile station module. The first base station module receives a control packet and a data packet transmitted by a mobile station. The mobile station module receives and transmits the control packet and the data packet to the base station, wherein the first base station module transmits the control packet to the mobile station module via a tunnel mode, and transmits the data packet to the mobile station module via a bridge mode. | 07-01-2010 |
Po-Kai Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090098307 | MANUFACTURING METHOD FOR FAR-INFRARED IRRADIATING SUBSTRATE - A manufacturing method for a far-infrared irradiating substrate is provided. The manufacturing method comprises steps of providing a substrate, providing a far-infrared irradiating material and evaporating the far-infrared irradiating material to form a thin film onto the substrate. The far-infrared irradiating substrate provided by the present invention not only has a high emission coefficient of far-infrared ray, but also do not cause a potential exposure of an ionizing radiation. | 04-16-2009 |
| 20090246514 | ANTIREFLECTION STRUCTURE AND MANUFACTURING METHOD THEREOF - An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index. | 10-01-2009 |
| 20090246553 | REFLECTIVE FILM AND METHOD FOR MANUFACTURING THE SAME - A reflective film is provided. The reflective film includes a substrate; a middle layer disposed on the substrate and mainly having a crystallized transition metal; and a metal layer disposed on the middle layer. | 10-01-2009 |
Sau-Kwo Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100128802 | VIDEO PROCESSING CIUCUIT AND RELATED METHOD FOR MERGING VIDEO OUTPUT STREAMS WITH GRAPHICAL STREAM FOR TRANSMISSION - A video processing circuit includes a video generating unit for generating a video output stream, a graphic generating unit for providing a graphical stream, and a communication interface circuit coupled to the video generating unit and the graphic generating unit. The communication interface circuit has a first mode provided for mixing the video output stream and the graphical stream to transmit a mixed video output stream through a channel and a second mode provided for merging the video output stream and the graphical stream to transmit a first merged signal through the channel. In the second mode, the communication interface circuit merges the video output stream and the graphical stream by increasing a working frequency of the communication interface circuit to increase bandwidths of the channel, using positions for transmitting a portion of video control signals in the video output stream to transmit the graphical stream, and compressing the video output stream. | 05-27-2010 |
Shang-Kai Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090169100 | MOTION-ORIENTED IMAGE COMPENSATING METHOD - A motion-oriented image compensating method is disclosed. The method uses the pixel luminance of a present image data and a last image data to judge the minimum motion vector in X-axis and the minimum motion vector in Y-axis of the present image data, following by conducting luminance compensation of the pixels according to the above-mentioned two minimum motion vectors to advance the sharpness of image edges and thereby the image quality. | 07-02-2009 |
Shao-Wei Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120081008 | CONTROL CIRCUIT MODULE OF LIGHT-EMITTING DIODE LAMP - The present invention relates to a control circuit module of light-emitting diode (LED) lamp, which comprises: a AC to DC element, for transferring mains AC power to DC power; a plurality of groups of LED; a plurality of switches, corresponding to the number of the groups of LED, for controlling to turn on/off the each group; a linear voltage regulator, for cutting the DC power from the AC to DC element to a plurality of voltage sections; a switch selector, for selecting to open/close the switches according to the voltage sections from the linear voltage regulator; a current selector, for capturing available current sections from the voltage sections of the linear voltage regulator; and a LED current setup device, for controlling the current sections to open/close the plurality of switches by a user according to the LED current setup device and the current selector. | 04-05-2012 |
Sheng-Nan Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090284312 | TEST CIRCUIT FOR PROGRAMMABLE GAIN AMPLIFIER - A test circuit, for checking whether at least one programmable gain amplifier (PGA) operates correctly, includes a signal generator, a gain controller, a test level output circuit, a comparison circuit and an identifying circuit. The signal generator is utilized for outputting a test input signal to a PGA to generate a test output signal. The gain controller is utilized for outputting a gain control signal to the PGA to adjust a gain of the PGA. The test level output circuit is utilized for referring to the test output signal to output a first test level and a second test level. The comparison circuit is utilized for comparing the first and second test levels to generate a result signal. The identifying circuit is utilized for identifying whether the PGA operates correctly according to the result signal. | 11-19-2009 |
| 20100266144 | AUDIO PROCESSING CHIP AND AUDIO SIGNAL PROCESSING METHOD THEREOF - An audio processing chip includes a connecting port, an audio amplifier module and a pulse width modulation (PWM) control circuit. The connecting port receives a pulse width modulation (PWM) signal; the audio amplifier module amplifies an audio signal according to a control signal to thereby output an audio output signal; and the pulse width modulation (PWM) control circuit is coupled between the connecting port and the audio amplifier module, and outputs the control signal to the audio amplifier module according to the PWM signal to thereby control an operation of the audio amplifier module. | 10-21-2010 |
Shih-Hsuan Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090257752 | NETWORK MEDIA SELECTING METHOD AND DEVICE THEREOF - A method for operating a network device is provided. The method comprises steps of providing a first transceiver to establish a first link via a first medium; providing a second transceiver to establish a second link via a second medium; and enabling one of the first and the second transceivers to establish a corresponding one of the first and second links according to a predetermined order, wherein a media access controller transmits a first datum via the first medium by using the first link, and transmits a second datum via the second medium by using the second link. | 10-15-2009 |
Shu-Chuan Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100028842 | Interactive Learning Toy - An interactive learning toy comprises: a main portion including a sensing and sound-emitting device, and plural sensed devices. The sensing and sound-emitting device includes a center processor unit connected to a speaker, a power, a memory, a sensor and a switch. The respective sensed devices include a memory and a sensor. By such arrangements, the interactive learning toy can emit different sounds when different sensed devices are attached to the main portion to improve the game and learning interest. In addition, the sensed devices can be designed in different forms corresponding to the passive audio data pre-recorded in the memory of the main portion to create a connection between the vision and audition to improve the learning effect and game interest. | 02-04-2010 |
Tz-Cheng Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110183466 | PACKAGING METHOD INVOLVING REARRANGEMENT OF DICE - A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material. The substrate is removed to expose the active surface of the plurality of dice. | 07-28-2011 |
Wei-Che Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080246448 | Sleep mode control circuit and method for a DC/DC switching power supply system - A sleep mode control circuit and method are provided to pull high the error signal of a DC/DC switching power supply system to a target level when the switching power supply system is in a sleep mode, such that the switching power supply system can be more rapidly waked up from the sleep mode to its normal mode once the loading of the switching power supply system increases. A threshold is given for the output signal of the comparator that is used to determine the duty for the switching power supply system, and the error signal in the sleep mode is thus maintained slightly lower than the minimum voltage for the error signal in the normal mode. | 10-09-2008 |
| 20090295343 | Buck-boost switching regulator and control method thereof - The present invention discloses a buck-boost switching regulator, comprising: (1) a first loop including: a first and a second switch electrically connected with each other, the first switch having an end electrically connected with an input voltage, and the second switch having an end electrically connected with ground; and a first control circuit controlling the operation of the first and the second switch; (2) a second loop including: a third and a fourth switch electrically connected with each other, the third switch having an end electrically connected with ground, and the fourth switch having an end electrically connected with an output voltage; and a second control circuit controlling the operation of the third and the fourth switch; and (3) an inductor electrically connected between a node between the first and the second switch, and a node between the third and the fourth switch. | 12-03-2009 |
Yi-Chen Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080237539 | Green-emitting phosphors and process for producing the same - This invention relates to a green phosphor and a process for producing the same, wherein the phosphor is represented by a chemical formula: M(Tb | 10-02-2008 |
| 20090026477 | NOVEL PHOSPHOR AND FABRICATION OF THE SAME - The present invention provides a novel phosphor represent by the following general formula: | 01-29-2009 |
| 20090026918 | NOVEL PHOSPHOR AND FABRICATION OF THE SAME - The present invention provides a light emitting diode-converted phosphor compound having the following formula: | 01-29-2009 |
| 20110084594 | PHOSPHORS, FABRICATING METHOD THEREOF, AND LIGHT EMITTING DEVICES EMPLOYING THE SAME - The invention provides a phosphor emitting UV and visible light, which may be collocated with other phosphors to provide a white light illumination device, composed of | 04-14-2011 |
Yi-Chia Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120123872 | COOPERATIVE PERSONALIZED PROMOTION METHOD ACCORDING TO CONSUMER-STORE INTERACTIVE TRANSACTION HISTORY AND SYSTEM USING THE SAME - A system performs cooperative personalized promotion based on consumer-store interactive transaction history at multiple stores of different categories. The system includes a cooperative personal promotion platform. The cooperative personal promotion platform is provided for multiple stores of different categories to register a number of promotion information and to display at least one preferential-combination-information constituted by the promotion information. The promotion platform includes a data exchange interface, a remote-end server and a consumer record unit. The data exchange interface is used for reading a consumer's basic information into the platform, and connecting to the remote-end server via a network. The remote-end server is used for checking the consumer's basic information and recording consumer's latest interactive transaction in the consumer record unit for updating a consumer-store interactive transaction history. The cooperative personal promotion platform matches at least one preferential combination information for the consumer's choice according to the consumer-store interactive transaction history. | 05-17-2012 |
Yi-Hsiang Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120034729 | MANUFACTURING METHOD FOR LIGHT-SENSING STRUCTURE - A manufacturing method for manufacturing a light-sensing structure is provided. The manufacturing method includes the steps as follows. (a) A circuit layer is formed on an upper surface of a first substrate, wherein the first substrate includes at least one light-sensing device and the circuit layer includes at least one device structure and at least one release feature that is made of metal and is formed on part of the light-sensing device and the device structure. (b) A first light-filtering layer is formed on part of the circuit layer. (c) The release feature is removed by a wet-etching process. | 02-09-2012 |
Yi-Ming Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090310314 | Flexible Display Module and Method of Manufacturing the same - A flexible display module includes a flexible display panel and at least one flexible circuit board. The flexible display panel includes a flexible plastic substrate, a first driving circuit layer, a display layer and a second driving circuit layer. The thickness of the flexible plastic substrate is smaller than 30 micrometers. The first driving circuit layer having a view area and a peripheral circuit area is disposed on the flexible plastic substrate. The display layer is disposed on the first driving circuit layer and corresponding to the view area. The second driving circuit area is disposed on the display layer. The flexible circuit board is electrically connected to the peripheral circuit area through an anisotropic conductive film. In addition, a method of manufacturing a flexible display module is also provided. | 12-17-2009 |
Yu-Min Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100110950 | METHOD AND APPARATUS FOR ALIGNING POWER SAVINGS CLASSES - A method for power savings in a wireless communications network, including selecting all Type-1 power savings classes (PSCs), selecting all Type-2 PSCs, and selecting all Type-3 PSCs. The method further includes aligning the Type-1 PSCs of the device, if more than one Type-1 PSC is selected, and aligning the Type-2 PSCs of the device, if more than one Type-2 PSC is selected. The method also includes aligning the two or more aligned Type-1 PSCs or, if only one Type-1 PSC is selected, the Type-1 PSC, and the two or more aligned Type-2 PSCs or, if only one Type-2 PSC is selected, the Type-2 PSC, if there is at least one Type-1 PSC and at least one Type-2 PSC. The method may further include aligning the Type-3 PSCs with the aligned Type-1 and Type-2 PSCs, if there is at least one Type-3 PSC and at least one Type-1 or Type-2 PSC. | 05-06-2010 |
| 20100235666 | METHOD FOR DETERMINING SWITCHING OF SLEEP MODE, COMPUTER PROGRAM PRODUCT FOR PERFORMING THE METHOD, AND RECORDING MEDIUM FOR THE COMPUTER PROGRAM PRODUCT - A method for determining switching of the sleep mode for a device is provided. The device and a base station have several connections therebetween. In the determining method, one of the connections is first provided and it is determined whether the connection is realtime or non-realtime. It is then determined whether or not the realtime and non-realtime connections satisfy the condition for entering the sleep mode according to a first condition and a second condition, respectively. If the connection does not satisfy the condition for entering the sleep mode, the device enters the normal mode. If the connection satisfies the condition for entering the sleep mode, then the foregoing steps are repeated till the connections have all been checked. If all of the connections satisfy the condition for entering the sleep mode, the device enters the sleep mode. | 09-16-2010 |
Yung-Sheng Chiu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100052066 | STRUCTURE AND METHOD FOR A CMOS DEVICE WITH DOPED CONDUCTING METAL OXIDE AS THE GATE ELECTRODE - A semiconductor device and method for fabricating a semiconductor device for providing improved work function values and thermal stability is disclosed. The semiconductor device comprises a semiconductor substrate; an interfacial dielectric layer over the semiconductor substrate; a high-k gate dielectric layer over the interfacial dielectric layer; and a doped-conducting metal oxide layer over the high-k gate dielectric layer. | 03-04-2010 |