| Patent application number | Description | Published |
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| 20080213938 | METHOD FOR FABRICATING A CMOS IMAGE SENSOR - A method for fabricating a CMOS image sensor is disclosed. First, a substrate having a sensor array region and a peripheral region is provided. A contact pad is formed on the substrate of the peripheral region, and a dielectric layer is disposed on the substrate for exposing the surface of the contact pad. A cap layer is disposed on the dielectric layer and the contact pad, in which the cap layer is patterned to form an optical shielding layer on the dielectric layer of the peripheral region and a passivation layer on the contact pad. Subsequently, a plurality of color filters, a planarizing layer, and a plurality of microlenses are disposed on the dielectric layer. | 09-04-2008 |
| 20090042332 | METHODS FOR FABRICATING A CMOS IMAGE SENSOR - A method for fabricating a CMOS image sensor includes providing a substrate having a sensor array region and a peripheral region defined thereon, forming at least a contact pad on the substrate of the peripheral region, forming a first dielectric layer covering the contact pad on the substrate, performing a first etching process to expose the contact pad and to form a step height, forming an optical shielding layer on the first dielectric layer, forming a plurality of color filters on the first dielectric layer, sequentially forming a planarizing layer and a plurality of micro-lenses on the first dielectric layer. | 02-12-2009 |
| 20090072326 | ULTRA HIGH VOLTAGE MOS TRANSISTOR DEVICE - An ultra high voltage MOS transistor device includes a substrate; a source region formed in the substrate; a first doping region formed in the substrate and bordering upon the source region; a first ion well encompassing the source region and the first doping region; a gate oxide layer formed on the source region and on the first ion well; a field oxide layer connected with the gate oxide layer and formed on a semiconductor region; a dielectric layer stacked on the field oxide layer; a drain region formed at one side of the field oxide layer and being spaced apart from the source region; a second ion well encompassing the drain region; and a gate disposed on the gate oxide layer and laterally extending to the field oxide layer and onto the dielectric layer. | 03-19-2009 |
| 20090121264 | CMOS IMAGE SENSOR AND METHOD OF FORMING THE SAME - A CMOS image sensor is formed utilizing a through-poly implantation process. First, a substrate including a photo-sensing region and a transistor region is provided. Subsequently, at least a gate structure is formed on a surface of the substrate within the transistor region. Thereafter, an ion implantation process is performed on the substrate to form a first conductive type well in the substrate through the gate structure. Since the ion implantation process implants ions into the substrate to a channel region of the transistor through the gate structure, the implant depth of the uncovered parts of the substrate is deeper than the implant depth of the parts of the substrate covered by the gate structure, and defects caused by the energy of the ion implantation process are prevented within the channel region. | 05-14-2009 |
| 20090140340 | ESD protection device structure - An electrostatic discharge (ESD) protective device structure is disclosed. The ESD protection device includes: at least a first conductive type metal-oxide semiconductor (MOS), in which the drain and source of the first conductive type MOS are electrically connected to a first power terminal and a second power terminal separately; at least a second conductive type diffusion region; and at least a dummy gate disposed between the first conductive type MOS and the second conductive type diffusion region, wherein the gate length of the dummy gate is less than the gate length of the first conductive type MOS gate, such that the junction between the second conductive type diffusion region and the drain of the first conductive type MOS have a low breakdown voltage. | 06-04-2009 |
| 20090168181 | COLOR FILTER AND METHOD FOR FABRICATING THE SAME - A structure of a color filter is provided. The color filter structure includes a substrate, in which a number of first pixel regions, a number of second pixel regions, and a number of third pixel regions are defined on the substrate. Each first pixel region includes a first stack layer; each second pixel region includes a second stack layer; and each third pixel region includes the first stack layer and the second stack layer. | 07-02-2009 |
| 20110012209 | GATE STRUCTURE AND METHOD OF MAKING THE SAME - A method of making a gate structure includes the following steps. First, a gate is formed. Then, a first silicon oxide layer, a silicon nitride layer, and a second silicon oxide layer are formed to cover the gate from bottom to top. Later, a dry etching is performed to etch the second silicon oxide layer. After that, a wet etching is performed to etch the silicon nitride layer and the first silicon oxide layer. The aforesaid wet etching is performed by utilizing an RCA cleaning solution. Furthermore, the silicon nitride layer is formed by the SINGEN process. Therefore, the first and second silicon oxide layer and the silicon nitride layer can be etched together by the RCA cleaning solution. | 01-20-2011 |
| Patent application number | Description | Published |
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| 20080217666 | CMOS IMAGE SENSOR AND METHOD OF FABRICATING THE SAME - A floating node structure of a CMOS image sensor disposed in a floating node region defined by an isolation structure of a substrate is described. The floating node structure comprises an n-doped region within the floating node region, a p-well surrounding the periphery and the bottom of the n-doped region in the substrate within the folating node region, a surface passivation layer disposed at least on the surface of the p-well, and a contact plug coupling the n-doped region to a source follower transistor of the CMOS image sensor. | 09-11-2008 |
| 20080258188 | METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating an MOS device is provided. First, gates and source/drain regions of transistors are formed on a substrate. A photodiode doped region and a floating node doped region are formed in the substrate. Thereafter, a spacer stacked layer including a bottom layer, an inter-layer and a top layer is formed to cover each gate of the transistors. Afterwards, a first mask layer having an opening exposing at least the photodiode doped region is formed on the substrate, and then the top layer exposed by the opening is removed. Next, the first mask layer is removed, and then a second mask layer is formed on a region correspondingly exposed by the opening. A portion of the top layer and the inter-layer exposed by the second mask layer is removed to form spacers on sidewalls of the gates. | 10-23-2008 |
| 20090065833 | CMOS IMAGE SENSOR - A CMOS image sensor is described, based on a substrate and including a transfer transistor, a reset transistor, a source follower transistor, a select transistor, a photodiode and a floating node structure. The substrate includes a floating node area between the transfer transistor and the reset transistor. The floating node structure includes a P-well in the substrate within the floating node area, an N-well in the substrate outside of the floating node region, a lightly N-doped region having a portion in the P-well and another portion connected with the N-well, a heavily N-doped region in the N-well, and a contact plug for coupling the heavily N-doped region to the source follower transistor. | 03-12-2009 |
| 20090212335 | COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) IMAGE SENSOR AND FABRICATING METHOD THEREOF - A method of fabricating a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. First, an isolation structure is formed in a substrate with a photo-sensitive region and a transistor device region in the substrate. The transistor device region includes at least a region for forming a transfer transistor. A dielectric layer and a conductive layer are sequentially formed on the substrate. An ion implantation process is performed to implant a dopant into the substrate below the position for forming a gate of the transfer transistor and in the photo-sensitive region through the conductive layer and the dielectric layer. The conductive layer and the dielectric layer are patterned to at least form the gate structure of the transfer transistor on the transistor device region. Thereafter, a photo diode is formed in the substrate in the photo-sensitive region. | 08-27-2009 |
| 20110136292 | FABRICATING METHOD OF COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) IMAGE SENSOR - A method of fabricating a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. First, an isolation structure is formed in a substrate with a photo-sensitive region and a transistor device region in the substrate. The transistor device region includes at least a region for forming a transfer transistor. A dielectric layer and a conductive layer are sequentially formed on the substrate. An ion implantation process is performed to implant a dopant into the substrate below the position for forming a gate of the transfer transistor and in the photo-sensitive region through the conductive layer and the dielectric layer. The conductive layer and the dielectric layer are patterned to at least form the gate structure of the transfer transistor on the transistor device region. Thereafter, a photo diode is formed in the substrate in the photo-sensitive region. | 06-09-2011 |
