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| 20100014359 | OPERATING METHOD OF NON-VOLATILE MEMORY - An operating method of a non-volatile memory adapted for a non-volatile memory disposed on an SOI substrate including a first conductive type silicon body layer is provided. The non-volatile memory includes a gate, a charge storage structure, a second conductive type drain region, and a second conductive type source region. In operating such a non-volatile memory, voltages are applied to the gate, the second conductive type drain region, the second conductive type source region and the first conductive type silicon body layer beneath the gate, to inject electrons or holes in to the charge storage structure or evacuate the electrons from the charge storage structure by a method selected from a group consisting of channel hot carrier injection, source side injection, band-to-band tunnelling hot carrier injection and Fowler-Nordheim (F-N) tunnelling. | 01-21-2010 |
| 20100079424 | DISPLAY MEDIUM AND DISPLAY - A display medium and a display are provided. The display medium includes a thermal-sensitive solution and a number of micro particles. The micro particles are dispersed in the thermal-sensitive solution. At a first temperature, the thermal-sensitive solution is in a liquid form, such that the micro particles move freely. At a second temperature, the thermal-sensitive solution is in a colloid form, such that the micro particles are fixed. The first temperature differs from the second temperature. | 04-01-2010 |
| 20100149628 | DISPLAY - A display includes a first substrate, a first electrode, a second substrate, a second electrode and a display material layer. The first electrode is disposed on the first substrate and the second electrode is disposed on the second substrate. The display material layer is disposed between the first electrode and the second electrode. The display material layer of the invented display includes a solution and a plurality of first micro beads, wherein each of the first micro beads further has a plurality of different axis lengths in different axis directions, and the axis length in at least an axis direction is different from the axis lengths in the rest axis directions so that the first micro beads present different arrangement densities in different driving frequencies under the influence of polarized self-arrangement effect. | 06-17-2010 |
| 20100230044 | BUBBLELESS PACKAGING METHOD - A bubbleless packaging method is provided. The method is applicable to package a display element. In the method, firstly, a first substrate and a first protective layer are provided. The first protective layer is formed on the first substrate. Then, a second substrate and a second protective layer are provided. The second protective layer is formed on the second substrate. Then, a plasma treatment is performed on surfaces of the first protective layer and the second protective layer. Then, the first substrate and the second substrate are dipped into a solution after the plasma treatment. Then, the first substrate and the second substrate are laminated in the solution, wherein the first protective layer faces the second protective layer. Finally, the first substrate and the second substrate are taken out from the solution. | 09-16-2010 |
| 20100253704 | PIXEL DRIVING STRUCTURE OF DISPLAYING THREE COLORS OF PARTICLE DISPLAY AND ITS DISPLAYING COLORS METHOD - A pixel driving structure of a particle display displaying three colors and a method for displaying colors thereof are provided. The pixel driving structure includes a first substrate; a first electrode layer disposed on a surface of the first substrate; a second substrate dispoed opposite to the first substrate; a second electrode layer on the second substrate; a particle solution disposed between the first electrode layer and the second electrode layer and having a first color solution, a plurality of second color positive particles, and a plurality of third color negative particles; and an alternating/direct power supply connecting with the first and second electrode layers. A method for displaying color includes steps of applying an alternating voltage to display a first color; applying a first direct voltage to display a third color; and applying a second direct voltage to display a second color. | 10-07-2010 |
| 20110057243 | NON-VOLATILE MEMORY WITH A STABLE THRESHOLD VOLTAGE ON SOI SUBSTRATE - A non-volatile memory disposed in a SOI substrate is provided. The non-volatile memory includes a memory cell and a first conductive type doped region. The memory cell includes a gate, a charge storage structure, a bottom dielectric layer, a second conductive type drain region, and a second conductive type source region. The gate is disposed on the SOI substrate. The charge storage structure is disposed between the gate and the SOI substrate. The bottom dielectric layer is disposed between the charge storage layer and the SOI substrate. The second conductive type drain region and the second conductive type source region are disposed in a first conductive type silicon body layer next to the two sides of the gate. The first conductive type doped region is disposed in the first conductive type silicon body layer and electrically connected to the first conductive type silicon body layer beneath the gate. | 03-10-2011 |
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| 20080293199 | SINGLE-POLY NON-VOLATILE MEMORY DEVICE AND ITS OPERATION METHOD - A single-poly, P-channel non-volatile memory cell that is fully compatible with nano-scale semiconductor manufacturing process is provided. The single-poly, P-channel non-volatile memory cell includes an N well, a gate formed on the N well, a gate dielectric layer between the gate and the N well, an ONO layer on sidewalls of the gate, a P | 11-27-2008 |
| 20090168531 | METHOD FOR PROGRAMMING A MEMORY STRUCTURE - A memory structure includes a first memory cell and a second memory cell located at an identical bit line and adjacent to the first memory cell. Each memory cell includes a substrate, a source, a drain, a charge storage device, and a gate. A method for programming the memory structure includes respectively providing a first gate biasing voltage and a second gate biasing voltage to the first memory cell and the second memory cell, boosting the absolute value of a channel voltage of the first memory cell to generate electron and hole pairs at the drain of the second memory cell through gate-induced drain leakage or band-to-band tunneling, and injecting the electron of the generated electron and hole pairs into the charge storage device of the first memory cell to program the first memory cell. | 07-02-2009 |
| 20110031560 | READ-ONLY MEMORY AND METHOD OF MANUFACTURE THEREOF - A mask-defined read-only memory array is formed on a substrate, and includes a first ROM bit and a second ROM bit of opposite polarities. The first ROM bit has a first MOS transistor and a first block layer formed over a first region of the substrate. A second source/drain region of the first MOS transistor and a first diffusion region are formed in a first region of the substrate on opposite sides of the first block layer. The second ROM bit includes a second MOS transistor. | 02-10-2011 |
| 20110051526 | METHOD FOR PROGRAMMING A MEMORY STRUCTURE - A memory structure includes a first memory cell and a second memory cell located at an identical bit line and adjacent to the first memory cell. Each memory cell includes a substrate, a source, a drain, a charge storage device, and a gate. A method for programming the memory structure includes respectively providing a first gate biasing voltage and a second gate biasing voltage to the gates of the first memory cell and the second memory cell, boosting an absolute value of a channel voltage of the first memory cell to generate electron and hole pairs at the drain of the second memory cell through gate-induced drain leakage or band-to-band tunneling, and injecting the hole of the generated electron and hole pairs into the charge storage device of the first memory cell to program the first memory cell. | 03-03-2011 |
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| 20080297497 | CONTROL CIRCUIT AND METHOD OF LIQUID CRYSTAL DISPLAY PANEL - A control circuit of a liquid crystal display (LCD) panel and a method thereof are provided. The circuit includes a frame memory, a look-up table (LUT) module, and a signal processor. The frame memory provides a previous value of a pixel, and the previous value includes at least one bit of a previous frame data of the pixel. The LUT module provides a plurality of basic values according to the previous value and a current value of the pixel, and the current value includes at least one bit of a current frame data of the pixel. The signal processor produces a driving value according to the basic values and replaces the current frame data with the driving value. | 12-04-2008 |
| 20090010339 | IMAGE COMPENSATION CIRCUIT, METHOD THEREOF, AND LCD DEVICE USING THE SAME - Input image signals are spatially and temporally compensated. First, gray scales of a target pixel in a current frame and in a previous frame are compared to determine whether to spatially and temporally compensate the input image signals or not. Next, in accordance to weight parameters and gray scales of pixels adjacent to the target pixel, the target pixel of the current frame is spatially compensated. Further, based on the gray scale of the target pixel of the previous frame, the target pixel of the current frame after spatial compensation is temporally compensated. | 01-08-2009 |
| 20090185742 | METHOD FOR IMAGE COMPENSATION - In an image compensation method, formats of images are identified based on ambient color quantity information. If the image is in text format or of high contrast, over compensation is barred to avoid edge effect. A compensation coefficient is set basing on edge eigenvalue of images. The compensation value is fine tuned based on a threshold value to obtain finer compensation result. | 07-23-2009 |
