| Patent application number | Description | Published |
|---|
| 20080199978 | System and method for film stress and curvature gradient mapping for screening problematic wafers - A method of testing a wafer after a current top layer is formed over the wafer. Stress data is collected for the wafer after forming the current top layer. The stress data is derived from changes in wafer curvature. The stress data includes: stress-xx in an x direction and stress-yy in a y direction for each area of a set of finite areas on the wafer, the stress-xx and stress-yy both being derived from wafer-curvature-change-xx in the x direction for each area of the set of finite areas and from wafer-curvature-change-yy in the y direction for each area of the set of finite areas; and the stress-xy being derived from wafer-curvature-change-xy, wherein wafer-curvature-change-xy is a change in wafer twist in the x-y plane for each area of the set of finite areas. A stress gradient vector (and/or its norm) is calculated and used to evaluate the investigating single or multiple accumulated layer. | 08-21-2008 |
| 20090166768 | Semiconductor device with metal silicides having different phases - A fully silicided gate with a selectable work function includes a gate dielectric over the substrate, a first metal silicide layer over the gate dielectric, and a second metal silicide layer wherein the first metal silicide has a different phase then the second metal silicide layer. The metal silicide layers comprises at least one alloy element. The concentration of the alloy element on the interface between the gate dielectric and the metal silicide layers influence the work function of the gate. | 07-02-2009 |
| 20100182767 | BACKLIGHT ASSEMBLY - Backlight assembly includes a plurality of light guide plates, a plurality of light modules, and a plurality of driving units separately in control of corresponding light modules which are configured at the incident sides of the LGPs. Each light module faces two adjacent LGPs such that the driving unit drives the light module to provide light for two adjacent LGPs at the same time. As local dimming function is switched, besides the power-saving and the high contrast, the local edge effect due to the joint of the LGPs can be reduced. | 07-22-2010 |
| 20100246164 | Hollow Edge-Type Backlight Module with Light-Emitting Array - A hollow edge-type backlight module with a light-emitting array and a display apparatus containing the same are disclosed. The hollow edge-type backlight module mainly utilizes a hollow reflection structure to replace a light-guide plate structure, and forms a light-emitting unit by collaborating with an edge-type light source, and forms a light-emitting array by appending together a plurality of light-emitting units. The reflection structure of each light-emitting unit has a horizontal surface and a reflective surface connected to the horizontal surface, wherein there is an angle included between the reflective surface and a surface extended from the horizontal surface, and the light source is disposed adjacent to the horizontal surface. A diffuser of the hollow edge-type backlight module is disposed above the reflective surface and the horizontal surface, and the diffuser, the light source, the horizontal surface and the reflective surface define at least one air cavity. | 09-30-2010 |
| 20100273324 | METHODS OF MANUFACTURING METAL-SILICIDE FEATURES - A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening. The metal-silicide layer may then be annealed. | 10-28-2010 |
| 20100279436 | Inspection Method For Integrated Circuit Manufacturing Processes - The present disclosure provides a method for manufacturing integrated circuit devices including an electron beam inspection. The method includes forming a silicide region on a substrate. In an embodiment, the silicide region is formed to provide contact to a device feature such as a source or drain region. An electron beam scan is then performed on the substrate. The electron beam scan includes a first scan and a second scan. The first scan includes a lower landing energy than the second scan. In an embodiment, the first scan provides a dark silicide image analysis and a bright image analysis. In an embodiment, the second scan provides a dark silicide image analysis. The method continues to form a conductive plug after performing the electron beam scan. | 11-04-2010 |
| 20100314698 | METHODS OF MANUFACTURING METAL-SILICIDE FEATURES - A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening. The metal-silicide layer may then be annealed. | 12-16-2010 |
| 20110157917 | Backlight Module with Localized Light Source Control - A backlight module with localized light source control is provided. The backlight module includes a first light guide plate, a second light guide plate, and a plurality of luminous elements. The first light guide plate includes a first side. The second light guide plate includes a second side. The first and second light guide plates are disposed along a first direction, so that the first side of the first light guide and the second side of the second light guide face to each other. The luminous elements are respectively disposed along the first side and the second side and emit lights thereto, wherein at least a portion of the luminous elements disposed along the first side and the second side form a light source module so as to act simultaneously. | 06-30-2011 |
