Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Chih Wei
Chih Wei Chang, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100029974 | Catalytic system and method for oxidative carbonylation reaction - A catalytic system for an oxidative carbonylation reaction is provided, which includes a metal organohalogen catalyst, at least one organic nitrogen-containing heterocyclic adjuvant, and an inorganic co-catalyst, wherein the inorganic co-catalyst is selected from carboxylates, nitrates, halides, oxides, and complexes of lead, lanthanum, titanium, tungsten, and dysprosium. The process for producing a dialkyl carbonate by performing a liquid-phase oxidative carbonylation reaction of an alcohol in the presence of the catalytic system is significantly improved, and the conversion and selectivity of the catalytic reaction are increased. | 02-04-2010 |
| 20100219873 | SIGNAL SOURCE DEVICES - A signal source device is provided and includes a plurality of latch units, an inverter unit, and a voltage-shifting unit, which may include a capacitance unit. The plurality of latch units are substantially cascaded. The inverter unit is coupled to the latch units. The voltage-shifting unit has a first terminal coupled to the inverter unit and one of the latch units and a second terminal receiving a first input signal, for shifting a voltage level at the first terminal according to the first input signal. | 09-02-2010 |
| 20110128899 | ELECTRONIC DEVICE AND POWER SAVING METHOD THEREOF - An electronic device and a power saving method thereof are provided. The electronic device includes a network module and a power saving module, wherein the network module connects to an access point (AP). The method includes executing an AP search operation at a predetermined time interval by the network module, and determining whether the electronic device is in a specific state by the power saving module. The method also includes disabling the network module from executing the AP search operation as long as the electronic device is still in the specific state. As a result, the unnecessary AP search operations can be avoided, and the purpose of saving power can be achieved. | 06-02-2011 |
Chih Wei Chang, Ta-Sheh TW
| Patent application number | Description | Published |
|---|---|---|
| 20110152558 | PROCESS FOR PRODUCING DIARYL CARBONATES - The present invention relates to a process for producing diaryl carbonates, which is to synthesize diaryl carbonates by oxidative carbonylation of phenols with carbon monoxide and oxygen, and in particular, to synthesize diphenyl carbonate from phenol. The present invention is characterized in that a catalytic system comprising a metal halide catalyst and one or more cocatalysts of nitrogenous heterocyclic compounds is used to increase the convertibility, selectivity and yield of this catalytic reaction. | 06-23-2011 |
Chih Wei Chen, Hsinchu County TW
| Patent application number | Description | Published |
|---|---|---|
| 20120320045 | Image Processing Method and Apparatus Thereof - An image processing method includes receiving a two-dimensional (2D) input image; detecting an image of a block in the 2D image to generate depth information for the block; and determining a depth of a sub-block image within the block according to the depth information, accurately estimating block-based depth information according to image characteristics of the block and obtaining a depth of a given block/pixel according to the depth information to generate improved stereoscopic images. | 12-20-2012 |
| 20130038789 | Frame Rate Conversion Method and Image Processing Apparatus Thereof - A frame rate conversion method includes detecting a plurality of input frames to determine an image mode corresponding to the plurality of input frames; performing motion estimation on the plurality of input frames to generate a motion estimation result; and interpolating a plurality of interpolated frames according to the determined image mode, the motion estimation result and the plurality of input frames to generate a plurality of converted output frames, wherein a frame rate of the outputted frames is different from that of the input frames. | 02-14-2013 |
Chih Wei Chou, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20100020479 | ELECTRONIC APPARATUS - The invention discloses an electronic apparatus comprising a motherboard, a connector, a card member and a first holder. The connector is disposed on the motherboard and the card member is disposed on the connector. The motherboard comprises a first fixing portion and the card member comprises a second fixing portion. The first holder comprises a third fixing portion fixed to the first fixing portion of the motherboard and a fourth fixing portion fixed to the second fixing portion of the card member. Accordingly, once the motherboard or the card member is hit or pulled by an external force, since two ends of the first holder respectively fix the card member and the motherboard, the card member will not be detached from the connector, such that the card member can be connected to the connector well. | 01-28-2010 |
Chih Wei Huang, Linyuan Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20100295070 | LIGHT EMITTING DEVICE - A light emitting device comprises a plurality of LED chips (“lateral” or “vertical” conducting) operable to generate light of a first wavelength range and a package for housing the chips. The package comprises: a thermally conducting substrate (copper) on which the LED chips are mounted and a cover having a plurality of through-holes in which each hole corresponds to a respective one of the LED chips. The holes are configured such that when the cover is mounted to the substrate each hole in conjunction with the substrate defines a recess in which a respective chip is housed. Each recess is at least partially filled with a mixture of at least one phosphor material and a transparent material. In a device with “lateral” conducting LED chips a PCB is mounted on the substrate and includes a plurality of through-holes which are configured such that each chip is directly mounted to the substrate. For a device with “vertical” conducting LED chips the LED chips are mounted on a diamond like carbon film. | 11-25-2010 |
| 20110180804 | SOLID STATE LIGHT EMITTING DEVICE - A light emitting device comprises: an LED chip array comprising a plurality of LEDs formed on a single die (monolithic chip array) and at least one discrete LED that is separate from the LED chip array connected in series with the LED chip array. In an AC-drivable device the LED chip array is AC-drivable and two or more discrete LEDs are configured to be AC-drivable. The device can further comprise a package in which the LED chip array and discrete LED(s) are mounted. The discrete LEDs are configured such that positive and negative half wave periods of an AC drive voltage are mapped onto oppositely connected LED such that oppositely connected LED chips are alternately operable on a respective half wave period. | 07-28-2011 |
| 20120018768 | LED-BASED LIGHT EMITTING DEVICES - An LED-based light emitting device comprises: a substrate; at least one LED die mounted to the substrate; at least one bond wire that electrically connects the LED die; and a light transmissive material (silicone) encapsulating the at least one LED die and at least one bond wire. The at least one bond wire has a hook-shaped portion that loops back on itself. | 01-26-2012 |
Chih Wei Huang, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20100128352 | LIGHT-GUIDING PLATE AND MANUFACTURING METHOD THEREOF - The invention discloses a light-guiding plate and a manufacturing method thereof. The light-guiding plate includes a light-guiding substrate, a first shielding layer, and a second shielding layer. The light-guiding substrate has a first surface and a second surface opposite to the first surface. The first shielding layer is disposed on the first surface and includes a first light-transmitting portion. The second shielding layer is disposed on the second surface and includes a second light-transmitting portion. Thereby, light emitted from a light source could pass through the first light-transmitting portion, the light-guiding substrate, and the second light-transmitting portion, so that a light-halo phenomenon does not occur on the light-guiding plate. | 05-27-2010 |
| 20120285245 | SENSING APPARATUS - A sensing apparatus includes an acceleration sensing unit, for measuring an acceleration applied to a proof mass, further including: a proof mass; a carrier signal source, for providing a carrier signal; a capacitive half-bridge, including a first and a second capacitor, wherein each capacitor is coupled to the proof mass and the carrier signal source, one with a positive electrode and the other one with a negative electrode, and the acceleration applied to the proof mass makes the carrier signal flow through the first and the second capacitor so that the first capacitor and the second capacitor respectively generates a first voltage and a second voltage variation which have opposite phases with each other; and an instrumentation amplifier, for receiving and amplifying the first voltage and the second voltage variation, whereby the magnitude and the direction of the acceleration applied to the proof mass is determined. | 11-15-2012 |
Chih Wei Kuo, Yongkang City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110291995 | STERILIZING DEVICE AND MANUFACTURING METHOD FOR STERILIZING DEVICE - A sterilizing device comprises a light guiding member and an ultraviolet (UV) light source. The light guiding member has a surface. The UV light source emits UV light rays such that the UV light rays are guided into the guiding member based on a total internal reflection. When an object contacts or comes close to the surface, an evanescent wave from the UV light rays irradiates on the object. | 12-01-2011 |
Chih Wei Lee, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20090315793 | Electronic device, antenna thereof, and method of forming the antenna - The antenna of the invention includes a transceiver unit and a dielectric unit. The transceiver unit has a ground portion, a radial portion, a conductive portion and a feed portion. The ground portion and the radial portion are disposed apart in parallel, so as to form a space therebetween. The distance between the ground portion and the radial portion is defined as a transceiver unit height. The dielectric unit is disposed in the space. That is, the dielectric unit is disposed between the ground portion and the radial portion. The dielectric unit has a dielectric unit thickness less than the transceiver unit height. In one embodiment, the ratio of the dielectric unit thickness to the transceiver unit height is preferably between 0.4 and 0.7. | 12-24-2009 |
| 20100190528 | Signal Processing Device - The present disclosure provides a signal processing device comprising: a first substrate, one side surface thereof being provided with at least a first contact and a second contact while the other side surface thereof being provided with at least a third contact and a fourth contact, there being an electrical connection between the first and third contacts; a second substrate, one side surface thereof being provided with at least an integrated circuit or an antenna; and a first connecting portion for connecting the first and second substrates; wherein the second and fourth contacts are electrically connected to the integrated circuit or antenna via the first connecting portion. | 07-29-2010 |
| 20100259904 | Signal Conversion Device - The present invention provides a signal conversion device comprising: a substrate having a first surface and a second surface, the first surface being provided with a first contact region comprising at least a first contact and a second contact while the second surface being provided with a second contact region comprising at least a third contact and a fourth contact; wherein there is an electrical connection between the first and third contacts, and the second and fourth contacts are electrically connected to an IC fabricated using Wafer Level Chip Scale Package (WLCSP) or Chip On Film (COF) technology, and wherein the IC is disposed at the first surface or the second surface. | 10-14-2010 |
| 20100309642 | SIGNAL CONVERSION DEVICE WITH DUAL CHIP - The present invention provides a dual chip signal conversion device, comprising: a carrier, one side surface thereof being provided with at least a first contact and a second contact while the other side surface thereof being provided with at least a third contact and a fourth contact; a first chip disposed at one side surface of the carrier and electrically connected to the second and fourth contacts; a second chip disposed at one side surface of the carrier and electrically connected to the first chip; and an antenna disposed within the carrier and electrically connected to the second chip. | 12-09-2010 |
| 20110065476 | ANTENNA DEVICE - The present invention provides an antenna device comprising: a contact substrate with a plurality of electrical contacts, an antenna substrate, and a connecting member connected between said contact substrate and said antenna substrate. Said connecting member is flexible and foldable and is provided with at least one corner portion. Said corner portion defines at least one horizontal section and at least one vertical section to render the antenna device better adaptability. | 03-17-2011 |
| 20110105183 | ELECTRONIC WALLET DEVICE - The present invention provides an electronic wallet device for a mobile phone comprising a SIM card interface, comprising: a processing unit configured to provide a top-up service interface to the mobile phone and to receive and convert a first transaction instruction from the mobile phone into a top-up instruction; an authentication unit provided with an electronic wallet and configured to receive and convert the top-up instruction into an authorized top-up instruction and to write an amount to the electronic wallet according to the authorized top-up instruction; and an NFC antenna electrically connected to the authentication unit. | 05-05-2011 |
Chih Wei Tsai, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090043945 | Non-Volatile Memory System and Method for Reading Data Therefrom - A non-volatile memory system and a method for reading data therefrom are provided. The data comprises a first sub-data and a second sub-data. The non-volatile memory system comprises a first storage unit and a second storage unit, adapted for storing the two sub-data respectively. The first storage unit reads a first command from the controller, and stores the first sub-data temporarily as the first temporary sub-data according to the first command. The second storage unit reads a second command from the controller, and stores the second sub-data temporarily as the second temporary sub-data according to the second command. The first temporary sub-data is read from the first storage unit. Then, the first storage unit reads a third command from the controller. The second temporary sub-data is also read from the second storage unit while reading the third command. The time for reading data from the non-volatile memory system is reduced. | 02-12-2009 |
| 20090106513 | Method for copying data in non-volatile memory system - A method for copying data in a non-volatile memory system is disclosed. The method includes calculating a number of errors of a first set of data from a source block of the non-volatile memory saved in the buffer of the controller, transmitting the first set of data saved in the buffer of the controller to a buffer of the non-volatile memory when the number of errors is lower than a threshold, and programming a destination block of the non-volatile memory with the first set of data saved in the buffer of the non-volatile memory when the number of errors is lower than the threshold. | 04-23-2009 |
| 20100030933 | NON-VOLATILE MEMORY STORAGE DEVICE AND OPERATION METHOD THEREOF - A non-volatile memory storage device has a non-volatile memory, e.g., a flash memory, and a controller coupled to the non-volatile memory. The controller comprises a plurality of control circuits and an arbitration circuit. Each control circuit is configured to generate a request to update the chip-enable (CE) signals for non-volatile memory, and the arbitration circuit is configured to determine when the requests are acknowledged. The arbitration circuit generates acknowledge signals to the control circuits when all of the requests of the control circuits have been received by the arbitration circuit. The CE signals for non-volatile memory are updated when requests are acknowledged. | 02-04-2010 |
Chih Wei Wang, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110047328 | SIZE PLANNING METHOD FOR STORAGE DEVICE, AND READ AND ACCESS CORRECTING METHODS THEREOF - A size planning method for a storage device, and read and access correcting methods thereof are described. When a computer device is booted, a size of a physical storage device is managed. The management method includes the following steps. A physical storage device connected to a computer device is searched. When a size of the physical storage device is larger than a maximum disk size, a current disk having a specified size is partitioned from the physical storage device. Various parameters of a logical fixed disk parameter table (FDPT) extension table of the current disk are set. A residual size of the physical storage device is partitioned into several disks having the specified size, and the corresponding logical FDPT extension tables are set until the residual size is smaller than the maximum disk size. | 02-24-2011 |
Chih Wei Weng, Sindian City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080305828 | Dual-focus lens and electronic device having the same - A dual-focus lens includes a stop and at least two lenses. One of the lenses is relatively close to the stop, and formed with a first transmission area and a second transmission area. When the at least two lenses are fixed without shifting any lens, an image beam reflected from a first object distance can pass through the first transmission area to form a clear optical image on an image formation area located at a fixed position, and an image beam reflected from a second object distance can pass through the second transmission area to form a clear optical image on the same image formation area, so as to achieve a purpose of providing double focuses without any active elements or changing the image formation distance. Physical structures of the first transmission area and the second transmission area can be selected from the group consisting of two different thickness areas formed on an inner circle and an outer ring of one of said lenses, two different curvature areas formed on the inner circle and the outer ring, a glass having an inner circular opening close to one of said lenses to substantially provide two different thickness areas, and one Fresnel lens area and one normal lens area formed on the inner circle or the outer ring to provide two different curvature areas. | 12-11-2008 |
Chih-Wei Chan, Taoyuan Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20130056902 | MOTOR AND MANUFACTURING METHOD THEREOF AND FAN - A method for manufacturing a motor includes the following steps of: providing a substrate with an opening and a bushing; disposing the bushing within the opening of the substrate; providing a cushioning material disposed between the substrate and the bushing by injection molding. | 03-07-2013 |
Chih-Wei Chiang, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080311690 | ELIMINATE RELEASE ETCH ATTACK BY INTERFACE MODIFICATION IN SACRIFICIAL LAYERS - Methods of making a microelectromechanical system (MEMS) device are described. In some embodiments, the method includes forming a sacrificial layer over a substrate, treating at least a portion of the sacrificial layer to form a treated sacrificial portion, forming an overlying layer over at least a part of the treated sacrificial portion, and at least partially removing the treated sacrificial portion to form a cavity situated between the substrate and the overlying layer, the overlying layer being exposed to the cavity. | 12-18-2008 |
| 20110188109 | ELECTROMECHANICAL DEVICE WITH OPTICAL FUNCTION SEPARATED FROM MECHANICAL AND ELECTRICAL FUNCTION - A microelectromechanical (MEMS) device includes a substrate, a movable element over the substrate, and an actuation electrode above the movable element. The movable element includes a deformable layer and a reflective element. The deformable layer is spaced from the reflective element. | 08-04-2011 |
Chih-Wei Chiang, Tainan City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120242818 | METHOD FOR OPERATING ELECTRONIC DEVICE AND ELECTRONIC DEVICE USING THE SAME - An electronic device includes a first image sensor and a central processing unit (CPU). The first image sensor detects at least one frame on the user's side. The CPU determines an expression of the user by the at least one frame on the user's side, and determines whether the expression of the user matches a predetermined expression defining a function operation of the electronic device. The CPU performs the functional operation when the expression of the user matches the predetermined expression. | 09-27-2012 |
Chih-Wei Chien, Tainan City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120002155 | METHOD AND SYSTEM FOR REPAIRING FLAT PANEL DISPLAY - The present invention provides a method and system for repairing flat panel display, which repairing hot pixels of the flat panel display by femtosecond laser. The flat panel display comprises a LCD module and a color filter disposed on the top of the LCD module, wherein the surface of the color filter corresponding to the LCD module further has a color photoresist layer. The femtosecond laser is projected onto the color photoresist layer corresponding to the hot pixels such that a phenomenon of nonlinear multiple photons absorption can be occurred to change property of the color photoresist layer so as to transform the hot pixels into dead pixels. | 01-05-2012 |
Chih-Wei Chien, Nantou County TW
| Patent application number | Description | Published |
|---|---|---|
| 20110166753 | WALKING ASSISTANCE DEVICE WITH DETECTION MEMBERS - The present invention relates to a walking assistance device with detection function, which includes a movable frame, a power transmission device mounted under the frame, a detachable power unit mounted on the frame, at least one signal transmitter and at least one signal receiver for detecting the distances from a first portion and a second portion on the user's body to a correspond position of the frame respectively. According to the distances detected, a control unit sends signals to the power transmission device to maintain the distance between the user and the frame within a preset range, therefore to provide supporting forces when the user needs. | 07-07-2011 |
Chih-Wei Chou, Taichung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110278497 | NANOMETAL DISPERSION AND METHOD FOR PREPARING THE SAME - A nanometal dispersion and a method for preparing a nanometal dispersion are provided. The method comprises mixing a metal seed crystal aqueous solution, a polysaccharide aqueous solution, and a metal compound aqueous solution, followed by allowing the resulting mixture to conduct a reduction-oxidation reaction to form a nanometal. The produced nanometal dispersion comprises a polysaccharide and a nanometal. The polysaccharide is composed of N-actyl-D-glucosamine and glucuronic acid, and the nanometal has multimorphology. | 11-17-2011 |
| 20110281991 | CORE-SHELL METAL NANOPARTICLES AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing core-shell metal nanoparticles is provided. The method comprises providing a first solution containing a metal ion; providing a second solution containing Arabinogalactan and having a pH value ranging from about 1 to about 13; mixing the first solution and the second solution to form a third solution; and enabling the third solution to perform an oxidation-reduction reaction to form the core-shell metal nanoparticles. The core-shell metal nanoparticles comprise a core composed of metal; and a shell, composed of Arabinogalactan, covering the surface of he core. | 11-17-2011 |
Chih-Wei Chou, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120063080 | SERVER - A server includes a casing, a motherboard, a power supply unit and a pair of expansion modules. The motherboard is disposed in the casing, and the motherboard includes two slots disposed in the casing. The power supply unit is disposed in the casing and under the motherboard. The expansion modules are disposed in the casing, and each of the expansion modules includes a connecting card and a plurality of expansion cards. When the connecting card is electrically coupled to one of the slots of the motherboard, the expansion modules are disposed at two opposite sides of the motherboard correspondingly. | 03-15-2012 |
Chih-Wei Ho, New Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120303976 | DATA STORAGE APPARATUS - A data storage apparatus includes a storage unit; a read/write console connected electrically to an external power supply source; a storage function unit; a power switch connected electrically to the power supply source, the storage unit and the storage function unit in such a manner that in a normal condition, the storage unit is charged electrically by the power supply source via the power switch, and that in an abnormal condition, the storage unit is supplied with electrical power from the power switch via the storage function unit so as to permit continuation of the read/write operation within the storage unit. A current detection unit detects current of the storage function unit in the abnormal condition and upon detecting current of the storage function unit reaching below a predetermined threshold value, the current detection unit generates and transmits a reset signal to the read/write console such that the read/write console orders a reset of the read/write operation. | 11-29-2012 |
Chih-Wei Hsiung, Grand Cayman KY
| Patent application number | Description | Published |
|---|---|---|
| 20110291211 | IMAGE SENSOR AND RELATED FABRICATING METHOD THEREOF - A fabricating method of an image sensor includes the steps of: providing a substrate; forming sensing elements on the substrate; forming microlenses on the sensing elements; filling a stuffed material on the microlenses, and air regions are formed in the stuffed material; and forming optical filters on the stuffed material. | 12-01-2011 |
| 20120193691 | BACK-SIDE ILLUMINATION IMAGE SENSOR - A back side illumination (BSI) image sensor includes at least one pixel. The pixel area includes a photo diode and a transfer transistor. The transfer transistor has a control electrode made of a gate poly and a gate oxide for receiving a control instruction, a first electrode coupled to the photo diode, and a second electrode, wherein an induced conduction channel of the transfer transistor partially surrounds a recessed space which is filled with the gate poly and the gate oxide of the first transistor. | 08-02-2012 |
Chih-Wei Hu, Taichung TW
| Patent application number | Description | Published |
|---|---|---|
| 20130075042 | LAMINATOR WITH A CORNER CUTTER - The present invention provides a laminator with a corner cutter including a main body, a laminating device and a cutting device. The main body includes a receiving space. The main body is horizontally formed with an entering slot, an exiting slot, a penetrating groove and a corner-cutting recess. The main body having two lateral sides formed between the entering slot and the exiting slot, the corner-cutting recess being disposed at one of the lateral sides. The laminating device disposed in the receiving space includes two rolling rods, a driving portion and two heaters. The two rolling rods are heated by the two heating members. The driving portion drives the two rolling rods to rotate. The cutting device includes a pushing portion and a cutting portion. The cutting device is disposed at one side of the receiving space where corresponding to the corner-cutting recess. | 03-28-2013 |
Chih-Wei Hu, Taoyuan City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120161099 | NITIRDE SEMICONDUCTOR LIGHT EMITTING DIODE - A nitride semiconductor LED device including an N-type doped layer, an active layer and a P-type doped layer is provided. The active layer is disposed on the N-type doped layer and includes at least one quantum well structure. The quantum well structure includes two quantum barrier layers and a quantum well sandwiched between the quantum barrier layers. The quantum barrier layer is a super-lattice structure including a quaternary nitride semiconductor. The P-type doped layer is disposed on the active layer. | 06-28-2012 |
Chih-Wei Hung, Hsin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090086540 | METHOD OF OPERATING NON-VOLATILE MEMORY ARRAY - A method of operating a non-volatile memory array is provided. The non-volatile memory array includes a substrate, a number of rows of memory cells, a number of control gate lines, a number of select gate lines, a number of source lines, and a number of drain lines. The operating method includes applying 5V voltage to a selected source line, 1.5V voltage to a selected select gate line, 8V voltage to non-selected select gate lines, 10-12V voltage to a selected control gate line and 0-−2V voltage to non-selected control gate lines and the substrate. The drain lines are grounded so that source-side injection (SSI) is triggered to inject electrons into a floating gate of the selected memory cell in a programming operation. | 04-02-2009 |
| 20090109762 | METHOD FOR PROGRAMMING NON-VOLATILE MEMORY - A method for programming non-volatile memory utilizes substrate hot carrier effect to conduct programming operations. A forward bias voltage is applied between an N-type well region and a P-type well region so as to inject electrons in the N-type well region into the P-type well region. After that, the electrons are accelerated by a depletion region established by a voltage applied to a source region and a drain region, and a vertical electrical field established between a control gate and the P-type well region further forces the electrons to be injected into a charge storage layer. Since the present invention adopts the substrate hot carrier effect to inject carriers into the charge storage layer, the required program operation voltage is low, which benefits to save power consumption and enhance the reliability of the device. | 04-30-2009 |
| 20090142910 | MANUFACTURING METHOD OF MULTI-LEVEL NON-VOLATILE MEMORY - A manufacturing method of a multi-level non-volatile memory includes following steps. First, a tunneling dielectric layer and a charge storage layer are sequentially formed on the substrate. At least two stacked layers are formed on the charge storage layer. Every two stacked layers include an inter-gate dielectric layer, a control gate, and a cap layer in sequence. Next, the charge storage layer between the two stacked layers is removed to form a first trench. After spacers are formed at the sidewalls of the two stacked layers and of the first trench, the charge storage layer outside the two stacked layers is removed. Thereafter, a dielectric layer is formed on the substrate. An assist gate is formed between the two stacked layers and a select gate is respectively formed on the sidewalls outside the two stacked layers. A doped region is then formed in the substrate outside the two stacked layers. | 06-04-2009 |
| 20090238002 | NAND TYPE NON-VOLATILE MEMORY AND OPERATING METHOD THEREOF - A NAND type non-volatile memory having a plurality of bit lines and a dummy bit line is provided. The intersections of each of the bit lines with a first select gate line, a plurality of word lines, and a second select gate line are corresponding to a memory cell row. The intersections of the dummy bit line with the first select gate line, the word lines, and the second select gate line are corresponding to a dummy memory cell row. A source line is disposed on the substrate at one side of the memory cell rows, wherein the dummy memory cell row and the dummy bit line are served as a current path for connecting the source line. | 09-24-2009 |
| 20100277986 | NON-VOLATILE FIELD PROGRAMMABLE GATE ARRAY - A non-volatile memory device includes a first metal-oxide-semiconductor (CMOS) device coupled to a bit line and a word line and a second CMOS device coupled to the first CMOS device. The second CMOS device is also coupled to a complementary bit line and a complementary word line. The first and second CMOS devices are complementary to one another. An output node is coupled between the first CMOS device and the second CMOS device. A method of programming a non-volatile field programmable gate array (NV-FPGA) includes coupling an information handling system to the FPGA, performing a block erase of a plurality of memory cells in the FPGA, verifying that the block erase is successful, programming an upper page of the FPGA, verifying that the upper page programming is successful, programming a lower page of the FPGA and verifying that the lower page programming is successful. | 11-04-2010 |
| 20120025869 | NON-VOLATILE FIELD PROGRAMMABLE GATE ARRAY - A non-volatile memory device includes a first metal-oxide-semiconductor (CMOS) device coupled to a bit line and a word line and a second CMOS device coupled to the first CMOS device. The second CMOS device is also coupled to a complementary bit line and a complementary word line. The first and second CMOS devices are complementary to one another. An output node is coupled between the first CMOS device and the second CMOS device. A method of programming a non-volatile field programmable gate array (NV-FPGA) includes coupling an information handling system to the FPGA, performing a block erase of a plurality of memory cells in the FPGA, verifying that the block erase is successful, programming an upper page of the FPGA, verifying that the upper page programming is successful, programming a lower page of the FPGA and verifying that the lower page programming is successful. | 02-02-2012 |
Chih-Wei Lee, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090116294 | METHOD OF PROGRAMMING CELL IN MEMORY AND MEMORY APPARATUS UTILIZING THE METHOD - A method of programming a first cell in a memory, wherein the first cell has a first S/D region and shares a second S/D region with a second cell that has a third S/D region opposite to the second S/D region. The channels of the first and the second cells are turned on, a first voltage is applied to the first S/D region, a second voltage is applied to the second S/D region and a third voltage is applied to the third S/D region. The second voltage is between the first voltage and the third voltage, and the first to third voltages make carriers flow from the third S/D region to the first S/ID region and cause hot carriers in the channel of the first cell to be injected into the charge storage layer of the first cell. | 05-07-2009 |
Chih-Wei Lee, Nan-Tou Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090195264 | High temperature test system - A high temperature test system is adapted for testing a device under test (DUT) under a high temperature environment. The high temperature test system includes a preheating unit, a first moving unit, a testing unit, and a second moving unit. The preheating unit is adapted for preheating the DUT. The first moving unit is adapted for removing the preheated DUT from the preheating unit. The testing unit is adapted for placement of the DUT removed by the first moving unit, for testing the DUT, and for providing the high temperature environment to the DUT during testing. The second moving unit is adapted for removing the DUT that has passed testing from the testing unit. | 08-06-2009 |
Chih-Wei Liang, Fusing Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20110007568 | NAND TYPE ROM - The invention discloses a NAND type ROM. The NAND type ROM comprises a plurality of bit lines, a plurality of word lines, a first source line, a second source line, and a plurality of NAND strings. The bit lines comprise a plurality of upper bit lines, first lower and second lower bit lines. The first lower and second lower bit lines are alternately arranged in parallel, and the plurality of word lines are vertically arranged to each bit lines. The first and second source line are respectively connected to the plurality of first and second lower bit lines. The plurality of NAND strings comprise a plurality of first and second NAND strings. The first NAND strings are connected to the upper bit lines, word lines, and first lower bit lines. The second NAND strings are connected to the upper bit lines, word lines, and second lower bit lines. | 01-13-2011 |
Chih-Wei Liu, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080208944 | DIGITAL SIGNAL PROCESSOR STRUCTURE FOR PERFORMING LENGTH-SCALABLE FAST FOURIER TRANSFORMATION - A digital signal processor structure by performing length-scalable Fast Fourier Transformation (FFT) discloses a single processor element (single PE), and a simple and effective address generator are used to achieve length-scalable, high performance, and low power consumption in split-radix-2/4 FFT or IFFT module. In order to meet different communication standards, the digital signal processor structure has run-time configuration to perform for different length requirements. Moreover, its execution time can fit the standards of Fast Fourier Transformation (FFT) or Inverse Fast Fourier Transformation (IFFT). | 08-28-2008 |
| 20100254161 | STRUCTURE FOR CHRISTMAS LIGHT - A structure for LED Christmas light is provided, including a light holder, being a hollow body having a separating part connected to the inner wall of the light holder to divide the hollow interior of the light holder into two cavities. Each of the two opposite sides of the inner wall of the light holder connected to the separating part forms a slot and face the surface of the separating part of the two cavities, with each having a guiding channel. Two wire sets are fixed inside the two cavities. An LED light bulb has a positive pin and a negative pin inserted inside the guiding channel, respectively, and being electrically connected to the wire sets. A light cap has a holding part passing the LED light bulb to tightly engage to the top of the light holder so as to fix the LED light bulb to the light holder. | 10-07-2010 |
Chih-Wei Liu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090172683 | MULTICORE INTERFACE WITH DYNAMIC TASK MANAGEMENT CAPABILITY AND TASK LOADING AND OFFLOADING METHOD THEREOF - A multicore interface with dynamic task management capability and a task loading and offloading method thereof are provided. The method disposes a communication interface between a micro processor unit (MPU) and a digital signal processor (DSP) and dynamically manages tasks assigned by the MPU to the DSP. First, an idle processing unit of the DSP is searched, and then one of a plurality of threads of the task is assigned to the processing unit. Finally, the processing unit is activated to execute the thread. Accordingly, the communication efficiency of the multicore processor can be effectively increased while the hardware cost can be saved. | 07-02-2009 |
| 20100050184 | MULTITASKING PROCESSOR AND TASK SWITCHING METHOD THEREOF - A multitasking processor and a task switching method thereof are provided. The task switching method includes following steps. A first task is executed by the multitasking processor, wherein the first task contains a plurality of switching-point instructions. An interrupt event occurs. Accordingly, the multitasking processor temporarily stops executing the first task and starts to execute a second task. The multitasking processor executes a handling process of the interrupt event and sets a switching flag. After finishing the handling process of the interrupt event, the multitasking processor does not perform task switching but continues to execute the first task, and the multitasking processor only performs task switching to execute the second task when it reaches a switching-point instruction in the first task. | 02-25-2010 |
Chih-Wei Lo, Jhonghe City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090323332 | LED ILLUMINATION DEVICE - A LED illumination device is revealed. The LED illumination device includes a LED array and a holder. The LED array is formed by a plurality of LED arranged in a specific pattern. The holder is covered in front of the LED array for waterproof protection. A hole array is disposed on a corresponding plate of the holder and the corresponding plate faces the LED array. A plurality of second lenses for LED are respectively mounted into each hole of the hole array so as to form a second lens array. Thus light emitted from the LED array passes through the second lens array to be projected. | 12-31-2009 |
| 20100149801 | LED OPTICAL LENS AND ILLUMINATION DEVICE THEREOF - A LED optical lens and an illumination device thereof are revealed. The optical lens includes a light-source side surface and an image side surface of the LED optical lens that both are designed respectively according to mathematical expressions of freeform surfaces such as Anamorphic formula and Toric formula Thus the optical lens has different curvatures along different axes. After light from LED emitting into the optical lens at a fixed incident angle, emergent light with different divergence angles along different axes is generated. For example, the divergence angle along the long axis is larger than that along the short axis. Therefore a uniform and near rectangular distribution pattern is formed on the target area Moreover, a plurality of optical lenses aligned along the same axes is arranged at a holder to form a lens array. The lens array is used together with a LED array so as to form a LED illumination device. | 06-17-2010 |
| 20100265325 | LANE DEPARTURE WARNING SYSTEM - A lane departure warning system (LDWS) installed on vehicles is revealed. The LDWS includes a camera that captures road images and the data of images is sent to an electronic control unit (ECU) for processing and recognition. The ECU is directly connected with a global positioning system (GPS) that provides vehicle speed signals so as to check whether dangerous driving occurs. Once the dangerous driving occurs, a warning unit is turned on to send an alert. The conventional LDWS that complicatedly connects with vehicles parts such as turn signal lights or speedometers is replaced by connection with a GPS. Thus the convenience of installation of LDWS in vehicles is improved. | 10-21-2010 |
Chih-Wei Lo, Chungho City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100013929 | Event Data Recorder with Lane Departure Warning Function - An event data recorder with a function of lane departure warning is revealed. The device combines a LDWS (Lane Departure Warning System) with a EDR (Event Data Recorder). The LDWS uses at least one image sensor to capture road images that are sent to a DSP for being processed and identified. The EDR uses image/audio sensors to capture images in front of the car and/or sounds of surrounding. The data is sent to a recorder and is compressed for being saved into a storage device. Thus the device not only has both functions of the EDR as well as the LDWS, it further records vehicle signals, numbers of lane departure issues, and surrounding conditions of car accidents for finding out human or vehicle faults that cause the accident. Therefore, functions and efficiency of the EDR are improved. | 01-21-2010 |
| 20110096413 | Five-lens image lens system - A five-lens image lens system is revealed. The five-lens image lens system includes a first lens group with a negative power and a second lens group with a positive power. Along an optical axis in order from an object plane to an image plane, the first lens group includes a negative first lens and a negative second lens while at least one of optical surfaces of the first lens and the second lens is an aspherical optical surface. The second lens group includes a positive third lens, a positive fourth lens, and a negative fifth lens from the object plane to the image plane while an image-side lens surface of the positive fourth lens is glued with an object-side lens surface of the negative fifth lens. The image lens system satisfies the following conditions: 2R2>R4>R2, 2|F12|<|F34|, and Vd1>Vd2, Vd4>Vd5; wherein R2, R4 respectively represent curvature radius of the image-side lens surface of the negative first lens and the negative second lens; f12, f34 respectively represent focal length of the negative first lens and the negative second lens; Vd1, Vd2, Vd4, Vd5 respectively are Abbe numbers of the first lens, the second lens, the fourth lens, and the fifth lens. Thus the image lens system has features of wide viewing angle, small Fno, high brightness, high resolution, and effectively minimized length (through the lens, TTL). Therefore, the applications and effects of the image lens system are improved and especially suitable for lens of EDR (Event Data Recorder) of car safety systems. | 04-28-2011 |
Chih-Wei Tsai, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20090135570 | METHOD FOR IMPROVING EBG STRUCTURES AND MULTI-LAYER BOARD APPLYING THE SAME - A method for improving EBG (electromagnetic bandgap) structures is provided. First, a multi-layer board having at least one EBG unit is provided. Then, a maximum input impedance of the EBG unit under a predetermined frequency band is measured, in which a frequency corresponding to the maximum input impedance is a resonance frequency, and a capacitance is determined based on the resonance frequency. Besides, a minimum input impedance of the EBG unit is measured, and a logarithmic value corresponding to the maximum input impedance and a logarithmic value corresponding to the minimum input impedance are obtained so as to determine a resistance. Finally, an electronic device having the capacitance and the resistance is coupled to the EBG unit in parallel. | 05-28-2009 |
| 20090310295 | HEAT-DISSIPATING MECHANISM FOR USE WITH MEMORY MODULE - A heat-dissipating mechanism includes a first heat-dissipating device, a first positioning device, a second heat-dissipating device and a second positioning device. The first heat-dissipating device is contacted with a memory module. The first positioning device is disposed on the first heat-dissipating device and includes a protrusion. The second heat-dissipating device is connected with the first heat-dissipating device. The second positioning device has a positioning rail formed in the second heat-dissipating device and corresponding to the protrusion. The second heat-dissipating device is connected with the first heat-dissipating device when the protrusion of the first positioning device is embedded into the positioning rail second positioning device. | 12-17-2009 |
| 20100060379 | DELAY LINE FOR PRINTED CIRCUIT BROAD - A delay line for a printed circuit board (PCB) is disclosed. The delay line includes a first straight line, a second straight line and a third straight line. The second and third straight lines are respectively disposed at two sides of the first straight line. The first, second and third straight lines are parallel to each other and form a delay path. The current direction of the second straight line is opposite to that of the third straight line. | 03-11-2010 |
| 20100302732 | HEAT-DISSIPATING MECHANISM FOR USE WITH MEMORY MODULE - A heat-dissipating mechanism includes a first heat-dissipating device, a first positioning device, a second heat-dissipating device and a second positioning device. The first heat-dissipating device is contacted with a memory module. The first positioning device is disposed on the first heat-dissipating device and includes a protrusion. The second heat-dissipating device is connected with the first heat-dissipating device. The second positioning device has a positioning rail formed in the second heat-dissipating device and corresponding to the protrusion. The second heat-dissipating device is connected with the first heat-dissipating device when the protrusion of the first positioning device is embedded into the positioning rail second positioning device. | 12-02-2010 |
Chih-Wei Tsai, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080264673 | Differential signal layout printed circuit board - A positive differential signal trace and a negative differential signal trace are formed on different layers of a printed circuit board. A first ground trace is formed on the layer on which the positive differential signal trace is formed, and a second ground trace is formed on the layer on which the negative differential signal trace is formed. An insulation layer is positioned between the two layers and has a predetermined thickness. A differential mode impedance and a common mode impedance of differential signals are dependent on the predetermined thickness of the insulation layer, width and thickness of each differential signal trace, and a space between each differential signal trace and the corresponding ground trace formed on the same layer. | 10-30-2008 |
Chih-Wei Wang, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090015529 | LIQUID CRYSTAL DISPLAY PANEL WITH COLOR WASHOUT IMPROVEMENT BY SCANNING LINE COUPLING AND APPLICATIONS OF SAME - A liquid crystal display (LCD) panel with color washout improvement. In one embodiment, the LCD panel includes a common electrode, a plurality of scanning lines, a plurality of data lines, and a plurality of pixels formed by the plurality of data lines crossing the plurality of scanning lines, each pixel comprising two or more sub-pixels, each sub-pixel comprising a sub-pixel electrode, a transistor electrically coupled to a corresponding scanning line, a corresponding data line and the sub-pixel electrode, a liquid crystal capacitor electrically coupled between the sub-pixel electrode and the common electrode, and a storage capacitor, wherein at least one of the storage capacitors of the two or more sub-pixels is electrically coupled between its corresponding sub-pixel electrode and a scanning line immediately prior or next to the corresponding scanning line, and the rest of the storage capacitors of the two or more sub-pixels each is coupled between its corresponding sub-pixel electrode and the common electrode. | 01-15-2009 |
Chih-Wei Wang, Zhonghe City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090266623 | REMOTE SENSING CONTROLLER - A remote sensing controller having a detection area, wherein the remote sensing controller comprises: a plurality of electromagnetic wave generators, a sensor, a determining module and a controlling module. The plurality of electromagnetic wave generators are to generate an electromagnetic wave respectively, wherein at least one reflected electromagnetic wave is further generated according to the reflection of the plurality of electromagnetic waves from an object within the detection area, wherein the number of the reflected electromagnetic wave is related to a displacing condition of the object. The sensor is to sense the reflected electromagnetic wave to generate a sensing result. The determining module is to determine the displacing condition of the object according to the sensing result. And the controlling module is to generate a command corresponding to the displacing condition according to a relation table and further control at least one external electronic device according to the command. | 10-29-2009 |
Chih-Wei Wu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110302045 | AUTOMATIC PATENT TRANSACTION SYSTEM - The invention discloses an automatic patent transaction system. The invention comprises a patent database, a member database, a match computing device, a share computing device, a non-member database, and a licensing and transacting computing device. The operation method of the invention also comprises a method for the participation of member and non-member, and a method for the participation of member only. Thus, the invention is able to increase the trade efficiency of the patent and reduce the trade cost of the patent. | 12-08-2011 |
Chih-Wei Wu, Taoyuan County TW
| Patent application number | Description | Published |
|---|---|---|
| 20120042140 | METHOD FOR PROVIDING VIRTUAL OPTICAL DISK FUNCTION IN PORTABLE STORAGE DEVICE AND PORTABLE STORAGE DEVICE WITH VIRTUAL OPTICAL DISK FUNCTION - The present invention provides a method for providing a virtual optical disk function in a portable storage device and a portable storage device with a virtual optical disk function. The method for providing the virtual optical disk function in the portable storage device provided by the present invention can make a general standard portable storage device (such as flash drive, memory card, and external hard drive, etc.) to simulate functions of a conventional optical disk device, and have disk ejecting function and disk changing function. In addition, the portable storage device with the virtual optical disk function provided by the present invention can replace the conventional optical disk device to reduce the weight and volume of a computer system (such as notebook computer and desktop personal computer, etc.), and also can replace the virtual optical disk software of the computer system, to avoid occupying memory resource of the computer system. | 02-16-2012 |
Chih-Wei Wu, Keelung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110149286 | LIQUID CORE WAVEGUIDE ASSEMBLY AND DETECTING SYSTEM INCLUDING THE SAME - A liquid core waveguide assembly includes: a waveguide-forming body formed with a waveguide channel and first and second fiber channels, transparent first and second partition walls, and a liquid inlet in fluid communication with the waveguide channel, the waveguide channel having a first end spaced apart from the first fiber channel by the first partition wall, and a second end spaced apart from the second fiber channel by the second partition wall; and at least one first optical fiber and at least one second optical fiber extending into the first and second fiber channels, respectively. A detecting system including the liquid core waveguide assembly is also disclosed. | 06-23-2011 |
Chih-Wei Wu, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080259535 | SLIDING OPEN/CLOSED DEVICE - A sliding open/closed device includes a first module and a second module. When the first module is closed with the second module, a first magnetic component disposed inside the first module is attracted by a second magnetic component disposed inside the second module. When a sliding component disposed inside the first module is located at a second position, the first magnetic component is attracted by the second magnetic component and is repelled by a third magnetic component disposed inside the second module so that the first module can be closed with the second module. | 10-23-2008 |
Chih-Wei Wu, Zhuangwei Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20130009316 | Apparatus and Methods for Dicing Interposer Assembly - Methods and apparatus for performing dicing of die on wafer interposers. Methods are disclosed that include receiving an interposer assembly including one or more integrated circuit dies mounted on a die side of an interposer substrate and having scribe areas defined in spaces between the integrated circuit dies, the interposer having an opposite side for receiving external connectors; mounting the die side of the interposer assembly to a tape assembly, the tape assembly comprising an adhesive tape and preformed spacers disposed between and filling gaps between the integrated circuit dies; and sawing the interposer assembly by cutting the opposite side of the interposer in the scribe areas to make cuts through the interposer, the cuts separating the interposer into one or more die on wafer assemblies. Apparatuses are disclosed for use with the methods. | 01-10-2013 |
| 20130049195 | Three-Dimensional Integrated Circuit (3DIC) Formation Process - A method includes performing a laser grooving to remove a dielectric material in a wafer to form a trench, wherein the trench extends from a top surface of the wafer to stop at an intermediate level between the top surface and a bottom surface of the wafer. The trench is in a scribe line between two neighboring chips in the wafer. A polymer is filled into the trench and then cured. After the step of curing the polymer, a die saw is performed to separate the two neighboring chips, wherein a kerf line of the die saw cuts through a portion of the polymer filled in the trench. | 02-28-2013 |
| 20130075937 | Apparatus and Methods for Molding Die on Wafer Interposers - Methods and apparatus for performing molding on die on wafer interposers. A method includes receiving an interposer assembly having a die side and an opposite side including two or more integrated circuit dies mounted on the die side of the interposer, the interposer assembly having spaces formed on the die side of the interposer between the two or more integrated circuit dies; mounting at least one stress relief feature on the die side of the interposer assembly in one of the spaces between the two or more integrated circuit dies; and molding the integrated circuit dies using a mold compound, the mold compound surrounding the two or more integrated circuit dies and the at least one stress relief feature. An apparatus is disclosed having integrated circuits mounted on a die side of an interposer, stress relief features between the integrated circuits and mold compound over the integrated circuits. | 03-28-2013 |
Chih-Wei Wu, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080265389 | Substrate for multi-chip stacking, multi-chip stack package utilizing the substrate and its applications - A substrate for multi-chip stacking and a multi-chip stack package utilizing the substrate and its applications are disclosed. The substrate comprises a first wire-bonding finger, a second wire-bonding finger, a trace configured for electrical transmission and a loop wiring on a same surface. The first wire-bonding finger and the second wire-bonding finger are adjacent each other and to a die-attaching area of the substrate. The loop wiring connects the first wire-bonding finger with the second wire-bonding finger in series and connected to the trace. The loop wiring can be selectively broken or not when at least two chips are stacked on the die-attaching area and electrically connected to the first and second wire-bonding fingers respectively. Accordingly, the chips can operate respectively and independently without mutual interference if one of the chips is fail. Moreover, there is merit to apply the multi-chip stack package utilizing the substrate because it can be repaired after molding and without removing any bonding wire during semiconductor packaging processes. | 10-30-2008 |
Chih-Wei Yang, New Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110292589 | HIGH-DENSITY COMPUTER SYSTEM - A high-density computer system comprises: a chassis, having a main backplane, and a main control circuit and a plurality of main backplane slots installed and formed on the main backplane respectively; at least one expansion card module inserted and installed in the chassis, and the expansion card module includes a sub-backplane having a sub-control circuit and a plurality of second sub-backplane slots, and an end of the sub-backplane has a first sub-backplane slot corresponding to the main backplane slot, and the first sub-backplane slot and the sub-control circuit and the second sub-backplane slots being electrically coupled; a plurality of CPU cards installed on the expansion card module, each being inserted to the second sub-backplane slot, and the CPU card having a CPU, such that the computer system can have a powerful modular assembling function to enhance the economic benefits and product competitiveness. | 12-01-2011 |
Chih-Wei Yang, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090278581 | DELAY LOCK LOOP AND PHASE ANGLE GENERATOR - The provided delay lock loop delaying an input signal includes a quadrature generator, a voltage controller and a delay cell. The input signal is inputted into the quadrature generator and the delay cell. A phase-changing signal from the quadrature generator and a delay signal respectively from the delay cell are inputted into the voltage controller at the same time so that a control voltage inputted into the delay cell to control a delay time of the delay signal is generated. Also, the provided phase angle generator generates an output signal in an arbitrary phase. | 11-12-2009 |
Chih-Wei Yang, Kao-Hsiung Hsien TW
Chih-Wei Yang, Hsinchu City TW
Chih-Wei Yen, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110042953 | EMBEDDED TURBINE GENERATOR SET - This disclosure relates to a turbine generator set, in which an axial-flow turbine and a generator are embedded inside a flow channel. In an exemplary embodiment of the disclosure, the turbine generator set comprises: a flow channel being provided with a front end as an inlet duct and a back end as an outlet duct; an axial-flow turbine, being single-stage or multi-stage, capable of transforming thermal and pressure energies of a working fluid inside the flow channel into rotational energy; and a generator, comprising a rotor and a stator, being capable of transforming the rotational energy into electricity. A shaft of the turbine and a shaft of the generator can be coupled directly or by way of a gear set. Electricity is transmitted from the flow channel by way of a bunch of cables passing through the flow channel. | 02-24-2011 |
| 20120085089 | CHANGEABLE DAMPING WAVE POWER CAPTURING DEVICE DRIVEN BY BIDIRECTIONAL SCREW ROD - A changeable damping wave power capturing device driven by bidirectional screw rod is provided, which uses the ball screw device to capture the wave power and prevents the energy lost caused by complex mechanism. In addition, bidirectional reciprocating rectilinear motion is changed to unidirectional rotation by the ratchet wheel device, and then the rotating energy is imported to the generating set. Besides, the wave power capturing device driven by bidirectional screw rod uses the control device to detect wave energy and choose different generator, the control device could change the damping value and improve the efficiency that transforming wave energy. | 04-12-2012 |