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Chih-Jen
Chih-Jen Cheng, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100060526 | OMNIDIRECTIONAL ANTENNA - An omnidirectional antenna includes a substrate, a signal feed-in portion, a first radiation unit, and a second radiation unit. The first radiation unit is located on a first surface of the substrate, and electrically connected to a first circuit of the first surface. The first radiation unit has a first extension end and a second extension end. The second radiation unit is located on a second surface of the substrate, and electrically connected to a second circuit of the second surface. The second radiation unit has a third extension end and a fourth extension end. The first extension end is disposed corresponding to the third extension end, and the second extension end is disposed corresponding to the fourth extension end. The signal feed-in portion is located on the first circuit and the second circuit. Thus, the impedance is improved, a wider bandwidth is achieved, and the process is simplified. | 03-11-2010 |
| 20100123637 | ANTENNA - An antenna includes a substrate, a signal feed portion, and a plurality of radiation units. The substrate has a first surface and a second surface. The signal feed portion is located on the substrate. The plurality of radiation units is located on the substrate, connected to the signal feed portion, and arranged in a radial shape. Each of the radiation units includes a radiation portion and a ground portion. The radiation portion is located on the first surface with one end connected to the signal feed portion. The ground portion is located on the second surface in symmetry with the radiation portion, with one end connected to the signal feed portion. A plurality of dipole antennas connected in parallel to the signal feed portion, so as to avoid a zero point generated on the single dipole antenna, such that a wave width of the antenna radiation has a large angle. | 05-20-2010 |
| 20100149063 | DUAL-FREQUENCY ANTENNA - A dual-frequency antenna includes a substrate, a ground layer, a plurality of signal feed portions, at least one first radiation portion, a plurality of second radiation portions, a plurality of first signal transmission lines, a plurality of second signal transmission lines, a plurality of first filters, and a plurality of second filters. The signal feed portions are disposed between the first radiation portions and the second radiation portions that are disposed on the first surface of the substrate in a staggered manner. The first signal transmission lines and the second signal transmission lines are respectively used to connect the signal feed portions with the first radiation portions and the second radiation portions. The first filters and the second filters are respectively disposed on the first signal transmission lines and the second signal transmission lines. The dual-frequency antenna is applicable for providing broadband and high gain features. | 06-17-2010 |
Chih-Jen Hsiao, Hsin-Tien City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080198089 | Coupling antenna - A coupling antenna has a substrate, an inducting conductor, a ground plane, a first coupling member and a second coupling member. The inducting conductor is mounted on the substrate. The ground plane is formed on and protrudes from the inducting conductor and is mounted on the substrate. The first coupling member is mounted on the substrate and is connected to a feeding cable. The second coupling member is mounted on the substrate and is connected to the first coupling member. The coupling antenna with the first coupling member, the second coupling member and the inducting conductor has a wide bandwidth and a small size. | 08-21-2008 |
Chih-Jen Hu, Jhongli City CN
| Patent application number | Description | Published |
|---|---|---|
| 20090244414 | LIQUID CRYSTAL DISPLAY APPARATUS AND METHOD FOR IMPROVED PRECISION 2D/3D VIEWING WITH AN ADJUSTABLE BACKLIGHT UNIT - An liquid crystal method, system and method is provided to optimize the view-angle distribution characteristics of 2D/3D LCDs, wherein the photoactive layers, e.g., parallax, lenticular, etc, have their individual respective distances adjusted. The method also permits the adjustment of the relative prism vertex angles among the photoactive layers to further control the view-angle distribution of the light transmitted to the LDC display means. Moreover, the method, system and method provides for the enhanced, as modified by or in accordance with and as a function of both, scope and distance of human vision and vantage point in 2D/3D LCDs. | 10-01-2009 |
Chih-Jen Huang, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090039424 | HIGH-VOLTAGE MOS TRANSISTOR DEVICE - A high-voltage transistor device has a substrate, an isolation structure, a source, a gate, a drain, a plurality of doped regions, a plurality of ion wells, and a first dielectric layer disposed on the substrate. The high-voltage transistor device further has a first conductive layer and a plurality of first field plate rings. The first conductive layer is electrically connected to the drain and at least one of the first field plate rings. | 02-12-2009 |
| 20090039425 | HIGH-VOLTAGE MOS TRANSISTOR DEVICE - A HV MOS transistor device having a substrate, a gate, a source, a drain, a first ion well of a first conductive type disposed in the substrate, and a plurality of field plates disposed on the substrate is disclosed. The HV MOS transistor device further has a first doped region of a second conductive type positioned in the first ion well. Therefore, a first interface and a second interface between the first ion well and the first doped region are formed, and the first interface and the second interface are respectively positioned near the drain and the source. In addition, the first interface is positioned under a respective field plate to produce a smooth field distribution and to increase the breakdown voltage of the HV transistor device. | 02-12-2009 |
| 20090159966 | High voltage semiconductor device, method of fabricating the same, and method of fabricating the same and a low voltage semiconductor device together on a substrate - A high voltage semiconductor device comprises a substrate, a well, a gate structure, and a source/drain structure in a grade region in a well in the substrate. The gate structure is disposed on the substrate with a portion vertically down into a trench in the well in the substrate and has a relatively small size. The method of fabricating the high voltage semiconductor device comprises forming a first trench for an STI structure and a second trench for a gate structure, depositing an oxide layer on the substrate to fill the first and the second trenches, wherein a void is formed in the second trench, performing a photolithography and etching process to remove a portion of the oxide layer in the second trench, and forming a gate on the gate dielectric layer in the second trench. | 06-25-2009 |
| 20110250727 | METHOD OF MANUFACTURING FLASH MEMORY DEVICE - A method of manufacturing flash memory device is provided and includes the following steps. First, a substrate is provided. Then, a stacked gate structure is formed on the substrate. Subsequently, a first oxide layer is formed on the stacked gate structure. Following that, a nitride spacer is formed on the first oxide layer, wherein a nitrogen atom-introducing treatment is performed after the forming of the first oxide layer and before the forming of the nitride spacer. Accordingly, the nitrogen atom-introducing treatment of the presentation invention can improve the data retention reliability of the flash memory device. | 10-13-2011 |
Chih-Jen Huang, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090096039 | HIGH-VOLTAGE DEVICE AND MANUFACTURING METHOD OF TOP LAYER IN HIGH-VOLTAGE DEVICE - A high-voltage device including a first conductive type substrate, a gate, a second conductive type well, a second conductive type source region, a second conductive type drain region, conductive layers, and a first conductive type top layer. The gate is disposed on the substrate, and the well is disposed in the substrate at one side of the gate. The source region is disposed in the substrate at the other side of the gate. The drain region is disposed in the well of the substrate. The conductive layers are disposed on the substrate between the gate and the drain region. The top layer is disposed in the well of the substrate, and the well is below the conductive layers. One portion of the top layer near the gate has a thickness greater than that of the other portion of the top layer away from the gate. | 04-16-2009 |
| 20090111252 | METHOD FOR FORMING DEEP WELL REGION OF HIGH VOLTAGE DEVICE - A method of fabricating a deep well region of a high voltage device is provided. The method includes designating a deep well region that includes a designated highly doped region and a designed scarcely doped region in a substrate. A mask layer, which covers a periphery of the designated deep well region, is formed over the substrate, wherein the mask layer includes a plurality of shielding parts to cover a portion of the designated scarcely doped region. Using the mask layer as an implantation mask, an ion implantation process is performed to implant dopants into the substrate exposed by the mask and to form a plurality of undoped regions in the designated scarcely doped region covered by the shielding parts. The dopants in the designated scarcely doped region are then induced to diffuse to the undoped regions. | 04-30-2009 |
Chih-Jen Li, Sijhih TW
| Patent application number | Description | Published |
|---|---|---|
| 20110295172 | WOUND DRESSING AND PROCESS FOR PRODUCING THE SAME AND USE THEREOF - A process for producing a wound dressing was provided having steps of: spinning an aqueous stock containing natural polymeric materials into a spin formation solution to form a wet polymeric spin; immersing the wet polymeric fiber into a softening reagent to obtain a softened wet polymeric spin; immersing the softened wet polymeric spin into a volatile reagent to expelling moisture in the softened wet polymeric fiber to form a polymeric fiber; forming a non-woven fabric of the polymeric fiber; and treating the non-woven fabric of the polymeric fiber with a coating solution to form a porous coating on the polymeric fiber to obtain a wound dressing. A process for manufacturing a polymeric fiber is also provided. A wound dressing produced by the process is also provided. | 12-01-2011 |
Chih-Jen Shih, Padeh City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080254578 | Method for fabricating thin film transistors - A method for fabricating thin film transistors is disclosed. An amorphous silicon film is formed on a substrated and selectively irradiated with a laser beam for lateral growth to form a plurality of polysilicon regions. The whole surface of the substrate is then oxidized and irradiated with exicer laser annealing. | 10-16-2008 |
Chih-Jen Tsai, Taitung TW
| Patent application number | Description | Published |
|---|---|---|
| 20090149104 | FABRICATION METHOD OF DISPLAY PANEL AND DIELECTRIC CONFIGURATION APPLIED THERETO - A fabrication method for a display panel and dielectric configuration applied thereto is provided according to the present invention. The dielectric configuration of the display panel is applicable at atmospheric pressure and to a lower substrate having a surface formed with a dielectric. The fabrication method includes forming at least one lateral line segment and a plurality of longitudinal line segments on the surface of the lower substrate, thereby enabling a process of dispensing dielectric to be performed thereon at atmospheric pressure, and accordingly overcoming the drawbacks of the prior art. | 06-11-2009 |
Chih-Jen Tsai, Taitung County TW
| Patent application number | Description | Published |
|---|---|---|
| 20100072244 | WEB TRANSPORTATION GUIDING APPARATUS AND METHOD - A guiding apparatus and method for a shift generated by a web during web transportation is provided, in which a coarse position guiding module and a fine position guiding module function to directly adjust the web so as to compensate the shift occurred during the process of transportation according to a position of the web. By means of monitoring a location of the fine position guiding module at any time, a reference of the coarse position guiding module will be adjusted when the location of the fine position guiding module satisfies the condition defined in the guiding method, so as to change a position where the web enters into the fine position guiding module. | 03-25-2010 |
Chih-Jen Tsai, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110102362 | Writing and displaying device - A writing and displaying device is proposed, including: a display member having a first electric connecting portion and an electrochromic layer; an input member including a second electric connecting portion and an electrolyte layer; and a power supply member for supplying electric power to the input member and the display member. When the electric power is supplied by the power supply member and the input member is in contact with the display member, the input member, the display member and the power supply member constitute a loop circuit such that an electrochromism occurs to the portion of the display member in contact with the input member. The electrochromism can be maintained for a predetermined duration of time even after the contact of the display member with the input member is removed and the driving power is turned off. | 05-05-2011 |
Chih-Jen Wu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100270636 | ISOLATION STRUCTURE FOR BACKSIDE ILLUMINATED IMAGE SENSOR - A backside illuminated image sensor includes an isolation structure passing through a substrate, a sensor element formed overlying the front surface of the substrate, and a color filter formed overlying the back surface of the substrate. | 10-28-2010 |
| 20100279459 | METHOD FOR REDUCING CONTACT RESISTANCE OF CMOS IMAGE SENSOR - A method for performing a CMOS Image Sensor (CIS) silicide process is provided to reduce pixel contact resistance. In one embodiment, the method comprises forming a Resist Protect Oxide (RPO) layer on the CIS, forming a Contact Etch Stop Layer (CESL), forming an Inter-Layer Dielectric (ILD) layer, performing contact lithography/etching, performing Physical Vapor Deposition (PVD) at a pixel contact hole area, annealing for silicide formation at pixel contact hole area, performing contact filling, and defining the first metal layer. The Resist Protect Oxide (RPO) layer can be formed without using a photo mask of Cell Resist Protect Oxide (CIRPO) photolithography for pixel array and/or without silicide process at pixel array. The method can include implanting N+ or P+ for pixel contact plugs at the pixel contact hole area. The contact filling can comprise depositing contact glue plugs and performing Chemical Mechanical Polishing (CMP). | 11-04-2010 |
Chih-Jen Yang, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20090108757 | ONE-PIECE ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE WITH AN ENERGY-RECYCLING FEATURE AND HIGH CONTRAST - This invention is an electricity generating organic light-emitting display device (OLED) consisting of vertically stacked layers including an organic light emitting device (OLED), an insulation layer, a solar cell and thin film transistors. The device can reduce the reflection of ambient light, improve the contrast of the signal, and enhance sun-light readability by allowing the ambient light to be absorbed by the solar cells. Furthermore, additional power will be generated by the solar cell through absorption of ambient light and backward emission of OLEDs. The device, without using the polarizer, can exhibit low reflectance characteristics over the visible region and high display contrast. | 04-30-2009 |
Chih-Jen Yang, Zhongli City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110130507 | ORGANIC/INORGANIC HYBRID MATERIAL AND FABRICATION METHOD THEREOF - An organic/inorganic hybrid material is provided, including an organic polymer, and a plurality of inorganic nano-platelets, wherein the inorganic nano-platelets are self-connected or connected via a linker to constitute an inorganic platelet network. By the formation of the inorganic network structure, the hybrid materials can keep their transparency and flexibility at a high inorganic content, and exhibit greatly reduced coefficients of thermal expansion A method for fabricating the organic/inorganic hybrid material is also provided. | 06-02-2011 |