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Chih-Hao Chang
Chih-Hao Chang, Chiayi City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110098164 | BALANCE TRAINING DEVICE - A balance training device includes at least one supporting base and at least one plank member. The supporting base includes a plank connecting portion formed with a plank coupling groove that opens upwardly. The plank coupling groove includes a first groove section and a second groove section that intersects the first groove section. The plank member includes a plate portion and a rib structure disposed on a bottom face of the plate portion. The rib structure removably engages the plank coupling groove of the supporting base. The rib structure includes a first rib part to engage the first groove section and a second rib part to engage the second groove section. | 04-28-2011 |
| 20110212425 | Modular Educational Device - A modular educational device includes primary and secondary modular boundary segments each having an outer shell extending to terminate at two socket ends, a plurality of modular plug-ended connectors each having two plug ends configured to mate with the corresponding ones of primary and secondary socket ends so as to enable the primary and secondary outer shell to form a loop-shaped structure that encircles an enclosed space of a certain geometric shape, and a modular support stand having a base and a pair of jaws which extend uprightly from the base and which are spaced apart from each other by a fitting space for accommodating a gripped region of the primary modular boundary segment so as to enable the loop-shaped structure to be stood on a surface. | 09-01-2011 |
Chih-Hao Chang, Chu-Bei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110024804 | METHOD FOR FORMING HIGH GERMANIUM CONCENTRATION SIGE STRESSOR - A method for producing a SiGe stressor with high Ge concentration is provided. The method includes providing a semiconductor substrate with a source area, a drain area, and a channel in between; depositing the first SiGe film layer on the source area and/or the drain area; performing a low temperature thermal oxidation, e.g., a high water vapor pressure wet oxidation, to form an oxide layer at the top of the first SiGe layer and to form the second SiGe film layer with high Ge percentage at the bottom of the first SiGe film layer without Ge diffusion into the semiconductor substrate; performing a thermal diffusion to form the SiGe stressor from the second SiGe film layer, wherein the SiGe stressor provides uniaxial compressive strain on the channel; and removing the oxide layer. A Si cap layer can be deposited on the first SiGe film layer prior to performing oxidation. | 02-03-2011 |
| 20110068411 | Block Contact Plugs for MOS Devices - An integrated circuit structure includes a semiconductor substrate; a gate stack overlying the semiconductor substrate; a gate spacer on a sidewall of the gate stack; a first contact plug having an inner edge contacting a sidewall of the gate spacer, and a top surface level with a top surface of the gate stack; and a second contact plug over and contacting the first contact plug. The second contact plug has a cross-sectional area smaller than a cross-sectional area of the first contact plug. | 03-24-2011 |
| 20110193144 | SEMICONDUCTOR DEVICE HAVING ELEVATED STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a semiconductor substrate; a gate stack overlying the substrate, a spacer formed on sidewalls of the gate stack, and a protection layer overlying the gate stack for filling at least a portion of a space surrounded by the spacer and the top surface of the gate stack. A top surface of the spacer is higher than a top surface of the gate stack. | 08-11-2011 |
| 20110193178 | Bottom-Notched SiGe FinFET Formation Using Condensation - An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width. | 08-11-2011 |
| 20110241084 | Semiconductor Device with a Buried Stressor - A semiconductor device, such as a PMOS or NMOS device, having localized stressors is provided. Recesses are formed on opposing sides of a gate electrode. A stress-inducing region is formed along a bottom of the recess, and a stressed layer is formed over the stress-inducing region. By having a stress-inducing region with a larger lattice structure than the stressed layer, a tensile strain may be created in a channel region of the semiconductor device and may be suitable for an NMOS device. By having a stress-inducing region with a smaller lattice structure than the stressed layer, a compressive strain may be created in the channel region of the semiconductor device and may be suitable for a PMOS device. Embodiments may be applied to various types of substrates and semiconductor devices, such as planar transistors and finFETs. | 10-06-2011 |
| 20120091528 | FIN-LIKE FIELD EFFECT TRANSISTOR (FINFET) DEVICE AND METHOD OF MANUFACTURING SAME - A FinFET device and method for fabricating a FinFET device is disclosed. An exemplary method includes providing a semiconductor substrate; forming a fin structure over the semiconductor substrate, the fin structure including a first material portion over the semiconductor substrate and a second material portion over the first material portion; forming a gate structure over a portion of the fin structure, such that the gate structure traverses the fin structure, thereby separating a source region and a drain region of the fin structure, wherein the source and drain regions of the fin structure define a channel therebetween; removing the second material portion from the source and drain regions of the fin structure; and after removing the second material portion, forming a third material portion in the source and drain regions of the fin structure. | 04-19-2012 |
Chih-Hao Chang, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100034964 | Method of increasing beta-phase content in a conjugated polymer useful as a light emitting layer in a polymer light emitting diode - A simple and efficient method for transforming conformation of parts of chains in the amorphous phase in a conjugated polymer to extended conjugation length (termed as β phase) is disclosed. The β phase acts as a dopant and can be termed self-dopant. The generated self-dopant in the amorphous host allows an efficient energy transfer and charge trapping to occur and leads to more balanced charge fluxes and more efficient charge recombination. For example, a polyfluorene film was dipped into a mixed solvent/non-solvent, tetrahydrofuran/methanol in volume ratio of 1:1, to generate a β-phase content up to 1.32%. A polymer light emitting diode with the dipped polyfluorene film as a light emitting layer therein provides a more pure and stable blue-emission (solely from the self-dopant) with CIE color coordinates x+y<0.3 and a performance of 3.85 cd A | 02-11-2010 |
Chih-Hao Chang, Chung-Ho TW
| Patent application number | Description | Published |
|---|---|---|
| 20090309979 | Image analysis using a hybrid connected component labeling process - A hybrid connected component labeling process for analyzing digitized or binary images includes the following steps. Firstly, a forward scan is executed to assign a forward label to each foreground pixel in the image. Then, a backward scan is executed to assign a backward label to each foreground. The backward labels are rearranged and label connection is recorded. A label allocation table including final labels and reference labels is provided for recording the use of the labels. When an object is considered as noise, the label corresponds to the pixels of the object is released by updating the label allocation table. | 12-17-2009 |
| 20090310822 | Feedback object detection method and system - A feedback object detection method and system. The system includes an object segmentation element, an object tracking element and an object prediction element. The object segmentation element extracts the object from an image according to prediction information of the object provided by the object prediction element. Then, the object tracking element tracks the extracted object to generate motion information of the object like moving speed and moving direction. The object prediction element generates the prediction information such as predicted position and predicted size of the object according to the motion information. The feedback of the prediction information to the object segmentation element facilitates accurately extracting foreground pixels from the image. | 12-17-2009 |
| 20090310823 | Object tracking method using spatial-color statistical model - An object tracking method utilizing spatial-color statistical models is used for tracking an object in different frames. A first object is extracted from a first frame and a second object is extracted from a second frame. The first object is divided into several first blocks and the second object is divided into several second blocks according to pixel parameters of each pixel within the first object and the second object. The comparison between the first blocks and the second blocks is made to find the corresponding relation therebetween. The second object is identified as the first object according to the corresponding relation. | 12-17-2009 |
Chih-Hao Chang, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20080281243 | ADJUSTABLE JOINT SPLINT - An adjustable joint splint has a splint, two pads and an adjustable strap. The splint has two curved end segments and two connectors. The curved end segments are curved in the same direction and are parallel to each other, and each has an inner surface. The connectors connect the curved end segments. The pads are mounted respectively on the inner surfaces of the curved end segments. The adjustable strap is mounted between the connectors. Doctors can easily adjust the adjustable strap and the splint to conform to joints of different patients, patients can also tighten or loosen the strap around their joints themselves, and the splint has an opening that provides good ventilation. Therefore joints are held securely and comfortably by the splint, and skin in the area of the immobilized joint does not become irritated. | 11-13-2008 |
| 20090001875 | ORGANIC LIGHT-EMITTING DEVICE INCORPORATING MULTIFUNCTIONAL OSMIUM COMPLEXES - Fabrication of organic light-emitting devices is disclosed by employing the efficient, multifunctional orange-red emitting osmium complex in combination with a second phosphorescent complex showing strong emission at the shorter wavelength region such as blue or blue-green emitting iridium (Ir) complex. The present invention provides WOLEDs with forward viewing efficiencies up to (17% photon/electron, 35.6 cd/A, 28 lm/W) and total peak external efficiencies up to (28.8%, 47.5 lm/W), giving the conceptual design for the highly efficient and color-stable phosphorescent WOLEDs. | 01-01-2009 |
Chih-Hao Chang, Taichung TW
| Patent application number | Description | Published |
|---|---|---|
| 20080277144 | METHOD FOR INDICATING QUALITY OF A CIRCUIT BOARD - A circuit board with a quality-indicator mark and a method for indicating quality of the circuit board. The circuit board includes a plurality of circuit board units. A plating bus is formed around each circuit board unit and extended to form a plating trace in an inner-layer circuit structure of each circuit board unit. The inner-layer circuit structure is inspected in quality to maintain or break connection between the plating trace and plating bus if the quality is good or not. At least one circuit structure is formed on the inner-layer circuit structure and electrically connected to the plating trace to form a conductive mark on each circuit board unit. A metal protection layer is formed on the at least one circuit structure via the plating bus, and the conductive mark with the metal protection layer indicates that the inner-layer circuit structure of the circuit board unit is good. | 11-13-2008 |
Chih-Hao Chang, Chu-Bei TW
| Patent application number | Description | Published |
|---|---|---|
| 20110272739 | METHOD FOR FABRICATING A STRAINED STRUCTURE - A structure for a field effect transistor on a substrate that includes a gate stack, an isolation structure and a source/drain (S/D) recess cavity below the top surface of the substrate disposed between the gate stack and the isolation structure. The recess cavity having a lower portion and an upper portion. The lower portion having a first strained layer and a first dielectric film. The first strained layer disposed between the isolation structure and the first dielectric film. A thickness of the first dielectric film less than a thickness of the first strained layer. The upper portion having a second strained layer overlying the first strained layer and first dielectric film. | 11-10-2011 |
Chih-Hao Chang, Tu-Cheng TW
| Patent application number | Description | Published |
|---|---|---|
| 20120047303 | DOCKING STATION - A docking station includes a multiplexer. The multiplexer includes a first input end, a second input end, and an encode system. The encode system is connected to the second input end, and configured to generate an encoding according to a connection status of the second input end. The encode system is configured to generate a first encoding, when a first peripheral device is connected to the second input end, to switch the multiplexer to a first state, in which the second input end is on and the first input end is off. The encode system is further configured to generate a second encoding, when the first peripheral device is not connected to the second input end, to switch the multiplexer to a second state, in which the second input end is off and the first input end is on. | 02-23-2012 |
| 20120058654 | CONNECTOR ASSEMBLY - A connector assembly for connecting a peripheral device to a computer includes a male connector having a plurality of first connecting pins and a female connector having a plurality of second connecting pins. The plurality of first connecting pins is configured to connect to the peripheral device. The plurality of second connecting pins is configured to connect to the computer. The plurality of second connecting pins is defined on the first circuit board in a second row and a third row. The plurality of second connecting pins comprises a plurality of differential pairs, and each differential pair comprises two differential transmission lines. The two differential transmission lines of each of the plurality of differential pairs are defined on a single row of the second and third rows. | 03-08-2012 |
| 20120062309 | POWER SUPPLY CIRCUIT - A power supply circuit for protecting a battery from current leakage when the battery is not in use includes a control signal input circuit and a switch circuit. The control signal input circuit receives a first control signal from a chip and output a second control signal. The switch circuit receives the second control signal and turns on or off an electronic connection between the battery and the chip. Wherein when the battery is not in use and not being charged by the adaptor, there is a possibility of current leakage from the battery. In such case, the switch circuit turns off the electronic connection between the battery and the chip, and the battery does not provide power to the chip. | 03-15-2012 |
Chih-Hao Chang, Raleigh, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20120057235 | Method for Antireflection in Binary and Multi-Level Diffractive Elements - Methods and apparatus for reducing or eliminating reflection at the interface between a binary or multi-level diffractive element and a surrounding medium. A non-planar diffractive surface of a diffractive optical element is coated forming a plurality of nanostructures on the non-planar diffractive surface and, in certain embodiments, on a planar surface as well. The nanostructures are chosen for providing adiabatic refractive index matching at the optical interface between the non-planar diffractive surface and a surrounding medium subject to matching tangential fields at surface discontinuities. | 03-08-2012 |
Chih-Hao Chang, Chu-Nan TW
| Patent application number | Description | Published |
|---|---|---|
| 20120092873 | LED LAMP HAVING WATERPROOF STRUCTURES - An exemplary LED lamp includes a heat sink, an LED module mounted on the heat sink and a lens covering the LED module. The heat sink has a top surface and a bottom surface opposite to the top surface. The LED module is mounted on the top surface of the heat sink. A waterproof groove is defined in the top surface of the heat sink. The groove has an inner wall adjacent to the LED module and an outer wall far away from the LED module. The inner wall is higher than the outer wall. The lens has a downwardly extending flange inserted into the groove. A waterproof ring is received in the groove and pressed by the flange. | 04-19-2012 |
| 20120092879 | LAMP INCORPORATING CLIPS - A lamp includes a housing, a cover mounted on the housing, a light source received between the housing and the cover and a plurality of clips fixing the housing to the cover. Each clip has two opposite ends pressing against a top face of the housing and a bottom face of the cover, respectively, and a middle bent inwardly towards the housing. The housing includes a top wall having a plurality of slots to receive corresponding ends of the clips and a sidewall extending downwardly from the top wall to be pressed by the middles of the clips. The cover includes a bottom plate and a flange extending upwardly from the bottom plate. The flange defines a plurality of depressions adjacent to the bottom plate to receive the other ends of the clips. | 04-19-2012 |