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Chih-Chin
Chih-Chin Chang, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080224096 | PHOTOLUMINESCENT MATERIAL OF LIGHT-EMITTING DIODE PACKAGE STRUCTURE - An LED package structure including a carrier, an LED chip, an encapsulant and a PL material is provided, wherein the LED chip is disposed on the carrier for emitting light. The encapsulant encapsulates the LED chip. The PL material is distributed in the encapsulant. The PL material is suitable for being excited by the light emitted from the LED chip and scattering the light. Moreover, the present invention provides a novel PL material with a molecular formula of W | 09-18-2008 |
Chih-Chin Huang, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080280077 | Transfer printing structure capable of sensing and indicating intensity of ultraviolet rays - A transfer printing structure capable of sensing and indicating intensity of ultraviolet rays. The transfer printing structure includes a substrate having a transfer print face and a transfer print sensitive layer laid on the transfer print face of the substrate. The transfer print sensitive layer is able to sense environmental ultraviolet rays to change its look. When a pressure is exerted onto a backside of the substrate, the transfer print sensitive layer adhesively attaches to a surface of an article or human body. When the article or human body moves outdoors, the look of the transfer print sensitive layer varies with the intensity of the ultraviolet rays to indicate the intensity of the ultraviolet rays. | 11-13-2008 |
Chih-Chin Liao, Yuanlin TW
| Patent application number | Description | Published |
|---|---|---|
| 20080303166 | TWO-SIDED SUBSTRATE LEAD CONNECTION FOR MINIMIZING KERF WIDTH ON A SEMICONDUCTOR SUBSTRATE PANEL - A semiconductor die substrate panel is disclosed including a minimum kerf width between adjoining semiconductor package outlines on the panel, while ensuring electrical isolation of plated electrical terminals. By reducing the width of a boundary between adjoining package outlines, additional space is gained on a substrate panel for semiconductor packages. | 12-11-2008 |
| 20080305306 | SEMICONDUCTOR MOLDED PANEL HAVING REDUCED WARPAGE - A panel is disclosed on which a plurality of integrated circuit package outlines may be fabricated within a plurality of process tools. The panel includes recessed portions in the exposed surfaces of the molding compound and/or the substrate. The recesses relieve stress resulting from disparate coefficients of expansion between the substrate and molding compound applied to the substrate around the integrated circuits. In embodiments, the recesses may be formed as lines scored into the surface of the molding compound or substrate. Alternatively, the recesses may be formed in the solder mask on the substrate during a process for applying the solder mask, or the recesses may be formed in the molding compound during the encapsulation process. | 12-11-2008 |
| 20080305576 | METHOD OF REDUCING WARPAGE IN SEMICONDUCTOR MOLDED PANEL - A panel is disclosed on which a plurality of integrated circuit package outlines may be fabricated within a plurality of process tools. The panel includes recessed portions in the exposed surfaces of the molding compound and/or the substrate. The recesses relieve stress resulting from disparate coefficients of expansion between the substrate and molding compound applied to the substrate around the integrated circuits. In embodiments, the recesses may be formed as lines scored into the surface of the molding compound or substrate. Alternatively, the recesses may be formed in the solder mask on the substrate during a process for applying the solder mask, or the recesses may be formed in the molding compound during the encapsulation process. | 12-11-2008 |
| 20080305577 | METHOD OF MINIMIZING KERF WIDTH ON A SEMICONDUCTOR SUBSTRATE PANEL - A semiconductor die substrate panel is disclosed including a minimum kerf width between adjoining semiconductor package outlines on the panel, while ensuring electrical isolation of plated electrical terminals. By reducing the width of a boundary between adjoining package outlines, additional space is gained on a substrate panel for semiconductor packages. | 12-11-2008 |
Chih-Chin Yang, Chupei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100148698 | AUDIO CONTROLLED LED DECORATION LAMP STRING SYSTEM - The present invention is an audio controlled LED decoration lamp string system that mainly is to design a system with flashing function by inputting the audio source's frequency to directly control the LED decoration lamp string and create the variation of light and shade. The said system can be electrically-conducted in from a first sector capable of providing the AC (alternate current) or DC (direct current) power to a second sector's IC and electrically-conducted in a fifth sector's LED lamp string simultaneously. And, the second sector's IC is separately electrically-conducted with a third sector's MIC (audio source receiver) and a fourth sector's PWM (pulse width modulation). The fourth sector's PWM is then electrically conducted with a fifth sector's LED lamp string to form a complete system. | 06-17-2010 |
Chih-Chin Yang, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090024786 | External storage device - An external storage device includes a hard-drive, a flash memory, and a memory arrangement unit. The memory arrangement determines if the tag of the data accessed by a computer stored in the tag list of the memory arrangement unit and controls the hard-drive and the flash memory according to the result of the determination. | 01-22-2009 |
Chih-Chin Yeh, Miao-Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20090273735 | Illuminator assembly with reflective pyramids and liquid crystal display with same - An exemplary illuminator assembly includes light emitting diode (LED) chips and reflective pyramids. The LED chips are arranged in an array and capable of emitting light. The reflective pyramids are arranged in an array complementary to the array of LED chips. Each LED chip is arranged among a plurality of the plurality of reflective pyramids, and each reflective pyramid is arranged among a plurality of the plurality of LED chips. The reflective pyramids include a plurality of reflective surfaces, and the reflective surfaces are inclined to the LED chips and thereby capable of reflecting at least some of the light beams emitted from the LED chips such that the reflected light beams propagate in directions that are closer to a direction normal to the arrays than the directions of said some of the light beams prior to their reflection. | 11-05-2009 |