| Patent application number | Description | Published |
|---|
| 20080224715 | LIGHT-DRIVING SYSTEM CAPABLE OF PROVIDING SIGNAL-MEASURED CALIBRATION AND A METHOD FOR PERFORMING THE SAME - This present invention discloses a light-driving system capable of providing an accurate calibration of signal measurement and a method for performing the same, including an automatic power control (APC) circuit which is pre-calibrated for a signal measurement process. By enlarging at least one measured pad of the APC circuit, multiple grounding paths are established via a plurality of probes of a test instrument. An impedance effect predicted on the contact between the probes and the pad is diminished greatly. A voltage value on the pad can be accurately measured. Thus, a reference voltage value input to a first input of a comparator of the APC circuit can be determined on a basis of a specific condition when a ramping voltage value input to a second input of the comparator is substantially equal to a sum of a predetermined reference voltage value and the voltage value of the pad. | 09-18-2008 |
| 20080265916 | METHOD OF PERFORMING SIGNAL-MEASURED CALIBRATION - This present invention discloses a method for performing an accurate calibration of signal measurement by a light-driving system including an automatic power control (APC) circuit which is pre-calibrated for a signal measurement process. By enlarging at least one measured pad of the APC circuit, multiple grounding paths are established via a plurality of probes of a test instrument. An impedance effect predicted on the contact between the probes and the pad is diminished greatly. A voltage value on the pad can be accurately measured. Thus, a reference voltage value input to a first input of a comparator of the APC circuit can be determined on a basis of a specific condition when a ramping voltage value input to a second input of the comparator is substantially equal to a sum of a predetermined reference voltage value and the voltage value of the pad. | 10-30-2008 |
| 20080279316 | METHOD AND APPARATUS FOR DATA RECEPTION - Method and apparatus for data reception are provided, retrieving digital values transmitted through a cable. In a data receiver, an equalizer equalizes an input signal based on a boost value to generate an equalized signal, and a data extractor samples the equalized signal to extract output values from each symbol period. The data extractor detects signal quality of the equalized signal to adjust the boost value accordingly. An optimal time point is detected within one symbol period where an output value is an ensured valid, and variation rate of the optimal time point is counted as an inverse indicator of the signal quality. | 11-13-2008 |
| 20090066419 | VARIABLE GAIN AMPLIFIER CIRCUITS - A variable gain amplifier circuit has a variable gain amplifier (VGA), a string of resistors, a plurality of gain switches, a current source, and at least two current switches. A first input terminal of the VGA receives an input voltage signal. The string of resistors are coupled between an output terminal of the VGA and a bias voltage input terminal. Each of the gain switches is coupled between a second input terminal of the VGA and one of connection nodes between two of the resistors. Each of the current switches is coupled between the current source and one of the connection nodes. The current source provides a current through the turned-on current switch. | 03-12-2009 |
| 20100127905 | METHOD FOR CALIBRATING ANALOG-TO-DIGITAL CONVERTING CIRCUITS - A method for calibrating at least one analog-to-digital converting circuits includes: during a wafer level probe testing or a chip level testing, inputting at least one calibration signal into the analog-to-digital converting circuit to generate at least one digital signal; and calibrating gain or offset of the analog-to-digital converting circuit according to at least the digital signal. | 05-27-2010 |
| 20110116652 | SIGNAL OUTPUT DEVICE AND SIGNAL OUTPUT METHOD - A signal output device includes: a control circuit for receiving at least a first input control signal and outputting an output control signal according to at least the first input control signal, wherein the first input control signal comprises a first signal segment followed by a second signal segment; and a driver circuit, operated according to a supply power, for receiving the output control signal from the control circuit and selectively generating an output signal according to the output control signal; wherein the supply power is turned on before the second signal segment of the first input control signal is received by the control circuit; when the supply power is turned on, the driver circuit operates under a specific power state; and when the second signal segment of the first input control signal is received by the control circuit, the driver circuit keeps operating under the specific power state. | 05-19-2011 |
| 20110175760 | METHOD FOR CALIBRATING ANALOG-TO-DIGITAL CONVERTING CIRCUITS - A method for calibrating at least one analog-to-digital converting circuit includes: during a wafer level probe testing, inputting at least one calibration signal provided by a wafer level testing machine into the analog-to-digital converting circuit to generate at least one digital signal; and calibrating the analog-to-digital converting circuit according to at least the digital signal. The analog-to-digital converting circuit is applied to a video system or an audio system. | 07-21-2011 |
| Patent application number | Description | Published |
|---|
| 20090256986 | PIXEL STRUCTURE AND REPAIRING METHOD THEREOF - A pixel structure includes a scan line, a gate, a common line, a first dielectric layer, a channel layer, a source, a drain, a data line, a capacitance coupling electrode (CCE), a second dielectric layer and a pixel electrode. The gate, the common line and the scan line are disposed on the substrate, and the gate is electrically connected to the scan line. The common line has at least one first opening, and at least a portion of the first opening is located between the data line and the CCE. The channel layer is disposed on the first dielectric layer above the gate. The source and the drain are disposed on the channel layer. The CCE is disposed on the first dielectric layer above the common line and electrically connected to the drain. The pixel electrode is disposed on the second dielectric layer, and electrically connected to the CCE. | 10-15-2009 |
| 20100026923 | PIXEL STRUCTURE AND METHOD FOR REPAIRING THE SAME - A repairable pixel structure includes a substrate, at least a data line, at least a gate line, a transparent pixel electrode, a TFT, and a transparent pre-repair electrode. The TFT includes a gate, a drain, and a source. The transparent pre-repair electrode is disposed corresponding to the electrode in a vertical direction and is electrically connected to the drain. When a broken circuit occurs in the pixel structure, a laser beam is provided to perform a welding process on the transparent pre-repair electrode for repairing the pixel structure. | 02-04-2010 |
| Patent application number | Description | Published |
|---|
| 20080279075 | DEVICE, METHOD FOR PROCESSING RF SIGNAL, AND OPTICAL DISK DRIVE UTILIZING THE SAME - A device for processing a radio frequency (RF) signal of an optical disk drive includes a high-pass (HP) filter, an RF variable gain amplifier (VGA), an RF analog-digital converter (ADC), and a digital module. The HP filter filters the RF signal and is capable of selectively utilizing one of a first cut-off frequency and a second cut-off frequency. The RF VGA amplifies the filtered RF signal. The RF ADC converts the amplified RF signal into a digital code. The digital module is capable of executing a first function and a second function with the digital code. The HP filter utilizes the first cut-off frequency when the digital module desires to execute the first function, and the HP filter utilizes the second cut-off frequency when the digital module desires to execute the second function. | 11-13-2008 |
| 20080285393 | PROCESSING CIRCUITS AND METHODS FOR OPTICAL DATA - A processing circuit for optical data is provided. The processing circuit includes a signal-processing module and a radio frequency (RF) signal-summing module. The signal-processing module averages and filters the data signals to obtain a low-frequency signal. The RF signal-summing module receives the data signals and the low-frequency signal, sums the data signals to obtain a summed data signal, and subtracts the low-frequency signal from the summed data signal to obtain a RF summing signal. | 11-20-2008 |
| 20080285639 | OFFSET CALIBRATION METHODS AND RADIO FREQUENCY DATA PATH CIRCUITS - An offset calibration method is provided. Two input terminals of an equalizer are switched to a common voltage at a first time point, wherein the equalizer generates a first equalized signal and a second equalized signal according to the common voltage. It is determined whether a first offset voltage is present in the equalizer according to the first and second equalized signals generated from the common voltage. If the first offset voltage is determined to be present in the equalizer, a first compensation voltage is provided to the equalizer. | 11-20-2008 |
| 20090325478 | MOBILE JAMMING ATTACK METHOD IN WIRELESS SENSOR NETWORK AND METHOD DEFENDING THE SAME - Mobile jamming attack method in wireless sensor network and method defending the same The present invention relates to a mobile jamming attack method applied in a wireless sensor network (WSN) and method defending the same. The mobile jamming attack method is a power exhaustion denial-of-service attack, possesses mobility and self-learning capability and is unable to be defended with existing defending scheme due to its attack to the routing layer of the WSN; the mobile jamming defending method employs multi-topologies scheme to defend the mobile jamming attack so that the affected area is reduced, the base station can still receive reply packets under the attack, and the jammed area can be roughly located and the track of the mobile jammer can be traced. | 12-31-2009 |
| Patent application number | Description | Published |
|---|
| 20090074653 | ZNX (X=S, SE, TE) QUANTUM DOT PREPARATION METHOD - A ZnX, X is S, Se, Te or a combination thereof, quantum dot preparation method. This method comprises the following steps: dissolving S powder, Se powder, Te powder or a combination thereof into an organic alkali to form a first complex solution; dissolving ZnO into an organic acid and a co-solvent to form a second complex solution; and mixing the first complex solution and the second complex solution to obtain the ZnX quantum dot. | 03-19-2009 |
| 20090263580 | APPARATUS FOR MANUFACTURING A QUANTUM-DOT ELEMENT - An apparatus for manufacturing a quantum-dot element is disclosed. The apparatus includes a reaction chamber for evaporating or sputtering at least one electrode layer or at least one buffer layer on the substrate. The substrate-supporting base is located inside the reaction chamber for fixing the substrate. The atomizer has a gas inlet and a sample inlet. More specifically, the gas inlet and the sample inlet feed the atomizer respectively with a gas and a precursor solution having a plurality of functionalized quantum dots, and thereby form a quantum-dot layer on the substrate. The apparatus of the present invention can form a quantum dot layer with uniformly distributed quantum dots and integrate the processes for forming a quantum-dot layer, a buffer layer, and an electrode layer together at the same chamber. Therefore, the quality of produced element can be substantially improved. | 10-22-2009 |
