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Chien-Min Lee

Chien-Min Lee, Xinzhuang City TW

Patent application numberDescriptionPublished
20100027704Method and Apparatus for Data Transmission Based on Signal Priority and Channel Reliability - Various methods for data transmission based on signal priority and channel reliability are provided. One example method includes encoding a number of bits into coded bits including systematic bits and respective associated parity bits, the bits being encoded for transmission via channels of a multi-channel communications system including a more reliable channel and a less reliable channel. The example method also includes allocating the systematic bits to bit locations within a first stream corresponding to the more reliable channel, allocating the systematic bits to bit locations having a higher signal priority within a second stream corresponding to the less reliable channel, and allocating the parity bits to bit locations within the second stream. Similar and related example methods and apparatuses for allocating the systematic and parity bits to the respective bit locations in both the more and less reliable channels are also provided.02-04-2010
20100177694APPARATUS AND METHOD FOR TRANSMITTING UPLINK CONTROL INFORMATION - A method for a user equipment to transmit uplink control information to a base station, the base station being configured to receive uplink control information on a plurality of groups of subcarriers. The method includes: randomly determining one of the groups of subcarriers; and transmitting uplink control information on the randomly determined group of subcarriers.07-15-2010
20100265904METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR INTERFERENCE AVOIDANCE IN UPLINK COORDINATED MULTI-POINT RECEPTION - A method of providing interference avoidance in uplink CoMP may include generating an orthogonal frequency division multiplexing (OFDM) symbol for uplink transmission to coordinated multi-point (CoMP) cells, and providing a cyclic-prefix and a cyclic-postfix for the OFDM symbol generated to reduce uplink interference without backhaul transmission for delay or timing advance information. A corresponding apparatus and computer program product are also provided. An alternative method of providing interference avoidance in uplink CoMP may include measuring timing differences between downlink signals received at a mobile terminal in connection with coordinated multi-point (CoMP) transmission from a serving cell and one or more coordinating cells and adjusting uplink transmission timing for signals to be transmitted from the mobile terminal based on the timing differences measured. A corresponding apparatus and computer program product are also provided.10-21-2010
20100329200APPARATUS AND METHOD FOR ALLOCATING UPLINK RESOURCES - An apparatus is provided for allocating uplink resources in a system in which downlink component carrier bands are aggregated and uplink component carrier bands are aggregated. The apparatus includes a processor configured to perform or cause the apparatus to perform a number of functions. The functions include receiving an assignment or an indication of an assignment of one or more resource indices to the apparatus. Additional resource indices for the apparatus may be derived as a function of an assigned resource index. The assigned resource indices and/or additional resource indices may be pre-assigned to respective pairs of downlink and uplink component carrier bands, or may be mapped to uplink component carriers. The apparatus may then be enabled to transmit or may prepare for transmission uplink control signals in an uplink component carrier band in accordance with an allocation of uplink resources specified by one of the resource indices.12-30-2010
20110164536SYSTEMS AND METHODS FOR DATA RELAY TRANSMISSION - A method for a base station to transmit data, the data to be relayed by a relay station to user equipment, the method including: encoding, based on an identification of the relay station or an identification of the user equipment, control information that indicates resource allocation for the relay station; and transmitting the control information to the relay station.07-07-2011

Chien-Min Lee, Kaohsiung City TW

Patent application numberDescriptionPublished
20080237562PHASE CHANGE MEMORY DEVICES AND FABRICATION METHODS THEREOF - Phase change memory devices and fabrication methods thereof. A phase change memory device comprises a stacked heating element with a conductive portion and a relatively high resistive portion, wherein the relatively high resistive portion includes a nitrogen-containing metal silicide part. The heating stacked element such as a highly resistive nitrogen-containing metal silicide (MSi10-02-2008
20080296554PHASE CHANGE MEMORY DEVICES AND FABRICATION METHODS THEREOF - Phase change memory devices and fabrication methods thereof. A phase change memory device includes an array of phase change memory cells. Each phase change memory cell includes a selecting transistor disposed on a substrate. An upright electrode structure is electrically connected to the selecting transistor. An upright phase change memory layer is stacked on the upright electrode structure with a contact area therebetween, wherein the contact area serves as the location where phase transition takes place.12-04-2008
20090078926PHASE CHANGE MEMORY DEVICE AND FABRICATION METHOD THEREOF - A phase change memory device comprising an electrode, a phase change layer crossing and contacting the electrode at a cross region thereof, and a transistor comprising a source and a drain, wherein the drain of the transistor electrically connects the electrode or the phase change layer is disclosed.03-26-2009
20100133495PHASE CHANGE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - A phase change memory device is provided, including a substrate, a first dielectric layer disposed over the substrate, a first electrode disposed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer, covering the first electrode, a heating electrode disposed in the second dielectric layer, contacting the first electrode, a phase change material layer disposed over the second dielectric layer, contacting the heating electrode, and a second electrode disposed over the phase change material layer. In one embodiment, the heating electrode includes a first portion contacting the first electrode and a second portion contacting the phase change material layer, and the second portion of the heating electrode includes metal silicides and the first portion of the heating electrode includes no metal silicides.06-03-2010
20100213432PHASE CHANGE MEMORY DEVICE AND FABRICATION THEREOF - A method for forming a phase change memory device is disclosed. A substrate with a bottom electrode thereon is provided. A heating electrode and a dielectric layer are formed on the bottom electrode, wherein the heating electrode is surrounded by the dielectric layer. The heating electrode is etched to form recess in the dielectric layer. A phase change material is deposited on the dielectric layer, filling into the recess. The phase change material is polished to remove a portion of the phase change material exceeding the surface of the dielectric layer and a phase change layer is formed confined in the recess of the dielectric layer. A top electrode is formed on the phase change layer and the dielectric layer.08-26-2010

Patent applications by Chien-Min Lee, Kaohsiung City TW

Chien-Min Lee, Hsin-Chu TW

Patent application numberDescriptionPublished
20100140583PHASE CHANGE MEMORY DEVICE AND FABRICATING METHOD THEREFOR - A phase change memory device and fabricating method are provided. A disk-shaped phase change layer is buried within the insulating material. A center via and ring via are formed by a lithography. The center via is located in the center of the phase change layer and passes through the phase change layer, and the ring via takes the center via as a center. A heating electrode within the center via performs Joule heating of the phase change layer, and the contact area between the phase change layer and the heating electrode is reduced by controlling the thickness of the phase change layer. Furthermore, a second electrode within the ring via dissipates the heat transmitted to the contact interface between the phase change layers, so as to avoid transmitting the heat to the etching boundary at the periphery of the phase change layer.06-10-2010

Chien-Min Lee, Taipei City TW

Patent application numberDescriptionPublished
20090320012SECURE BOOTING FOR UPDATING FIRMWARE OVER THE AIR - A firmware updating method for use in a mobile device is provided. The method comprises the following steps. First, during a previous downloading procedure or a previous updating procedure, a flag indicating a current status of the previous downloading procedure or the previous updating procedure, and a signature corresponding to the flag are generated and stored in a non-volatile storage device. Next, the flag and the signature are acquired from the non-volatile storage device when booting subsequent to the previous downloading or updating procedure. Next, integrity of the flag is verified by inspecting the signature. Lastly, the updating procedure is performed to update an original firmware with a new firmware when the integrity of the flag is verified and the flag indicates that the previous updating procedure is undergoing or the previous download procedure is completed.12-24-2009

Chien-Min Lee, Hsinchu County TW

Patent application numberDescriptionPublished
20090194759PHASE CHANGE MEMORY DEVICE - A phase change memory device is disclosed, including a substrate, a phase change layer over the substrate, a first electrode electrically connecting a first side of the phase change layer, a second electrode electrically connecting a second side of the phase change layer, wherein the phase change layer composes mainly of gallium (Ga), antimony (Sb) and tellurium (Te) and unavoidable impurities, having the composition range of Ga08-06-2009

Chien-Min Lee, Taipei County TW

Patent application numberDescriptionPublished
20090147900METHOD AND DEVICE FOR DETECTING A SYNCHRONIZATION SIGNAL IN A COMMUNICATION SYSTEM - A method and a device for detecting a synchronization signal with a high identification rate are provided, which are suitable for a wide-area Orthogonal Frequency Division Multiplexing (OFDM) system. The method and device can precisely detect information of a synchronization signal, without being interfered by transmission channels and noises in an external environment. Three sliding windows are used to obtaining a balance value as an offset value for the output signal of the method and the device. A peak position of the output signal is identified and then compensated for a delay caused by the length of one of the sliding windows. Such a position is an edge of the synchronization signal.06-11-2009
20110194630SYSTEMS AND METHODS FOR REPORTING RADIO LINK FAILURE - A mobile communications device is provided with a wireless module and a controller module. The wireless module receives a plurality of downlink signals from a service node and determines a plurality of status indicators respectively corresponding to the downlink signals. The controller module determines whether a radio link failure has occurred according to the status indicators, and transmits at least one uplink signal via the wireless module to indicate information of the radio link failure to the service node in response to the occurrence of the radio link failure.08-11-2011

Chien-Min Lee, Sinjhuang City TW

Patent application numberDescriptionPublished
20090067543Method and Apparatus for Multi-Rate Control in a Multi-Channel Communication System - An apparatus for data processing in a multi-channel communication system is provided. The apparatus includes an encoder configured to encode a number of bits for transmission via channels in the multi-channel communication system into coded bits and split the coded bits into a number of first sets of bits at a first ratio, a number of first rate units coupled to the encoder, each of the first rate units being configured to adjust one set of the first sets of bits in size at at least one rate, and a controller configured to assign the first ratio to the encoder and the at least one rate to each of the first rate units based on conditions of the channels.03-12-2009

Chien-Min Lee, Hsin Chu City TW

Patent application numberDescriptionPublished
20110218791System for Simulating Processor Power Consumption and Method of the Same - The present invention provides a method for simulating processor power consumption, the method comprises: simulating a simulated processor; utilizing a power analysis model to analyze the simulated processor's execution of at least one fragment of a program, for generating power analysis of a plurality of basic blocks of the at least one fragment; computing at least one power correction factor between the plurality of basic block; utilizing a processing apparatus to generate a simulation model with power annotation based on the power analysis and the at least one power correction factor; and predicting power consumption of the simulated processor based on the simulation model with power annotation.09-08-2011

Chien-Min Lee, Tu-Cheng TW

Patent application numberDescriptionPublished
20110260804PULSE WIDTH MODULATING CIRCUIT - A pulse width modulating (PWM) circuit includes an activating module and a pulse generating module connected to the activating module. The activating module includes a current resource and a compensation unit. The current source generates an activating current, and the compensating unit detects the activating current and compensates the activating current if the activating current changes. The activating current is input to the pulse generating module to generate pulse voltages output by the pulse generating module.10-27-2011