| Patent application number | Description | Published |
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| 20090089484 | DATA PROTECTION METHOD FOR POWER FAILURE AND CONTROLLER USING THE SAME - A data protection method suitable for a plurality of physical blocks mapped to a logical block in a non-volatile memory is provided. The data protection method includes recording data update information in each of the physical blocks for identifying an update relationship of the physical blocks and re-establishing the update relationship of the physical blocks according to the data update information. The data update information is composed of a plurality of words having a circular relationship, and the number of these words is greater than the number of the physical blocks. The data update information is sequentially recorded in each of the physical blocks according to the update relationship and the circular relationship. | 04-02-2009 |
| 20090094409 | WEAR LEVELING METHOD AND CONTROLLER USING THE SAME - A wear leveling method for non-volatile memory is provided, by which the non-volatile memory is substantially divided into a plurality of blocks and the blocks are grouped into a data area and a spare area. The method includes selecting a block based on an erased sequence when getting the block from the spare area. The method also includes performing a wear leveling procedure. | 04-09-2009 |
| 20090106484 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME - A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area. | 04-23-2009 |
| 20090150597 | DATA WRITING METHOD FOR FLASH MEMORY AND CONTROLLER USING THE SAME - A data writing method for a flash memory is provided. The data writing method includes: dividing a new data into at lease one sub-data by the length of a writing unit; selecting one of a plurality of spare blocks from the flash memory as a substitute block for substituting a data block, wherein the new data is to be written into the data block; sequentially writing the sub-data having the length of the writing unit into the substitute block in the writing unit; and storing the sub-data not having the length of the writing unit into a temporary area. The writing efficiency of the flash memory can be improved by temporarily storing the sub-data not having the length of the writing unit into the temporary area and then writing the sub-data not having the length of the writing unit with subsequent data into the substitute block. | 06-11-2009 |
| 20090172255 | WEAR LEVELING METHOD AND CONTROLLER USING THE SAME - A wear leveling method for a multi level cell (MLC) NAND flash memory is provided. The flash memory includes a first zone and a second zone respectively having a plurality of blocks, wherein each of the blocks includes an upper page and a lower page. The wear leveling method includes: respectively determining whether to start a block swapping operation of a wear leveling process in the first zone and the second zone of the flash memory according to different start-up conditions; and respectively performing the block swapping operation in the first zone and the second zone, wherein the blocks in the first zone are accessed by using only the lower pages, and the blocks in the second zone are accessed by using both the upper pages and the lower pages. Thereby, the lifespan of the flash memory is effectively prolonged and meaningless consumption of system resources is avoided. | 07-02-2009 |
| 20090172256 | DATA WRITING METHOD FOR FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND STORAGE DEVICE THEREOF - A data writing method for a block of a multi level cell NAND flash memory including upper page addresses and lower page addresses is provided, wherein a writing speed at the lower page addresses is higher than that at the upper page addresses. The data writing method includes receiving a writing command and determining whether an address to be written with new data in the writing command is the upper page address of the block. The method also includes copying old data previously recorded on the lower page addresses of the block as an old data backup when the address to be written in the writing command is the upper page address of the block and then writing the new data to the address to be written. Thus, old data may be protected while writing data to the upper page address of the multi level cell NAND flash memory. | 07-02-2009 |
| 20090198875 | DATA WRITING METHOD FOR FLASH MEMORY, AND CONTROLLER AND SYSTEM USING THE SAME - A data writing method for a flash memory is provided. The data writing method includes following steps. First, a block is selected as a substitute block from a spare area of the flash memory, wherein the substitute block is used for substituting a data block in a data area for writing a new data. Next, the new data is directly written into the substitute block starting from a start page, wherein there is valid data in the data block before the address for writing the new data. Thereby, meaningless data moving can be reduced, system performance can be improved, and overlong waiting time for writing the new data can be prevented. | 08-06-2009 |
| 20090216936 | DATA READING METHOD FOR FLASH MEMORY AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data reading method suitable for a flash memory storage system having a flash memory is provided, wherein the flash memory is substantially divided into a plurality of blocks and these blocks are grouped into at least a data area and a spare area. The data reading method includes: respectively determining whether the blocks in the data area are frequently read blocks; allocating a buffer storage area corresponding to the frequently read block and copying data stored in the frequently read block to the buffer storage area; and reading the data from the buffer storage area corresponding to the frequently read block when the data stored in the frequently read block is to be read. As described above, data loss caused by read disturb can be effectively prevented. | 08-27-2009 |
| 20090222643 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY AND CONTROLLER AND STORAGE SYSETM USING THE SAME - A block management method for managing a mapping relationship between a plurality of logical blocks and a plurality of physical blocks of a flash memory is provided. The block management method includes: grouping the logical blocks into a plurality of logical zones; recording the mapping relationship between each logical block in each logical zone and all the data physical blocks among the physical blocks in a corresponding logical zone table in unit of the logical zones; and recording all the no-data physical blocks among the physical blocks with a single no-data physical block table. Thereby, the logical blocks can be mapped to all the physical blocks so that frequent access to specific physical blocks can be avoided when a user writes data into a specific logical zone frequently, and accordingly the lifespan of the flash memory can be prolonged. | 09-03-2009 |
| 20090248961 | MEMORY MANAGEMENT METHOD AND CONTROLLER FOR NON-VOLATILE MEMORY STORAGE DEVICE - A memory management method and a controller for a non-volatile memory storage device are provided. The memor management method and the controller are adapted for establishing a logical-to-physical mapping table of each block in a memory buffer of the controller by merely reading the data stored in a system management area within a start page of each block, so as to promote the management efficiency of the non-volatile memory storage device. In addition, the method and the controller of the present invention integrate all of or a part of the system management areas within the start page for efficiently managing and using the memory capacity of all the system management areas within the start page. | 10-01-2009 |
| 20090287877 | MULTI NON-VOLATILE MEMORY CHIP PACKAGED STORAGE SYSTEM AND CONTROLLER AND ACCESS METHOD THEREOF - A multi non-volatile memory chip packaged storage system having a memory module, a controller, a first and a second control buses and a first and a second I/O buses is provided. The memory module at least includes a first and a second non-volatile memory chips which are both enabled by receiving a chip enabled signal via a chip enabled pin, wherein the memory module and the controller are stacked and packaged as a single chip. After the first and the second non-volatile memory chips are enabled by the chip enable signal via the chip enabled pin, the controller may active the first and second control buses and the first and second I/O buses to access the first and the second non-volatile memory chips, or only active the first control and I/O buses or the second control and I/O buses to access the corresponding first or second non-volatile memory chip. | 11-19-2009 |
| 20090300271 | STORAGE SYSTEM HAVING MULTIPLE NON-VOLATILE MEMORIES, AND CONTROLLER AND ACCESS METHOD THEREOF - A non-volatile memory storage system including a transmission interface, a memory module, and a controller is provided. The memory module includes first and second non-volatile memory chips. The first and the second non-volatile memory chips can be simultaneously enabled by receiving a chip enable signal from the controller via a chip enable pin. When the controller performs a multichannel access, the controller provides an access instruction to the first and second non-volatile memory chip, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal. When the controller performs a single channel access, the controller provides the access signal to one of the first and second non-volatile memory chips, and provides a non-access instruction to the other one, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal. | 12-03-2009 |
| 20090307413 | DATA WRITING METHOD FOR FLASH MEMORY AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data writing method for a multi-level cell (MLC) NAND flash memory and a storage system and a controller using the same are provided. The flash memory includes a plurality of blocks. Each of the blocks includes a plurality of page addresses. The page addresses are categorized into a plurality of upper page addresses and a plurality of lower page addresses. The writing speed of the lower page addresses is faster than that of the upper page addresses. The data writing method includes receiving a writing command and data and writing the data into a page address. The page address is skipped when it is an upper page address and a corresponding lower page address stores a valid data written by a previous writing command. Thereby, the accuracy of the data written by the previous writing command is ensured when a programming error occurs to the flash memory. | 12-10-2009 |
| 20100011151 | DATA ACCESSING METHOD, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module. | 01-14-2010 |
| 20100030979 | DATA MANAGEMENT METHOD, AND STORAGE APPARATUS AND CONTROLLER THEREOF - A data management method, a controller and a storage apparatus thereof are provided. The method is adapted for a storage apparatus having a plurality of blocks. Parts of the blocks are linked to configure a plurality of mother and child blocks (M&C block). The data management method includes: (a) checking whether a mother and child block currently to be written with data is the same of a mother and child block which has been most lately written with data; (b) when it is determined that the mother and child block currently to be written with data is not the same of the mother and child block which has been most lately written with data, saving a transient data of the mother and child block currently to be written with data to a mother and child block transient relationship table. | 02-04-2010 |
| 20100042774 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management method for a flash memory chip having multiple planes is provided, wherein each plane has a plurality of physical blocks. The method includes disposing a plurality of physical units, wherein each physical unit includes a physical block of each plane, and the physical blocks in the physical unit have a simultaneously-operable relationship. The method also includes writing data in a single plane access mode when a host system does not update all the physical blocks in an updated the physical unit. The method further includes writing the data in a multi-planes access mode when the host system updates all the physical blocks in the updated physical unit, wherein the physical blocks for writing the data have the simultaneously-operable relationship. | 02-18-2010 |
| 20100057979 | DATA TRANSMISSION METHOD FOR FLASH MEMORY AND FLASH MEMORY STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data transmission method suitable for transmitting data from a cache to a plurality of flash memory groups through a single data bus in a flash memory storage system is provided. The data transmission method includes sequentially sorting and grouping data to be written at continuous logical addresses in the cache in unit of logical blocks. The data transmission method further includes respectively transmitting the grouped sector data into the flash memory groups through the data bus in an interleaving manner, wherein data in the same logical block is transmitted and written into physical blocks of the same flash memory group. Thereby, the data is prevented from being written into different physical blocks, and accordingly the lifespan of the flash memory storage system is prolonged. | 03-04-2010 |
| 20100088540 | BLOCK MANAGEMENT AND REPLACEMENT METHOD, FLASH MEMORY STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management and replacement method for a flash memory is provided. The method includes grouping physical blocks of the flash memory into physical units and dividing the physical units as a usage area and a replacement area, wherein the physical blocks grouped into the same physical unit are accessed by using a multi-planes accessing command. The method also includes when one of the physical block of the physical unit in the usage area is damaged, replacing the physical unit having the damaged physical block with one physical unit selected from the replacement area and recording the undamaged physical block within the replaced physical unit if there is an applicable physical unit in the replacement area; and replacing the damaged physical block with one physical block selected from the replacement area if there is no applicable physical unit but an undamaged physical block in the replacement area. | 04-08-2010 |
| 20100125772 | ERROR CORRECTING CONTROLLER, FLASH MEMORY CHIP SYSTEM, AND ERROR CORRECTING METHOD THEREOF - An error correcting controller for connecting an old host controller having an old error correcting function with a new flash memory which requires a new error correcting function is provided. When the old host controller needs to write data into the new flash memory, the error correcting controller generates a new error correcting code according to the new error correcting function for the data. Then, when the old host controller needs to read the data from the new flash memory, the error correcting controller performs an error correcting procedure according to the new error correcting code and transmits information to the old host controller according to the result of the error correcting procedure and the old error correcting function. Accordingly, it is possible to allow the old host controller to access the new flash memory without changing the architecture of the old host controller. | 05-20-2010 |
| 20100180145 | DATA ACCESSING METHOD FOR FLASH MEMORY, AND STORAGE SYSTEM AND CONTROLLER SYSTEM THEREOF - A data accessing method for accessing data in a plurality of physical page addresses of a plurality of physical blocks in a flash memory chip is provided. The data accessing method includes proving a plurality of logical page addresses for a host system, creating a logical page to physical page mapping table and a physical page to logical page mapping table to record the mapping between the logical page addresses and the physical page addresses. The data accessing method also includes writing data into the physical page addresses, and updating the logical page to physical page mapping table and the physical page to logical page mapping table. The data accessing method further includes determining whether the physical page addresses are valid or invalid based on the logical page to physical page mapping table and the physical page to logical page mapping table. | 07-15-2010 |
| 20100205352 | MULTILEVEL CELL NAND FLASH MEMORY STORAGE SYSTEM, AND CONTROLLER AND ACCESS METHOD THEREOF - A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host system. When the controller receives a write command and a user data from the host system, the controller writes the user data into a page of a MLC physical block and records the page of the SLC logical block corresponding to the page of the MLC physical block. When the controller receives an erase command from the host system, the controller writes a predetermined data into the page of the MLC physical block mapped to the SLC logical block to be erased, wherein the predetermined data has the same pattern as a pattern of the erased page. | 08-12-2010 |
| 20100241789 | DATA STORAGE METHOD FOR FLASH MEMORY AND DATA STORAGE SYSTEM USING THE SAME - A data storage method for a flash memory storage device is provided. The method includes disposing a pattern identification unit in the flash memory storage device and disposing a pattern analysis unit in a host connected to the flash memory storage device. The method further includes analyzing a usage pattern of each flash memory storage address in the flash memory storage device by using the pattern analysis unit, receiving information from the pattern analysis unit through the pattern identification unit to identify the usage pattern of each flash memory storage address, and storing data into each flash memory storage address through a corresponding process according to the usage pattern of the flash memory storage address. Thereby, data can be stored according to the usage pattern of each flash memory storage address, and accordingly the speed of storing data into the flash memory storage device can be effectively increased. | 09-23-2010 |
| 20100262892 | DATA ACCESS METHOD FOR FLASH MEORY AND STORAGE SYSTEM AND CONTROLLER THEREOF - A data access method for accessing data in a flash memory is provided, wherein the data has a plurality of sub-data. The data access method includes generating an error correction code (ECC) for the data and writing the data and the ECC into the flash memory. The data access method also includes generating a corresponding bit checking code for each of the sub-data and writing the bit checking codes into the flash memory. When the sub-data subsequently is read from the flash memory, whether the sub-data contains any error is determined only according to the bit checking code corresponding to the sub-data. Thereby, the data access efficiency is improved. | 10-14-2010 |
| 20110022787 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME - A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area. | 01-27-2011 |
| 20110107015 | DATA WRITING METHOD FOR A FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE SYSTEM USING THE SAME - A data writing method for writing data from a host system into a flash memory chip having a plurality of physical blocks is provided. The method includes configuring a plurality of logical access addresses and recording address centers and address radiuses for the physical blocks. The method also includes receiving data to be written in logical access addresses, determining opened physical blocks among the physical blocks, and writing the data into the flash memory chip based on the logical access addresses, and the address centers and the address radiuses of the opened physical blocks. Accordingly, the method can effectively reduce the degree of data dispersion of each of the physical blocks, reduce the time for organizing valid data, and increase the speed for writing data. | 05-05-2011 |
| 20110113184 | DATA BACKUP METHOD FOR A FLASH MEMORY AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data backup method for backing up data temporarily stored in a cache memory of a flash memory storage device is provided, where the flash memory storage device has a plurality of physical units. The data backup method includes logically grouping a portion of the physical units into a data area and a cache area. The data backup method also includes determining whether a trigger signal is received; and when the trigger signal is received, copying the data temporarily stored in the cache memory into the cache area. Accordingly, the data backup method can quickly write the data temporarily stored in the cache memory into the physical units, thereby preventing a time out problem which may occur in the flash memory storage device. | 05-12-2011 |
