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Chien-Hsun
Chien-Hsun Cheng, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20080304709 | IMAGE PROCESSING METHOD FOR A TFT LCD - Image compression, decompression and motion detection methods are described. Two temporally adjacent frame images, a previous time frame and a current time frame, are compressed in round-off and averaging techniques. Next, according to the compressed data of two corresponding pixels of the two frame images, whether or not the pixel of the current time frame image is of a motion picture is detected. If the pixel is of a motion picture, the compressed pixel data of the previous time frame image is decompressed, and an overdrive process is performed on the decompressed pixel data and the original pixel data of the current time frame image to produce an overdrive output. If the pixel is not of a motion picture, an overdrive process is not performed. | 12-11-2008 |
Chien-Hsun Huang, Tu-Cheng TW
| Patent application number | Description | Published |
|---|---|---|
| 20100317236 | CONTACT AND CABLE ASSEMBLY WITH THE CONTACT - A contact used in a cable assembly for connecting to cables includes a flat portion extending along a horizontal direction, a flat connecting portion forward extending from the flat portion, a pair of fastening arms respectively extending from two sides of the flat portion along a vertical direction and a mating portion formed by two curving pieces and respectively forwardly extending from the fastening arms; wherein said cables are soldered on the contacts. | 12-16-2010 |
| 20110008997 | CABLE ASSEMBLY WITH FLAT CABLE - A cable assembly includes an electrical connector, a flat cable, a flexible printed circuit electrically connecting the flat cable to the electrical connector, and a spacer fastened on the electrical connector for supporting the flexible printed circuit. The electrical connector includes an insulation housing and a plurality of terminals receiving in the housing and each of which has an tail exposed out of the housing. The flexible printed circuit includes a vertical connecting portion connected to the terminals of the electrical connector and a horizontal connecting portion separated from the vertical connecting portion and connected to one end of the flat cable. | 01-13-2011 |
Chien-Hsun Huang, New Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20110183534 | ELECTRICAL CONNECTOR WITH IMPROVED HANDLING PORTION - An electrical connector includes a housing, a plurality of contacts received in the housing, a shielding and a handling portion. The housing includes a mating portion and a connecting portion. The shielding includes a first upper cover and a second down cover respectively assembled on the housing from up to down and from down to up. The upper cover and the down cover respectively includes a pair of extending arm to combine to form a fastening portion located on the two sides of the shielding. The handling portion is fixed on the fastening portion and includes a connecting element, and a cover over mode on the connecting element, a pair of fastening arms inserted into the fastening portion of the shielding. The cover is apart from the housing. | 07-28-2011 |
| 20110195608 | ELECTRICAL CONNECTOR WITH IMPROVED RECEIVING CHANNELS LATCHED WITH CONTACTS - An electrical connector ( | 08-11-2011 |
| 20120100757 | ELECTRICAL CONNECTOR WITH IMPROVED CONTACTS - An electrical connector, comprising an insulative housing, at least two conductive terminals received in the insulative housing and defining an upper terminal and a lower terminal, each conductive terminal comprising a retaining portion retained in the insulative housing, a mating portion extending forwardly from the retaining portion and a soldering portion extending rearwardly from the retaining portion. The structures of the upper terminal and the lower terminal are the same as each other. The mating portions of the upper terminal and the lower terminal are arranged in two rows. The soldering portions of the upper terminal and the lower terminal are arranged in one row. | 04-26-2012 |
Chien-Hsun Lee, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090278581 | DELAY LOCK LOOP AND PHASE ANGLE GENERATOR - The provided delay lock loop delaying an input signal includes a quadrature generator, a voltage controller and a delay cell. The input signal is inputted into the quadrature generator and the delay cell. A phase-changing signal from the quadrature generator and a delay signal respectively from the delay cell are inputted into the voltage controller at the same time so that a control voltage inputted into the delay cell to control a delay time of the delay signal is generated. Also, the provided phase angle generator generates an output signal in an arbitrary phase. | 11-12-2009 |
Chien-Hsun Lin, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080198351 | Lithography Scanner Throughput - A method for use in the manufacture of a microelectronic apparatus, the method comprising exposing a dummy field on a substrate by utilizing a lithographic scanner at a first speed, and exposing a production field on the substrate by utilizing the lithographic scanner at a second speed, where the first speed is substantially greater than the second speed. In a related embodiment, a method for use in the manufacture a microelectronic apparatus comprises exposing a non-critical layer of the apparatus by utilizing a lithographic scanner at a first speed, and exposing a critical layer of the apparatus by utilizing the lithographic scanner at a second speed, where the first speed is substantially greater than the second speed. | 08-21-2008 |
| 20120045192 | SYSTEM AND METHOD FOR IMPROVING IMMERSION SCANNER OVERLAY PERFORMANCE - System and method for improving immersion scanner overlay performance are described. One embodiment is a method of improving overlay performance of an photolithography immersion scanner comprising a wafer table having lens cooling water (“LCW”) disposed in a water channel therein, the wafer table having an input for receiving the LCW into the water channel and an output for expelling the LCW from the water channel. The method comprises providing a water tank at at least one of the wafer table input and the wafer table output; monitoring a pressure of water in the water tank; and maintaining the pressure of the water in the water tank at a predetermined level. | 02-23-2012 |
Chien-Hsun Tsai, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100254894 | METHOD FOR SYNTHESIZING ALL-SILICA ZEOLITE BETA WITH SMALL CRYSTAL SIZE - A method for synthesizing the all-silica zeolite beta with small crystal size is disclosed. This method comprises the steps of: (a) forming a reaction mixture comprising (1) a source of silicon dioxide (SiO | 10-07-2010 |
Chien-Hsun Wang, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110024804 | METHOD FOR FORMING HIGH GERMANIUM CONCENTRATION SIGE STRESSOR - A method for producing a SiGe stressor with high Ge concentration is provided. The method includes providing a semiconductor substrate with a source area, a drain area, and a channel in between; depositing the first SiGe film layer on the source area and/or the drain area; performing a low temperature thermal oxidation, e.g., a high water vapor pressure wet oxidation, to form an oxide layer at the top of the first SiGe layer and to form the second SiGe film layer with high Ge percentage at the bottom of the first SiGe film layer without Ge diffusion into the semiconductor substrate; performing a thermal diffusion to form the SiGe stressor from the second SiGe film layer, wherein the SiGe stressor provides uniaxial compressive strain on the channel; and removing the oxide layer. A Si cap layer can be deposited on the first SiGe film layer prior to performing oxidation. | 02-03-2011 |
| 20110227188 | INTEGRATED CIRCUITS INCLUDING DUMMY STRUCTURES AND METHODS OF FORMING THE SAME - An integrated circuit includes a core area. The core area has at least one edge region and a plurality of transistors disposed in the edge region. A plurality of dummy structures are disposed outside the core area and adjacent to the at least one edge region. Each channel of the transistors in a channel width direction faces at least one of the dummy structures. | 09-22-2011 |
| 20120124528 | METHOD AND DEVICE FOR INCREASING FIN DEVICE DENSITY FOR UNALIGNED FINS - A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. A plurality of elongate mandrels is defined in a plurality of active regions. Where adjacent active regions are partially-parallel and within a specified minimum spacing, connective elements are added to a portion of the space between the adjacent active regions to connect the mandrel ends from one active region to another active region. | 05-17-2012 |
| 20120126326 | DEVICE AND METHOD FOR FORMING FINS IN INTEGRATED CIRCUITRY - A semiconductor FinFET device includes a plurality of gate lines formed in a first direction, and two types of fin structures. A first type of fin structures is formed in a second direction, and a second type of fin structures formed perpendicular to the first type of fin structures. A contact hole couples to one or more of the second type of fin structures. | 05-24-2012 |
| 20120126375 | METHOD FOR FORMING METROLOGY STRUCTURES FROM FINS IN INTEGRATED CIRCUITRY - A method for forming a plurality of fins on a semiconductor substrate includes depositing a spacer layer to fill in gaps between the plurality of fins, the fins comprising a first material and the spacer layer comprising a second material. A first area is defined where the fins need to be broadened and a second area is defined where the fins do not need to be broadened. The method also includes patterning the spacer layer to remove spacers in the first area where the fins need to be broadened and applying an epitaxy process at a predetermined rate to grow a layer of the first material on fins in the first area. The spacer layer is removed in the second area where the fins do not need broadening. | 05-24-2012 |
Chien-Hsun Wang, Pleasanton, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090052458 | Flow state attributes for producing media flow statistics at a network node - A method in one embodiment includes allocating, by a node of a network, a flow label attribute identifying a media flow associated with a Session Description Protocol (SDP) media session. The media flow is between a sender and receiver nodes over a media transmission path of the network. The node further specifying a flow state attribute to generate media flow information and communicating the flow label and the flow state attribute to downstream nodes in the media transmission path. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. | 02-26-2009 |
Chien-Hsun Wang, Hsin Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120126325 | METHOD FOR ADJUSTING FIN WIDTH IN INTEGRATED CIRCUITRY - A method includes growing a plurality of parallel mandrels on a surface of a semiconductor substrate, each mandrel having at least two laterally opposite sidewalls and a predetermined width. The method further includes forming a first type of spacers on the sidewalls of the mandrels, wherein the first type of spacers between two adjacent mandrels are separated by a gap. The predetermined mandrel width is adjusted to close the gap between the adjacent first type of spacers to form a second type of spacers. The mandrels are removed to form a first type of fins from the first type of spacers, and to form a second type of fins from spacers between two adjacent mandrels. The second type of fins are wider than the first type of fins. | 05-24-2012 |
Chien-Hsun Wu, Banqiao City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100133027 | SERIES-PARALLEL COUPLING CONTROL METHOD AND SYSTEM OF HYBRID POWER SYSTEM - A series-parallel coupling control method and system for a hybrid driver are suitable for a hybrid power vehicle. The hybrid driver is used to produce a driving force to drive a load. The hybrid driver includes a first power generation unit, a second power generation unit, and a main controller. The main controller selectively controls the system to drive the load in a series power coupling mode or a parallel power coupling mode. The main controller switches between the series coupling mode and the parallel coupling mode by using rotation speed compensation or torque/power compensation. Therefore, the driven load will not suffer from sudden thrust or jerk. | 06-03-2010 |
Chien-Hsun Wu, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20090150016 | VEHICLE HYBRID POWER SYSTEM AND METHOD FOR CREATING SIMULATED EQUIVALENT FUEL CONSUMPTION MULTIDIMENSIONAL DATA APPLICABLE THERETO - A vehicle hybrid power system is provided according to the present invention. The hybrid power system is characterized by applying the concept of minimum equivalent fuel consumption, and then simulating equivalent fuel consumptions based on respective energy consumption or increase of motor and generator of a motor vehicle, and also defining simulated equivalent fuel consumption formula and making a list of system state parameters, system control parameters, and system negative load parameters, thereby obtaining simulated equivalent fuel consumption multidimensional data by entering the system parameters derived from a discretization/transformation process in the defined simulated equivalent fuel consumption formula; wherein, the simulated equivalent fuel consumption multidimensional data are revised to comprise subsystems, such as system engine, motor, generator, and others to determine a system control strategy of holistic optimization, thereby achieving the objective of saving energy. The present invention further provides a method for creating simulated equivalent fuel consumption multidimensional data, which is applicable to the hybrid power system of the present invention. | 06-11-2009 |