Patent application number | Description | Published |
20150051859 | ANALYTIC SYSTEM OF WAFER BIN MAP AND NON-TRANSITORY COMPUTER READABLE MEDIA THEREOF - The present invention relates to an analytic system of wafer bin map and a non-transitory computer readable media thereof. The analytic system of wafer bin map includes a wafer bin map input module, a wafer bin map database, a degeneration module, a standardization module, a coordinate transformation module, a defect density characterization module, a test of randomness module, a similarity comparison module, and a pattern evaluation module. | 02-19-2015 |
20150051936 | RESOURCE PLANNING SYSTEM AND METHOD FOR CLASSIFICATION PRODUCTS - Disclosure is a resource planning system and method for classification products. The system comprises an input module and a planning module. The input module is used to receive wafer information, manufacturing process information, classification product information and order information. The wafer information comprises a wafer purchasing cost and a wafer inventory cost; the manufacturing process information comprises a production distribution and a production cost for the manufacturing process; the classification product information comprises a classification product inventory cost; the order information comprises a sale amount of customer orders and a penalty cost by unmet orders. The planning module calculates a profit by deducting the wafer purchasing cost, the production cost, the wafer inventory cost, the classification product inventory cost and the penalty cost from the sale amount. The profit gets the maximum value by planning resource allocation of each module. | 02-19-2015 |
20150066177 | METHOD OF DISPATCHING SEMICONDUCTOR BATCH PRODUCTION - Disclosure is a method of dispatching semiconductor batch production, including: measuring an actual line width to calculate an estimated value of line width bias reference level, an estimated value of product bias, an estimated value of chamber bias and a standard error of chamber bias, and storing in a historical data module; inputting a product category, a line width measurement before manufacturing and a target line width after manufacturing in a batch production module; calculating a similarity index of each chambers by a computing engine of a matching module according to the data stored in the historical data module; transforming the similarity index into a priority of machine allocation by a dispatching module and dispatching a production machine; updating the historical data module by measuring a line width after manufacturing. The line width bias generated by various variations will be eliminated during the manufacturing process. | 03-05-2015 |
20150074025 | MULTI-OBJECTIVE SEMICONDUCTOR PRODUCT CAPACITY PLANNING SYSTEM AND METHOD THEREOF - Disclosure is a multi-objective semiconductor product capacity planning system and method thereof. The system comprises a data input module, a capacity planning module and a computing module. The machine information of the production stations, the product information and the order information are input by the data input module. According to the demand quantity of order, capacity information and product information, the capacity planning module plans a capacity allocation to determine the satisfied quantity of orders. The capacity allocation information is used to form a gene combination by chromosome encoding method. The computing module calculates the gene combination several times to generate numerous candidate solutions by a multi-objective genetic algorithm. The numerous candidate solutions sorts out and generates a new gene combination, and repeats the calculation to form candidate solution set until stop condition is satisfied. The candidate solution set is transformed into numerous suggestive plans as options. | 03-12-2015 |
Patent application number | Description | Published |
20090041177 | SHIFT REGISTER ARRAYS - A shift register array is provided. The shift register array includes a plurality of shift registers connected in serial. The shift register includes a first transistor coupled between a first input terminal and a first node, a second transistor coupled between a first clock input terminal and an output terminal and a pull-up unit. The first transistor has a gate coupled to the first input terminal. The second transistor has a gate coupled to the first node. The pull-up unit includes a third transistor coupled between the first node and a ground, a capacitor coupled between the first clock input terminal and the second node and a fourth transistor coupled between the second node and the ground. The third transistor has a gate coupled to a second node. The fourth transistor has a gate coupled to the first node. | 02-12-2009 |
20090262056 | Liquid crystal display panel with color washout improvement and applications of same - A liquid crystal display (LCD) panel with color washout improvement. In one embodiment, the LCD panel a plurality of pixels, {P | 10-22-2009 |
20090273592 | PIXEL CIRCUIT, DISPLAY PANEL, AND DRIVING METHOD THEREOF - A pixel circuit includes a first sub-pixel and a second sub-pixel. The first sub-pixel is coupled to a scan line and a data line, so as to determine whether to be enabled according to a first scan signal transmitted on the scan line, and whether to be driven according to a data signal transmitted on the data line. The second sub-pixel is coupled to the scan line, so as to determine whether to be enabled according to the first scan signal. The data signal is in a first state when the first scan signal is in a pre-charged period. The data signal is in a second state during a time interval after the pre-charged period is over and before the first scan signal enters a turn-on period. Voltage polarities of the first state and the second state are opposite. The pixel design can improve color shift and frame flicker. | 11-05-2009 |
20100109738 | Gate driver and method for making same - A gate driver for use in a liquid crystal display has a plurality of shift registers connected in series. Each of the shift registers is used to provide a gate-line pulse to a row of pixels in the liquid crystal display. The gate-line pulse has a front pulse and a rear pulse and the shift register has a front-pulse generating part and a rear-pulse generating part for generating to corresponding pulse. Each of the pulse generating parts has a first pull-up circuit to generate a voltage level to keep a switching element in a second pull-up circuit conducting so as to generate a front or rear pulse, in response to a corresponding clock signal, and two pull-down circuits, in response to the voltage level, to allow the front or rear pulse to be generated only at a pull-down period. | 05-06-2010 |
20100328293 | Shift Register Array, and Display Apparatus - A display apparatus comprises a shift register array. The shift register array comprises a plurality of shift registers. At least one shift register comprises a first transistor, a second transistor, a third transistor, and a driving circuit. The gate and the first electrode of the first transistor receive an input signal. The gate of the second transistor is coupled to the second electrode of the first transistor. The second electrode of the second transistor generates an output signal. The first electrode of the second transistor receives a clock signal. The third transistor is used to pull down a voltage level at the gate of the second transistor. The driving circuit determines an on/off status of the third transistor in response to the input signal and the output signal. | 12-30-2010 |
Patent application number | Description | Published |
20140361965 | OLED PANEL WITH PARTITION PLATE - An OLED panel includes a plurality of pixels. Each pixel includes a first sub-pixel, a second sub-pixel and a third sub-pixel spaced from each other by a plurality of baffle plates. The first sub-pixel of each pixel is located adjacent to that of a neighboring pixel. The first sub-pixel of each pixel is spaced from that of the neighboring pixel by a partition plate. The partition plate has a height less than a height of each baffle plate. | 12-11-2014 |
20150179711 | ORGANIC LIGHT EMITTING DIODE ARRAY - The disclosure relates to an organic light emitting diode array. The organic light emitting diode array includes a base defining a number of convexities spaced from each other, a number of first electrodes located on the convexities, a number of electroluminescent layers located on the first electrodes, a patterned second insulative layer located among the convexities to cover part of the base and expose the electroluminescent layers, and a number of second electrodes electrically connected to the electroluminescent layers. The first electrodes are parallel with each other and extend along a first direction. The second electrodes are parallel with each other and extend along a second direction different from the first direction. | 06-25-2015 |
20150179712 | METHOD FOR MAKING ORGANIC LIGHT EMITTING DIODE ARRAY - The disclosure relates to a method of making organic light emitting diode array. A base defining a plurality of convexities is provided. A number of first electrodes are applied on the plurality of convexities. At least one hole injection layer is applied on the first electrodes. A number of hole transport layers are transfer printed on the at least one hole injection layer. Three of the hole transport layers, that correspond to the same pixel unit, have different thickness. A number of electroluminescent layers are applied on the hole transport layers. A patterned second insulative layer is made among the convexities to expose the electroluminescent layers. A second electrode is electrically connected to the electroluminescent layers. | 06-25-2015 |
20150179715 | ORGANIC LIGHT EMITTING DIODE ARRAY - The disclosure relates to an organic light emitting diode array. The organic light emitting diode array includes a number of thin-film transistors arranged to form an array, a first insulative layer, a plurality of first electrodes, a number of electroluminescent layers, a patterned second insulative layer, and at least one second electrode. The first insulative layer is located on the plurality of first electrodes defines a number of convexities. The first electrodes are located on the convexities and electrically connected to the thin-film transistors. The electroluminescent layers are located on the first electrodes. The patterned second insulative layer is located on the first insulative layer to cover the first electrodes and expose the electroluminescent layers. The at least one second electrode is electrically connected to the electroluminescent layers. | 06-25-2015 |
20150179723 | METHOD FOR MAKING ORGANIC LIGHT EMITTING DIODE ARRAY - The disclosure relates to a method of making organic light emitting diode array. A base defining a number of convexities is provided. A number of first electrodes are applied on the number of convexities. A number of electroluminescent layers are transfer printed on the number of first electrodes to form the number of organic light emitting layers. A patterned second insulative layer is made to cover the number of first electrodes and expose the number of organic light emitting layers. A second electrode is electrically connected to the number of organic light emitting layers. | 06-25-2015 |
20150179944 | METHOD FOR MAKING ORGANIC LIGHT EMITTING DIODE ARRAY - The disclosure relates to a method of making organic light emitting diode array. A base defining a plurality of convexities is provided. A number of first electrodes are applied on the plurality of convexities. A number of red light electroluminescent layers are transfer printed on a first group of the first electrodes. A number of green light electroluminescent layers are transfer printed on a second group of the first electrodes. A number of blue light electroluminescent layers are transfer printed on a third group of the first electrodes. A patterned second insulative layer is made to cover the number of first electrodes and expose the electroluminescent layers. A second electrode is electrically connected to the electroluminescent layers. | 06-25-2015 |
20150179945 | METHOD FOR MAKING ORGANIC LIGHT EMITTING DIODE ARRAY - The disclosure relates to a method of making organic light emitting diode array. A base defining a number of convexities is provided. Three of the convexities, that correspond to the same pixel unit, have different heights. A number of first electrodes are applied on the number of convexities. A number of electroluminescent layers are transfer printed on the number of first electrodes to form the number of organic light emitting layers. A patterned second insulative layer is made to cover the number of first electrodes and expose the number of organic light emitting layers. A second electrode is electrically connected to the number of organic light emitting layers. | 06-25-2015 |
20150179946 | METHOD FOR MAKING ORGANIC LIGHT EMITTING DIODE ARRAY - The disclosure relates to a method of making organic light emitting diode array. A base defining a plurality of convexities is provided. A number of first electrodes are applied on the plurality of convexities. A patterned second insulative layer is made among the convexities to cover first parts of the first electrodes between the convexities and expose second parts of the first electrodes on top surfaces of the convexities to form a number of protrudent portions. A number of electroluminescent layers are transfer printed on the number of protrudent portions to form a number of organic light emitting layers. A second electrode is electrically connected to the number of organic light emitting layers. | 06-25-2015 |
Patent application number | Description | Published |
20090121696 | Controller of DC-DC Converter And Controlling Method Thereof - A PWM controller of a DC-DC converter is provided. The DC-DC converter converts an input voltage into an output voltage and comprises an output inductor coupled between an output of the DC-DC converter and a phase node. A first sense circuit senses a signal from the phase node to generate a first signal corresponding to the input voltage. A second sense circuit senses the signal from the phase node to generate a second signal corresponding to the output voltage. A PWM generator controls a first transistor and a second transistor of the DC-DC converter according to the first and second signals. The first transistor is coupled between the input voltage and the phase node, and the second transistor is coupled between the phase node and a ground. | 05-14-2009 |
20090267573 | Power Supplies, Power Supply Controllers, And Power Supply Controlling Methods - A power supply controller is provided. The power supply controller includes a switching device, an inductor, a comparator, and a sensing device. The switching device is coupled to an input power source and switches according to a comparing result. The inductor is coupled between the switching device and an output terminal, and conducts an inductor current. The comparator is coupled to the output terminal, a reference power source and a bias voltage, compares the voltage level of the output voltage and the reference voltage, and outputs the comparing result according to the bias voltage. The sensing device is coupled to the inductor and the comparator, senses the inductor current, generates a sensed voltage according to the inductor current, and adjusts the bias voltage according to the sensed voltage. | 10-29-2009 |
20110031948 | DC-DC CONVERTER - A DC-DC converter including a Pulse Width Modulation (PWM) controller for converting an input voltage into an output voltage is provided. The PWM controller includes an error amplifier, a comparator, a PWM generator and a ramp generator. The error amplifier generates an error signal according to a difference between a reference voltage and the output voltage. The comparator compares the error signal with a ramp signal to generate a trigger signal. The PWM generator generates a PWM signal with a fixed turn-on time, wherein a frequency of the PWM signal is adjusted according to the trigger signal, the input and output voltages. The ramp generator generates the ramp signal according to the PWM signal, the input voltage and the output voltage. | 02-10-2011 |
20130147456 | DC-DC CONVERTER - A DC-DC converter including a Pulse Width Modulation (PWM) controller for converting an input voltage into an output voltage is provided. The PWM controller includes: an error amplifier, receiving a reference voltage and a feedback voltage and provides an error signal; a compensation unit coupled to an output of the error amplifier, compensating the error signal and comprising a first resister and a first capacitor; a ramp generator, generating a ramp signal according to a constant on time PWM signal; a first comparator coupled to the compensation unit and the ramp generator, comparing the compensated error signal with the ramp signal to generate a trigger signal; and a PWM generator coupled to the first comparator, providing the constant on time PWM signal according to the trigger signal, an input voltage of the DC-DC converter and the output voltage of the DC-DC converter. | 06-13-2013 |
20140084891 | DC-DC CONVERTER - A DC-DC converter including a Pulse Width Modulation (PWM) controller for converting an input voltage into an output voltage is provided. The PWM controller includes a first comparator, receiving a compensated error signal and a ramp signal, wherein when the compensated error signal exceeds the ramp signal, the first comparator generates a trigger signal. The PWM controller further includes a PWM generator coupled to the first comparator, providing a timing signal according to the trigger signal to control the operation of the DC-DC converter. | 03-27-2014 |
Patent application number | Description | Published |
20110242874 | RESISTIVE MEMORY AND METHOD FOR CONTROLLING OPERATIONS OF THE SAME - A resistive memory and a method for controlling operations of the resistive memory are provided. The resistive memory has a first memory layer, a second memory layer and a medium layer. Each of the first memory layer and the second memory layer is used to store data. The medium layer is formed between the first memory layer and the second memory layer. The method comprises at least a step of measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance. | 10-06-2011 |
20110286258 | NONVOLATILE MEMORY DEVICE HAVING A TRANSISTOR CONNECTED IN PARALLEL WITH A RESISTANCE SWITCHING DEVICE - A memory device comprises an array of memory cells each capable of storing multiple bits of data. The memory cells are arranged in memory strings that are connected to a common source line. Each memory cell includes a programmable transistor connected in parallel with a resistance switching device. The transistor is switchable between a plurality of different threshold voltages associated with respective memory states. The resistance switching device is configured to be switchable between a plurality of different resistances associated with respective memory states. | 11-24-2011 |
20130028005 | RESISTIVE MEMORY ARRAY AND METHOD FOR CONTROLLING OPERATIONS OF THE SAME - A resistive memory and a method for controlling operations of the resistive memory are provided. The resistive memory has a first memory layer, a second memory layer and a medium layer. Each of the first memory layer and the second memory layer is used to store data. The medium layer is formed between the first memory layer and the second memory layer. The method comprises at least a step of measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance. A resistive memory array including an array of the above resistive memory units, word lines and bit lines is also described, wherein the word (bit) lines are coupled to the first (second) memory layers. | 01-31-2013 |
20130341583 | RESISTIVE MEMORY AND FABRICATING METHOD THEREOF - A resistive memory and a fabricating method thereof are provided. The resistive memory includes first and second electrodes, a variable resistance material layer, a first dielectric layer, and a second dielectric layer. The first electrode includes a first portion and a second portion. The second electrode is disposed opposite to the first electrode. The variable resistance material layer includes a sidewall and first and second surfaces opposite to each other, wherein the first surface is connected with the first portion of the first electrode and the second surface is electrically connected with the second electrode. The second portion surrounds the sidewall of the variable resistance material layer and is connected with the first portion. The first dielectric layer is disposed between the first and the second electrodes. The second dielectric layer is disposed between the variable resistance material layer and the second portion of the first electrode. | 12-26-2013 |
20130343115 | RESISTANCE MEMORY CELL AND OPERATION METHOD THEREOF - A resistance memory cell is provided and includes a first electrode, a tungsten metal layer, a metal oxide layer, and a second electrode. The tungsten metal layer is disposed on the first electrode. The metal oxide layer is disposed on the tungsten metal layer. The second electrode includes a first connection pad, a second connection pad, and a bridge portion electrically connected between the first connection pad and the second connection pad. The bridge portion is disposed on the metal oxide layer or surrounds the metal oxide layer. The resistance memory cell adjusts a resistivity of the metal oxide layer through a first current path, passing through the metal oxide layer and the tungsten metal layer, or a second current path extending from the first connection pad to the second connection pad. | 12-26-2013 |
Patent application number | Description | Published |
20120211611 | CLAMP STRUCTURE CAPABLE OF PREVENTING A PLANK THEREOF FROM BENDING - A clamp structure capable of preventing a plank thereof from bending is disclosed in the present invention. The clamp structure includes a clamping portion, two planks connecting to two edges of the clamping portion, at least one fixing component set passing through the planks for closing the two planks, a contacting portion disposed on one of the planks, and a stopping portion disposed on the other plank and located in a position adjacent to the contacting portion. The contacting portion contacts against the other plank when the planks is to be closed. The stopping portion stops a lateral surface of the contacting portion for preventing the contacting portion from bending relative to the planks when the contacting portion contacts against the other plank. | 08-23-2012 |
20120211624 | ADJUSTING MECHANISM FOR ADJUSTING ROTARY ANGLE AND ANTENNA SYSTEM THEREWITH - An adjusting mechanism for adjusting rotary angle is disclosed in the present invention. The adjusting mechanism includes a bracket. The bracket includes a base, a first supporting portion disposed on a first lateral side of the base, and a second supporting portion disposed on a second lateral side of the base. A pivot hole is formed on the first supporting portion. The adjusting mechanism further includes a clamp disposed by a side of the base and located in a position corresponding to the first and the second supporting portion. The adjusting mechanism further includes at least one bridging component connecting to a lateral surface of the clamp, and a pivoting component. A pivot hole is formed on the bridging component. The pivoting component passes through the pivot holes on the first supporting portion and the bridging component, so as to pivot the first supporting portion relative to the bridging component. | 08-23-2012 |
20120211627 | CLAMP STRUCTURE - A clamp structure is disclosed in the present invention. The clamp structure includes a clamping component for clamping a tube, and at least one bridging component disposed on a lateral surface of the clamping component. A pivoting portion is disposed on the bridging component, and the bridging component pivots with an antenna module via the pivoting portion, so that the antenna module can pivot relative to the clamping component along a radial plane of the clamping component. | 08-23-2012 |
20120211632 | SUPPORTING PEDESTAL AND RELATED ANTENNA SYSTEM - A supporting pedestal capable of adjusting an azimuth angle of an antenna system is disclosed in the present invention. The angle adjusting mechanism includes a main body and a tube. The main body includes a base, a first board and a second board. The first board and the second board are respectively disposed on two sides of the base. A first pivot hole and a first slot are formed on the first board. A second pivot hole is formed on the second board. The main body further includes a rib disposed on an edge of the base and connecting the first and second boards for preventing the first and second boards from bending relative to the base. The first and second pivot holes are respectively formed on the sides of the first and second boards adjacent to the rib. The tube pivots relative to the main body. | 08-23-2012 |
20120211634 | SUPPORTING PEDESTAL AND RELATED ANTENNA SYSTEM - A supporting pedestal capable of adjusting an azimuth angle of an antenna system is disclosed in the present invention. The angle adjusting mechanism includes a main body and a tube. The main body includes a base, a first board and a second board. The first board and the second board are respectively disposed on two sides of the base. A first pivot hole and a first slot are formed on the first board. A second pivot hole is formed on the second board. The main body further includes a strengthening rib disposed on an edge of the base and connecting the first and second boards for preventing the first and second boards from bending relative to the base. The first and second pivot holes are respectively formed on the sides of the first and second boards adjacent to the strengthening rib. The tube pivots relative to the main body. | 08-23-2012 |
20120212393 | SCREW MECHANISM FOR ADJUSTING AN ANGLE OF AN ANTENNA MODULE AND RELATED ANTENNA SYSTEM - A screw mechanism for adjusting an angle of an antenna module is disclosed in the present invention. The screw mechanism includes a screw rod. The screw rod includes a rod portion. A thread is formed on a first area of the rod portion. An annular protrusion is formed on a second area of the rod portion, and an outer diameter of the annular protrusion is greater than an outer diameter of the rod portion. The screw rod further includes a handle disposed on an end of the rod portion adjacent to the second area. The screw mechanism further includes an accommodating component whereon a sunken part is formed. The sunken part is for accommodating the annular protrusion of the screw rod. The screw mechanism further includes a screw having a side hole. The screw is installed on the first area of the screw rod and moves along the thread. | 08-23-2012 |
20130002518 | ADJUSTING MECHANISM AND RELATED ANTENNA SYSTEM - An adjusting mechanism of adjusting an angle of an antenna module is disclosed in the present invention. The adjusting mechanism includes a base, a supporter pivotally connected to the base for supporting the antenna module, a connecting component pivoting to the supporter, and a jointing component disposed on the base and slidably inserting into a slot on the connecting component. The connecting component is for pivoting to the supporter and sliding relative to the jointing component along a direction of the slot simultaneously, so as to adjust an angle between the supporter and the base. | 01-03-2013 |
20140306072 | ADJUSTING MECHANISM AND RELATED ANTENNA SYSTEM - An adjusting mechanism includes a base, a supporter, a connecting component and a jointing component. A slide slot is formed on the base. The supporter is pivotally connected to the base via a shaft. The connecting component is rotatably and slidably disposed on the slide slot on the base. A curved slot is formed on the connecting component. The jointing component is disposed on the supporter and slidably inserts to the curved slot on the connecting component. The connecting component slides relative to the supporter via the jointing component along a direction of the curved slot to simultaneously rotate the supporter relative to the base. | 10-16-2014 |
Patent application number | Description | Published |
20080237144 | METHOD FOR REMOVING MICRO-BUBBLES AND/OR PARTICLES FROM LIQUID, LIQUID SUPPLY APPARATUS AND IMMERSION EXPOSURE APPARATUS - A liquid supply apparatus capable of removing micro-bubbles and particles is described, including a pipe, a laser provider and at least one micro-bubble/particle outlet. The laser provider provides a laser crossing the pipe, wherein the laser is provided in a manner such that a micro-bubble/particle blocking/repelling barrier is formed crossing the pipe blocking or repelling micro-bubbles, particles or both in the liquid in the pipe. The micro-bubble/particle outlet is disposed on the pipe between the barrier and the liquid inlet of the pipe, adjacent to the barrier for discharging micro-bubbles, particles or both. | 10-02-2008 |
20110186750 | METHOD FOR REMOVING MICRO-BUBBLES AND/OR PARTICLES FROM LIQUID, LIQUID SUPPLY APPARATUS AND IMMERSION EXPOSURE APPARATUS - A liquid supply apparatus capable of removing micro-bubbles and particles is described, including a pipe, a laser provider and at least one micro-bubble/particle outlet. The laser provider provides a laser crossing the pipe, wherein the laser is provided in a manner such that a micro-bubble/particle blocking/repelling barrier is formed crossing the pipe blocking or repelling micro-bubbles, particles or both in the liquid in the pipe. The micro-bubble/particle outlet is disposed on the pipe between the barrier and the liquid inlet of the pipe, adjacent to the barrier for discharging micro-bubbles, particles or both. | 08-04-2011 |
20110186751 | METHOD FOR REMOVING MICRO-BUBBLES AND/OR PARTICLES FROM LIQUID, LIQUID SUPPLY APPARATUS AND IMMERSION EXPOSURE APPARATUS - A liquid supply apparatus capable of removing micro-bubbles and particles is described, including a pipe, a laser provider and at least one micro-bubble/particle outlet. The laser provider provides a laser crossing the pipe, wherein the laser is provided in a manner such that a micro-bubble/particle blocking/repelling barrier is formed crossing the pipe blocking or repelling micro-bubbles, particles or both in the liquid in the pipe. The micro-bubble/particle outlet is disposed on the pipe between the barrier and the liquid inlet of the pipe, adjacent to the barrier for discharging micro-bubbles, particles or both. | 08-04-2011 |