| Patent application number | Description | Published |
|---|
| 20080224232 | SILICIDATION PROCESS FOR MOS TRANSISTOR AND TRANSISTOR STRUCTURE - A silicidation process for a MOS transistor and a resulting transistor structure are described. The MOS transistor includes a silicon substrate, a gate dielectric layer, a silicon gate, a cap layer on the silicon gate, a spacer on the sidewalls of the silicon gate and the cap layer, and S/D regions in the substrate beside the silicon gate. The process includes forming a metal silicide layer on the S/D regions, utilizing plasma of a reactive gas to react a surface layer of the metal silicide layer into a passivation layer, removing the cap layer and then reacting the silicon gate into a fully silicided gate. | 09-18-2008 |
| 20080237658 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating a semiconductor device is provided. A MOS transistor is formed on a substrate, and then a contact etching stop layer (CESL) is formed over the substrate. A first UV-curing process is performed to increase the stress of the CESL. A dielectric layer is formed on the CESL, and then a second UV-curing process is performed to increase the stress of the dielectric layer. A CMP process is conducted, and then a cap layer is formed on the dielectric layer. | 10-02-2008 |
| 20080237662 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating a semiconductor device is provided. A MOS transistor is formed on a substrate, and then a contact etching stop layer (CESL) is formed over the substrate. A first UV-curing process is performed to increase the stress of the CESL. A dielectric layer is formed on the CESL, and then a second UV-curing process is performed to increase the stress of the dielectric layer. A CMP process is conducted, and then a cap layer is formed on the dielectric layer. | 10-02-2008 |
| 20080261402 | METHOD OF REMOVING INSULATING LAYER ON SUBSTRATE - A method of removing an insulating layer on a substrate is described, including a first CMP process and a second CMP process performed in sequence, wherein the polishing slurry used in the first CMP process and that used in the second CMP process have substantially the same pH value that exceeds 7.0. A cleaning step is conducted between the first and the second CMP processes to remove a specific substance which would otherwise cause undesired particles to form in the second CMP process. | 10-23-2008 |
| 20090061201 | ULTRA LOW DIELECTRIC CONSTANT (K) DIELECTRIC LAYER AND METHOD OF FABRICATING THE SAME - A fabrication method of an ultra low-k dielectric layer is provided. A deposition process is performed, under the control of a temperature varying program or a pressure varying program, by reacting a dielectric matrix to form porous low-k dielectric layers with a gradient density on a barrier layer over a substrate. | 03-05-2009 |
| 20090061623 | METHOD OF FORMING ELECTRICAL CONNECTION STRUCTURE - A method of forming an electrical connection structure is described. A dielectric layer is formed covering a first conductor on a substrate, and then an opening is formed in the dielectric layer exposing the first conductor. A first cleaning step is conducted using fluorine-containing plasma to clean the surfaces of the dielectric layer and the exposed first conductor, and then at least one low-temperature annealing step is conducted. A second cleaning step is conducted using argon plasma to clean the above surfaces. A second conductor is then formed in the opening. | 03-05-2009 |
| 20090068854 | SILICON NITRIDE GAP-FILLING LAYER AND METHOD OF FABRICATING THE SAME - A method for fabricating a silicon nitride gap-filling layer is provided. A pre-multi-step formation process is performed to form a stacked layer constituting as a dense film on a substrate. Then, a post-single step deposition process is conducted to form a cap layer constituting as a sparse film on the stacked layer, wherein the cap layer has a thickness of at least 10% of the total film thickness. | 03-12-2009 |
| 20090298294 | METHOD FOR CLEARING NATIVE OXIDE - A method for clearing native oxide is described. A substrate is provided, including an exposed portion whereon a native oxide layer has been formed. A clearing process is performed to the substrate using nitrogen trifluoride (NF | 12-03-2009 |
