| Patent application number | Description | Published |
| 20090046783 | Method and Related Device for Decoding Video Streams - A method for decoding a picture of a video stream includes decoding the video stream by a video decoder for generating a plurality of macroblocks corresponding to the picture, macroblock information corresponding to the plurality of macroblocks, and picture information corresponding to the picture; storing the macroblock information and the picture information into a memory buffer; and determining whether the picture is needed to be performed a de-blocking process by the video decoder according to the macroblock information and the picture information stored in the memory buffer. | 02-19-2009 |
| 20090060361 | METHOD FOR PROCESSING A MACRO BLOCK OF IMAGE DATA - The image data are coded with field DCT or frame DCT depending on the characteristics of the image data. However different coding types will result in different boundary marks of boundaries between adjacent blocks or adjacent macro blocks. Therefore the de-blocking of a boundary between two adjacent blocks or adjacent macro blocks should be performed according to the format of image data and the coding type of the adjacent blocks or adjacent macro blocks. | 03-05-2009 |
| 20090080517 | Method and Related Device for Reducing Blocking Artifacts in Video Streams - A method for reducing blocking artifacts in a video stream comprises receiving a picture of the video stream, wherein the picture includes a plurality of macroblocks and each of the plurality of macroblock includes four blocks, determining blocks with quantization parameters greater than a first threshold value in the picture, checking if block boundaries of the blocks are sharp and are real edges of objects in the picture according to pixel value differences between two adjacent pixels respectively located at both sides of the block boundaries, selecting filtering strengths of a de-blocking operation according to the pixel value differences when the block boundaries are sharp and are not real edges of the objects in the picture, and performing the de-blocking operation for two adjacent blocks at both sides of the block boundaries. | 03-26-2009 |
| 20100015534 | METHOD FOR MONITORING PHOTOLITHOGRAPHY PROCESS AND MONITOR MARK - A method for monitoring a photolithography process includes providing a monitor mark having high sensitivity of the focus of the photolithography process, transferring the monitor mark together with the product patterns through the photolithography process onto a substrate, and measuring the deviation dimension of the monitor mark formed on the substrate to real-time monitor the focus of the photolithography process. | 01-21-2010 |
| 20100149535 | METHOD OF MEASURING NUMERICAL APERTURE OF EXPOSURE MACHINE, CONTROL WAFER, PHOTOMASK, AND METHOD OF MONITORING NUMERICAL APERTURE OF EXPOSURE MACHINE - A method of measuring a numerical aperture of an exposure machine is described. A control wafer having vernier marks thereon and an aberration mask having pinholes therein are provided, wherein each pinhole corresponds to a vernier mark in position. A lithography process using the exposure machine and the aberration mask is performed to the control wafer, so as to form over each vernier mark a photoresist pattern having the same shape of the illumination pattern of the light source of the exposure machine. The numerical aperture of the exposure machine is then derived from a graduation of the vernier mark corresponding to an outer edge of the photoresist pattern. | 06-17-2010 |
| Patent application number | Description | Published |
| 20080305579 | Method for fabricating semiconductor device installed with passive components - A method for fabricating a semiconductor device installed with passive components is provided. The method includes: having at least a passive component make a bridge connection between a ground circuit and a power circuit of each of a plurality of substrate units; electrically connecting a conductive circuit on a cutting path between substrate units to the ground circuit and the power circuit, and forming a short circuit loop; or electrically connecting the conductive circuit on the cutting path between the substrate units to the power circuit and the ground circuit via bonding wires, and forming a short circuit loop; or applying a wire bonding machine to form a stud bump on the power circuit, and then forming a short circuit loop via the power circuit and ground loop of the wire bonding machine; therefore, via the short circuit loop, the passive component is capable of releasing electricity filled therein from previous plasma clean process of substrate units and chips; and grounding the chips and the substrate units and electrically connecting powers and signals to prevent the chips from being damaged due to sudden current impulses resulting from the discharging of the passive components when the passive components are electrically connected to the chips. | 12-11-2008 |
| 20090008760 | SEMICONDUCTOR DEVICE HAS ENCAPSULANT WITH CHAMFER SUCH THAT PORTION OF SUBSTRATE AND CHAMFER ARE EXPOSED FROM ENCAPSULANT AND REMAINING PORTION OF SURFACE OF SUBSTRATE IS COVERED BY ENCAPSULANT - A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to encapsulate the chip and the passive component, wherein the cutaway corner of the encapsulant is spaced apart from the slanted side of the opening by a predetermined distance. A singulation process is performed to cut the encapsulant to form a package with a chamfer. The package is embedded in a lid to form the semiconductor device, wherein a portion of the substrate located between the slanted side of the opening and the cutaway corner of the encapsulant is exposed from the encapsulant to form an exposed portion. The present invention also provides a carrier for the semiconductor device. | 01-08-2009 |
| 20090202295 | Quick releasing device of actuator - A quick releasing device of an actuator comprises a quick releasing mechanism deposited on a transmission apparatus and a releasing spring for transmitting a power from the transmission apparatus to a load connector to drive the load connector to linearly move when it is normally constricted or releasing the transmission apparatus to retract the load connector when it is loosened, wherein the releasing spring has a node portion for being pulled to loosen the releasing spring, and a releasing handle settled aside the quick releasing mechanism having a operation portion and a driving portion, wherein, when pulled, the operation portion drives the driving portion to swing toward the node portion so as to pull the node portion and thereby loosen the releasing spring. | 08-13-2009 |
| 20110129966 | SEMICONDUCTOR DEVICE HAS ENCAPSULANT WITH CHAMFER SUCH THAT PORTION OF SUBSTRATE AND CHAMFER ARE EXPOSED FROM ENCAPSULANT AND REMAINING PORTION OF SURFACE OF SUBSTRATE IS COVERED BY ENCAPSULANT - A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to encapsulate the chip and the passive component, wherein the cutaway corner of the encapsulant is spaced apart from the slanted side of the opening by a predetermined distance. A singulation process is performed to cut the encapsulant to form a package with a chamfer. The package is embedded in a lid to form the semiconductor device, wherein a portion of the substrate located between the slanted side of the opening and the cutaway corner of the encapsulant is exposed from the encapsulant to form an exposed portion. The present invention also provides a carrier for the semiconductor device. | 06-02-2011 |
| Patent application number | Description | Published |
| 20110120540 | QUANTUM DOT DYE-SENSITIZED SOLAR CELL - A quantum dot dye-sensitized solar cell (QDDSSC) including an anode, a cathode, and an electrolyte between the anode and the cathode is provided. The anode includes a semiconductor electrode layer adsorbed with a dye, a plurality of quantum dots distributed within the semiconductor electrode layer, and a plurality of metal nanoparticles distributed within the semiconductor electrode layer. Because the absorption spectra of the quantum dots, the dye, and the semiconductor electrode layer cover the infrared (IR), visible, and ultraviolet (UV) regions of the solar spectrum, IR to UV light in the solar spectrum can be effectively absorbed, and accordingly the conversion efficiency of the solar cell can be improved. Moreover, the metal nanoparticles can increase the light utilization efficiency. | 05-26-2011 |
| 20110195186 | PLANE-TYPE FILM CONTINUOUS EVAPORATION SOURCE AND THE MANUFACTURING METHOD AND SYSTEM USING THE SAME - A manufacturing method and system using a plane-type film continuous evaporation source are disclosed, in which the manufacturing method comprises the steps of: providing a plane-type film continuous evaporation source, being a substrate having at least one evaporation material coated on a surface thereof while distributing the at least one evaporation material in a specific area of the substrate capable of covering all the plates to be processed by the evaporated evaporation material; arranging a heater inside the specific area to be used for enabling the at least one evaporation material to evaporate and thus spreading toward the processed plates. Thereby, the evaporated evaporation material can be controlled at the molecular/atomic level for enabling the same to form a film according to surface-nucleation, condensation and growth with superior evenness, nano-scale adjustability, specialized structure and function that can not be achieve by the films from conventional spray coating means. | 08-11-2011 |