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Chia-Wei Wang

Chia-Wei Wang, Milpitas, CA US

Patent application numberDescriptionPublished
20100323956GLUCOSE-REGULATING POLYPEPTIDES AND METHODS OF MAKING AND USING SAME - The present invention relates to compositions comprising glucose regulating peptides linked to extended recombinant polypeptide (XTEN), isolated nucleic acids encoding the compositions and vectors and host cells containing the same, and methods of making and using such compositions in treatment of glucose regulating peptide-related diseases, disorders, and conditions.12-23-2010
20110046060Coagulation factor IX compositions and methods of making and using same - The present invention relates to compositions comprising factor IX coagulation factors linked to extended recombinant polypeptide (XTEN), isolated nucleic acids encoding the compositions and vectors and host cells containing the same, and methods of making and using such compositions in treatment of coagulation factor-related diseases, disorders, and conditions.02-24-2011
20110046061Coagulation factor VII compositions and methods of making and using same - The present invention relates to compositions comprising factor VII coagulation factors linked to extended recombinant polypeptide (XTEN), isolated nucleic acids encoding the compositions and vectors and host cells containing the same, and methods of making and using such compositions in treatment of coagulation factor-related diseases, disorders, and conditions.02-24-2011
20110077199GROWTH HORMONE POLYPEPTIDES AND METHODS OF MAKING AND USING SAME - The present invention relates to compositions comprising growth hormone linked to extended recombinant polypeptide (XTEN), isolated nucleic acids encoding the compositions and vectors and host cells containing the same, and methods of making and using such compositions in treatment of growth hormone-related diseases, disorders, and conditions.03-31-2011

Chia-Wei Wang, Fongyuan City TW

Patent application numberDescriptionPublished
20100284232Memory Circuit and Tracking Circuit Thereof - The invention provides a tracking circuit of a memory circuit. The tracking circuit is coupled between a control circuit and a sense amplifier, delays a word-line pulse signal generated by the control circuit by a delay period to generate a sense amplifier enable signal enabling the sense amplifier to detect data bits output by a memory cell array. In one embodiment, the tracking circuit comprises a plurality of dummy cells and a dummy bit line. At least one of the plurality of dummy cells comprises a plurality of cascaded transistors cascaded between the dummy bit line and a ground voltage for lowering down a dummy bit line signal on the dummy bit line when the word-line pulse signal is enabled. The dummy bit line is coupled to the dummy cells and carries the dummy bit line signal.11-11-2010
20110019463Static Random Access Memories and Access Methods Thereof - A static random access memory device capable of preventing stability issues during a write operation is provided, in which a memory cell is coupled to a read word line, a write word line, a read bit line, a write bit line and a complementary write bit line, and a multiplexing unit is coupled to the read bit line, the write bit line and the complementary write bit line. The multiplexing unit applies first and second logic voltages representing a logic state stored in the memory cell to the write bit line and the complementary write bit line, respectively, when the memory cell is not selected to be written by an input signal from a data driver and the read word line is activated, in which the first and second logic voltages are opposite to each other.01-27-2011

Chia-Wei Wang, Taichung County TW

Patent application numberDescriptionPublished
20100091585STATIC RANDOM ACCESS MEMORIES AND ACCESS METHODS THEREOF - A static random access memory device capable of preventing stability issues during a write operation is provided, in which a memory cell is coupled to a read word line, a write word line, a read bit line, a write bit line and a complementary write bit line, and a multiplexing unit is coupled to the read bit line, the write bit line and the complementary write bit line. The multiplexing unit applies first and second logic voltages representing a logic state stored in the memory cell to the write bit line and the complementary write bit line, respectively, when the memory cell is not selected to be written by an input signal from a data driver and the read word line is activated, in which the first and second logic voltages are opposite to each other.04-15-2010
20100118628MEMORY CIRCUIT AND TRACKING CIRCUIT THEREOF - The invention provides a tracking circuit of a memory circuit. The tracking circuit is coupled between a control circuit and a sense amplifier, delays a word-line pulse signal generated by the control circuit by a delay period to generate a sense amplifier enable signal enabling the sense amplifier to detect data bits output by a memory cell array. In one embodiment, the tracking circuit comprises a plurality of dummy cells, a dummy bit line, and an inverter. At least one of the plurality of dummy cells comprises a plurality of cascaded transistors cascaded between the dummy bit line and a ground voltage for pulling down the voltage of the dummy bit line when the word-line pulse signal is enabled. The dummy bit line is coupled between the dummy cells and the inverter. The inverter inverts the voltage of the dummy bit line to generate the sense amplifier enable signal.05-13-2010
20100302880DUAL POWER RAIL WORD LINE DRIVER AND DUAL POWER RAIL WORD LINE DRIVER ARRAY - A dual power rail word line driver for driving a word line of a memory array according to a predecode signal from a decoder powered by a first supply voltage is provided. A signal buffering unit is coupled between the word line and a node. A pull-down unit is coupled between the node and a ground. A pull-up unit is coupled between the node and a second supply voltage higher than or equal to the first supply voltage. The signal buffering unit provides a word line signal corresponding to the predecode signal to the memory array via the word line when the pull-down unit is turned on by the predecode signal and a first pulse signal and the pull-up unit is turned off by a second pulse signal. There is no level shifter on a critical timing path of the dual power rail word line driver.12-02-2010

Chia-Wei Wang, Santa Clara, CA US

Patent application numberDescriptionPublished
20080286808Methods for production of unstructured recombinant polymers and uses thereof - The present invention provides unstructured recombinant polymers (URPs) and proteins containing one or more of the URPs. The present invention also provides microproteins, toxins and other related proteinaceous entities, as well as genetic packages displaying these entities. The present invention also provides recombinant polypeptides including vectors encoding the subject proteinaceous entities, as well as host cells comprising the vectors. The subject compositions have a variety of utilities including a range of pharmaceutical applications.11-20-2008
20090092582Compositions and methods for modifying properties of biologically active polypeptides - The present invention relates to biologically active polypeptides linked to one or more accessory polypeptides. The present invention also provides recombinant polypeptides including vectors encoding the subject proteinaceous entities, as well as host cells comprising the vectors. The subject compositions have a variety of utilities including a range of pharmaceutical applications.04-09-2009
20090099031Genetic package and uses thereof - The present invention provides unstructured recombinant polymers (URPs) and proteins containing one or more of the URPs. The present invention also provides microproteins, toxins and other related proteinaceous entities, as well as genetic packages displaying these entities. The present invention also provides recombinant polypeptides including vectors encoding the subject proteinaceous entities, as well as host cells comprising the vectors. The subject compositions have a variety of utilities including a range of pharmaceutical applications.04-16-2009
20100189682Biologically active proteins having increased In Vivo and/or In Vitro stability - The present invention provides unstructured recombinant polymers (URPs) and proteins containing one or more of the URPs. The present invention also provides microproteins, toxins and other related proteinaceous entities, as well as genetic packages displaying these entities. The present invention also provides recombinant polypeptides including vectors encoding the subject proteinaceous entities, as well as host cells comprising the vectors. The subject compositions have a variety of utilities including a range of pharmaceutical applications.07-29-2010
20100260706COMPOSITIONS AND METHODS FOR IMPROVING PRODUCTION OF RECOMBINANT POLYPEPTIDES - The present invention relates to biologically active polypeptides linked to one or more accessory polypeptides. The present invention also provides recombinant polypeptides including vectors encoding the subject proteinaceous entities, as well as host cells comprising the vectors. The subject compositions have a variety of utilities including a range of pharmaceutical applications.10-14-2010
20110151433METHODS FOR PRODUCTION OF UNSTRUCTURED RECOMBINANT POLYMERS AND USES THEREOF - The present invention provides unstructured recombinant polymers (URPs) and proteins containing one or more of the URPs. The present invention also provides microproteins, toxins and other related proteinaceous entities, as well as genetic packages displaying these entities. The present invention also provides recombinant polypeptides including vectors encoding the subject proteinaceous entities, as well as host cells comprising the vectors. The subject compositions have a variety of utilities including a range of pharmaceutical applications.06-23-2011

Patent applications by Chia-Wei Wang, Santa Clara, CA US

Chia-Wei Wang, Taipei City TW

Patent application numberDescriptionPublished
20080211318SWITCH CIRCUIT - A switch circuit including a control unit and a voltage level adjusting circuit is provided. The control unit has a first end, a second end, and a third end. The first end of the control unit receives a first voltage, and the voltage difference between the first end and the third end is steady. In addition, the voltage level adjusting circuit has a switch which is determined whether or not turning on according to the voltage on the second end of the control unit, so as to determine whether driving a load or not. The voltage level adjusting circuit is used for adjusting a bias of the load on driving. The switch has a source. The voltage on the source is varied following the ON/OFF of the switch, and the voltage on the third end of the control unit is varied following the voltage on the source.09-04-2008
20100225622DRIVING APPARATUS - A driving apparatus for driving a plurality of loads is provided. The driving apparatus includes a control unit, a driving unit, a current adjusting unit, and a detecting unit. The control unit outputs a control signal. The driving unit generates a driving signal according to the control unit to drive loads. The current adjusting unit is coupled to the loads to adjust the current passing through the same. The detecting unit is coupled to the current adjusting unit to detect a state of the current adjusting unit to generate a detecting signal. Here, the control unit adjusts the control signal according to the detecting signal.09-09-2010

Chia-Wei Wang, Taipei TW

Patent application numberDescriptionPublished
20100040821Molding glass lens and mold thereof - A molding glass lens and a mold thereof are disclosed. The molding glass lens consists of an upper optical surface, a lower optical surface, two outers surrounding the optical surfaces and at least three grooves arranged in the form of a circle disposed on the lower outer and/or the upper outer. The disposition of the grooves has no affecting in original size of the outers as well as assembling with other mechanical parts in les group. The mold of the lens includes an upper molding unit and a lower molding unit. Cavity of each molding unit is composed of a central part for forming an optical surface of the lens and an outer circular part for forming outer of the lens. At least three protrudent parts with the same height are disposed in the form of a circle on the outer circular of the lower molding unit and/or the upper molding unit. Thus the air in the mold cavity is easy to exhaust through the gap formed by protrudent parts and glass preform. Therefore, air bubbles generated during the molding processes are prevented and precision of the glass lens is provided.02-18-2010

Chia-Wei Wang, Ann Arbor, MI US

Patent application numberDescriptionPublished
20090325063METHOD FOR HIGH VOLUME MANUFACTURE OF ELECTROCHEMICAL CELLS USING PHYSICAL VAPOR DEPOSITION - Embodiments of the present invention relate to apparatuses and methods for fabricating electrochemical cells. One embodiment of the present invention comprises a single chamber configurable to deposit different materials on a substrate spooled between two reels. In one embodiment, the substrate is moved in the same direction around the reels, with conditions within the chamber periodically changed to result in the continuous build-up of deposited material over time. Another embodiment employs alternating a direction of movement of the substrate around the reels, with conditions in the chamber differing with each change in direction to result in the sequential build-up of deposited material over time. The chamber is equipped with different sources of energy and materials to allow the deposition of the different layers of the electrochemical cell.12-31-2009
20090326696 COMPUTATIONAL METHOD FOR DESIGN AND MANUFACTURE OF ELECTROCHEMICAL SYSTEMS - A method for manufacturing an electrochemical cell. The method includes generating spatial information including an anode geometry, a cathode geometry, a separator geometry, and one or more current collector geometries. The method also includes storing the spatial information including the anode geometry, the cathode geometry, the separator geometry, and the one or more current collector geometries into a database structure. In a specific embodiment, the method includes selecting one or more material properties from a plurality of materials and using the one or more material properties with the spatial information in a simulation program. The method includes outputting one or more performance parameters from the simulation program.12-31-2009
20100035152ELECTROCHEMICAL CELL INCLUDING FUNCTIONALLY GRADED AND ARCHITECTURED COMPONENTS AND METHODS - Electrochemical cells or batteries featuring functional gradations, and having desirable, periodic configurations, and methods for making the same. One or more methods, in alone or in combination, are utilized to fabricate components of such electrochemical cells or batteries, which are designed to achieve certain thermal, mechanical, kinetic and spatial characteristics, and their effects, singly and in all possible combinations, on battery performance. The thermal characteristics relate to temperature distribution during charge and discharge processes. The kinetic characteristics relate to rate performance of the cells or batteries such as the ionic diffusion process and electron conduction. The mechanical characteristics relate to lifetime and efficiency of the cells or batteries such as the strength and moduli of the component materials. Finally, the spatial characteristics relate to the energy and power densities, stress and temperature mitigation mechanisms, and diffusion and conduction enhancements. The electrochemical cells or batteries constructed according to the methods presented in this invention are useful for all applications that require high rate performance, high energy/power density, good durability, high safety and long lifetime.02-11-2010

Chia-Wei Wang, Hsin-Chu TW

Patent application numberDescriptionPublished
20080258813Sense Amplifiers Operated Under Hamming Distance Methodology - A semiconductor device includes a first sense amplifier coupled to an input for generating a first output; a second sense amplifier couple to the input for generating a second output; and a third sense amplifier coupled to the input for generating a third output, wherein a fourth output amplifying the input is generated based on combinations of logic states of the first, second and third outputs.10-23-2008