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Chia-Ming
Chia-Ming Chan, Miao-Li TW
| Patent application number | Description | Published |
|---|---|---|
| 20080212015 | Method for manufacturing liquid crystal display panel - An exemplary method for manufacturing a liquid crystal display (LCD) panel ( | 09-04-2008 |
| 20080252838 | Liquid crystal panel having patterned sealant and fabricating method thereof - An exemplary liquid crystal panel ( | 10-16-2008 |
Chia-Ming Chen, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080297707 | LIQUID CRYSTAL DISPLAY PANEL, ELECTRONIC APPARATUS, AND MANUFACTURING METHOD THEREOF - A method of manufacturing a liquid crystal display panel is provided. A photo-alignment layer and a patterned pixel electrode are formed on a first and a second substrates respectively. A liquid crystal layer is formed between the photo-alignment layer and the patterned pixel electrode. The patterned pixel electrode includes intersected electrodes having a first directional portion and a second directional portion intersected therewith, and stripe electrodes having slits therebetween connect at least one of the first directional portion and the second directional portion. When an electric field between the first and the second substrates is substantially zero, the liquid crystal molecules near the photo-alignment layer have a pre-tilt angle while those on another side are substantially perpendicular to the second substrate. As the liquid crystal layer is driven, the liquid crystal molecules of the liquid crystal layer are substantially arranged along an extending direction of the slits. | 12-04-2008 |
| 20080297708 | LIQUID CRYSTAL DISPLAY PANEL, ELECTRONIC APPARATUS, AND MANUFACTURING METHOD THEREOF - A method for manufacturing a liquid crystal display panel is provided. A photo-alignment layer is formed on a first substrate. Patterned pixel electrodes including intersected electrodes and stripe electrodes are formed on a second substrate. A liquid crystal layer is formed between the photo-alignment layer and the patterned pixel electrodes. Each intersected electrode has a first directional portion and a second directional portion interlacing thereto. The stripe electrodes with silts connect the first and/or the second directional portions. When an electric field between the first and the second substrates is substantially zero, liquid crystal molecules near the photo-alignment layer are arranged at a pre-tilt angle, while those disposed at another side near the second substrate are substantially perpendicular to the second substrate. As the liquid crystal layer is driven, the liquid crystal molecules of the liquid crystal layer are substantially arranged along an extending direction of the slits. | 12-04-2008 |
Chia-Ming Chen, Wugu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110299705 | AUDIO SIGNAL ADJUSTING SYSTEM AND METHOD - An audio signal adjusting method is disclosed, which comprises steps of: determining an environment noise level; calculating a ratio between an environment noise level and an output audio signal level to form a measuring value; comparing the measuring value with a predetermined threshold as an audio comfort value; and determining whether or not to adjust an audio signal parameter according to the comparison result. If the comparison result is incorrect, then the audio signal parameter is adjusted, and the output audio signal should be outputted according to the adjusted audio signal parameter. The audio signal adjusting method can satisfy the different user needs on different environment types. | 12-08-2011 |
Chia-Ming Chen, Taipei County TW
| Patent application number | Description | Published |
|---|---|---|
| 20080218175 | Open-Circuit Testing System and Method - The invention discloses a testing system and method suitable for determining the connection state of an electronic component in an electronic device assembly. In an embodiment, the testing system comprises a signal sensing unit configured to provide a sensed signal induced by capacitive coupling in response to the output of a testing signal passing through a tested pin, a signal processor unit configured to filter and over-sample the sensed signal to obtain a digital signal, and an analyzer unit configured to compute the digital signal for determining a connection state of the test pin. | 09-11-2008 |
| 20090089635 | Electronic Device Testing System and Method - The invention provides a testing system and method suitable for determining whether a pin-out of an electrical component is properly connected to a PCB. The testing system includes a testing signal source, a signal detector, a signal processor, an analysis unit and an integrated circuit having boundary-scan test function to provide testing signals to the device under test (DUT) whose signal traces are passing through inner layer of PCB in order to detect whether the sensed signal is an error signal. | 04-02-2009 |
Chia-Ming Cheng, Shulin City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120113587 | DUAL CPU AND HEAT DISSIPATING STRUCTURE THEREOF - A dual CPU and its heat dissipating structure are applied to a heat dissipating module installed on a dual-CPU computer device, and CPUs are arranged alternately with each other on a motherboard, and the heat dissipating modules are installed at positions of the CPUs, such that the alternately arranged heat dissipating modules can prevent interferences by external cold air, and a heat source produced by the CPUs can be conducted and dissipated to the outside to prevent the heat source form remaining at the surrounding of the CPUs and related components installed on the motherboard to achieve an excellent heat dissipating efficiency. | 05-10-2012 |
Chia-Ming Cheng, New Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110227210 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package, which includes: a substrate having an upper surface and a lower surface; a passivation layer located overlying the upper surface of the substrate; a plurality of conducting pad structures disposed overlying the upper surface of the substrate, wherein at least portions of upper surfaces of the conducting pad structures are exposed; a plurality of openings extending from the upper surface towards the lower surface of the substrate; and a plurality of movable bulks located between the openings and connected with the substrate, respectively, wherein each of the movable bulks is electrically connected to one of the conducting pad structures. | 09-22-2011 |
Chia-Ming Cheng, Xinzhuang City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100289092 | POWER MOSFET PACKAGE - A power MOSFET package includes a semiconductor substrate having opposite first and second surfaces, having a first conductivity type, and forming a drain region, a doped region extending downward from the first surface and having a second conductivity type, a source region in the doped region and having the first conductivity type, a gate overlying or buried under the first surface, wherein a gate dielectric layer is between the gate and the semiconductor substrate, a first conducting structure overlying the semiconductor substrate, having a first terminal, and electrically connecting the drain region, a second conducting structure overlying the semiconductor substrate, having a second terminal, and electrically connecting the source region, a third conducting structure overlying the semiconductor substrate, having a third terminal, and electrically connecting the gate, wherein the first, the second, and the third terminals are substantially coplanar, and a protection layer between the semiconductor substrate and the terminals. | 11-18-2010 |
| 20110079892 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A chip package includes a substrate having a pad region, a device region, and a remained scribe region located at a periphery of the substrate; a signal and an EMI ground pads disposed on the pad region; a first and a second openings penetrating into the substrate to expose the signal and the EMI ground pads, respectively; a first and a second conducting layers located in the first and the second openings and electrically connecting the signal and the EMI ground pads, respectively, wherein the first conducting layer and the signal pad are separated from a periphery of the remained scribe region, and wherein a portion of the second conducting layer and/or the EMI ground pad extend(s) to a periphery of the remained scribe region; and a third conducting layer surrounding the periphery of the remained scribe region to electrically connect the second conducting layer and/or the EMI ground pad. | 04-07-2011 |
| 20110127666 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - An embodiment of the present invention relates to a chip package and fabrication method thereof, which includes a chip protection layer or an additional etching stop layer to cover conducting pads to prevent dicing residue from damaging or scratching the conducting pads. According to another embodiment, a chip protection layer, an additional etching stop layer formed thereon, or a metal etching stop layer level with conducting pads or combinations thereof may be used when etching an intermetal dielectric layer at a structural etching region and a silicon substrate to form an opening for subsequent semiconductor manufacturing processes. | 06-02-2011 |
| 20110127681 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - A chip package and a fabrication method thereof are provided according to an embodiment of the invention. The chip package includes a semiconductor substrate containing a chip and having a device area and a peripheral bonding pad area. A plurality of conductive pads is disposed at the peripheral bonding pad area and a passivation layer is formed over the semiconductor substrate to expose the conductive pads. An insulating protective layer is formed on the passivation layer at the device area. A packaging layer is disposed over the insulating protective layer to expose the conductive pads and the passivation layer at the peripheral bonding pad area. The method includes forming an insulating protective layer to cover a plurality of conductive pads during a cutting process and removing the insulating protective layer on the conductive pads through an opening of a packaging layer. | 06-02-2011 |
| 20110248310 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes a substrate having an upper surface and a lower surface and having at least a side surface, and at least a trench extending from the upper surface towards the lower surface and extending from the side surface towards an inner portion of the substrate, wherein a width of the trench near the upper surface is not equal to a width of the trench near the lower surface, and at least an insulating layer located on a sidewall of the trench, and at least a conducting pattern located on the insulating layer, wherein the side surface is separated from the conducting pattern in the trench by a predetermined distance such that a portion of the insulating layer is exposed, and at least a conducting region electrically connected to the conducting pattern. | 10-13-2011 |
Chia-Ming Chiang, Bade City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120092308 | DISPLAY PANEL - A display panel comprises a display area having a plurality of pixel units for displaying images; a driving circuit for driving the pixel units and being arranged outside the display area; a plurality of signal lines having unequal resistances, and being electrically connected between the display area and the driving circuit for transmitting signals; and a plurality of layer jumpers for compensating the resistances of the signal lines and being disposed on the signal lines so that each of the signal lines having a compensated resistance, wherein the layer jumpers are utilized for making the compensated resistances of the respective signal lines to match each other. The display panel is capable of improving image display quality and providing a higher efficiency of resistance compensation for a unit of layout space. | 04-19-2012 |
Chia-Ming Ho, Banciao City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090007035 | Accurate Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits - A system and method for extracting the parasitic contact/via capacitance in an integrated circuit are provided. Parasitic extraction using this system can lead to an improved accuracy on contact/via parasitic capacitance extraction by taking into account of the actual contact/via shape and size variation. The common feature of the various embodiments includes the step of generating a technology file, in which the contact/via capacitance in the capacitance table is derived from an effective contact/via width table. Each element of the effective contact/via width table is calibrated to have a parasitic capacitance matching to that of an actual contact/via configuration occurring in an IC. | 01-01-2009 |
| 20110023003 | Accurate Parasitic Capacitance Extraction for Ultra Large Scale Integrated Circuits - A system and method for extracting the parasitic contact/via capacitance in an integrated circuit are provided. Parasitic extraction using this system can lead to an improved accuracy on contact/via parasitic capacitance extraction by taking into account of the actual contact/via shape and size variation. The common feature of the various embodiments includes the step of generating a technology file, in which the contact/via capacitance in the capacitance table is derived from an effective contact/via width table. Each element of the effective contact/via width table is calibrated to have a parasitic capacitance matching to that of an actual contact/via configuration occurring in an IC. | 01-27-2011 |
Chia-Ming Hsieh, Miao-Li County TW
| Patent application number | Description | Published |
|---|---|---|
| 20120008189 | DISPLAY ELEMENT, DISPLAY APPARATUS AND FABRICATING METHOD OF THE DISPLAY ELEMENT - A display element, a display apparatus and a fabricating method of a display element are provided. The display apparatus includes a first substrate, a second substrate and a display medium layer. The display medium layer is disposed between a first electrode layer of the first substrate and a second electrode layer of the second substrate. The display medium layer has a plurality of display elements. Each display element includes a colorized capsule, a fluid and a plurality of particles. The fluid and the particles are disposed in the colorized capsule, and the particles are charged. The fabricating method of a display element is coloring a capsule of a display element with dye to form a colorized capsule. | 01-12-2012 |
Chia-Ming Hsu, Taoyuan Hsinen TW
| Patent application number | Description | Published |
|---|---|---|
| 20090269196 | FAN AND AIRFLOW GUIDING STRUCTURE THEREOF - A fan includes an airflow guiding structure, an impeller and a guiding ring. The outer radius of the airflow guiding structure increases gradually from the top of the airflow guiding structure to the bottom of the airflow guiding structure. The airflow guiding structure includes a plurality of fins and a first space for accommodating a circuit device. The impeller is disposed on the airflow guiding structure and has a hub and several blades. The guiding ring connects to the airflow guiding structure via at least one connecting element. A predetermined distance is arranged between the inner surface of the guiding ring and the outer edges of the blades. An inlet is formed at the top of the guiding ring, and an outlet is formed between the bottom of the guiding ring and the outer surface of a sidewall of the airflow guiding structure. When the impeller rotates, the airflow enters the fan from the inlet and flows along the outer surface of the sidewall of the airflow guiding structure, then the airflow exits the fan through the outlet. The direction of the airflow passing through the outlet is different from the direction of the airflow passing through the inlet. | 10-29-2009 |
Chia-Ming Huang, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110181976 | POWER-SAVING METHOD AND OPERATING SYSTEM FOR THE SAME - A power-saving method adapted in a hard disk in a computer system having a CPU and a memory module is provided. The power-saving method comprises the following steps. A data-to-be-written is transferred from the memory module through the CPU to the hard disk filter. A determining module is provided to determine whether a data access frequency of the computer system exceeds a threshold value. When the data access frequency exceeds the threshold value, the determining module further determines whether a request-queuing time exceeds an idle-mode activation time. When the request-queuing time exceeds the idle-mode activation time interval, the data-to-be-written is stored in a temporary storage location by the hard disk filter. When a condition of the computer system is satisfied, the data-to-be-written is written to the hard disk to extend the duration of an idle-mode of the hard disk. A power-saving operating system is disclosed herein as well. | 07-28-2011 |
Chia-Ming Huang, Yilan County TW
| Patent application number | Description | Published |
|---|---|---|
| 20110122160 | COLOR CALIBRATOR OF DISPLAY DEVICE - A color calibrator of a display apparatus is disclosed. The color calibrator includes a color estimator for receiving a plurality of digital counts of initial colors of an image signal. The color estimator includes a first operator, a gray value electrical-optical converter, a mixed-color electrical-optical converter, an initial color electrical-optical converter, a plurality of linear transformers and a weighting operator. The gray value electrical-optical converter, the mixed-color electrical-optical converter and the initial color electrical-optical converter convert a gray value digital count, a mixed color digital count and an initial color digital count for generating a plurality conversion outputs according to a plurality of gray conversion curves, a plurality of mixed color conversion curves and a plurality of initial color converting curve. The weighting operator receives the conversion outputs and a plurality of weighting values to generate an analysis output signal. | 05-26-2011 |
Chia-Ming Lee, Toucheng Town TW
| Patent application number | Description | Published |
|---|---|---|
| 20080296601 | Light-Emitting Diode Incorporating an Array of Light Extracting Spots - A light-emitting diode includes an optical layer formed in an array of substantially equidistant light extracting spots integrated to its multi-layered structure. The array of light extracting spots includes a distribution of juxtaposed hexagon patterns. The layer thickness of the light extracting spots is less than 800 Å. | 12-04-2008 |
| 20110006307 | Group III-Nitride Semiconductor Schottky Diode and Its Fabrication Method - A group III-nitride semiconductor Schottky diode comprises a conducting substrate having a first surface, a stack of multiple layers including a buffer layer and a semiconductor layer sequentially formed on the first surface, wherein the semiconductor layer comprises a group III nitride compound, a first electrode on the semiconductor layer, and a second electrode formed in contact with the first surface at a position adjacent to the stack of multiple layers. In other embodiments, the application also describes a method of fabricating the group III-nitride semiconductor Schottky diode. | 01-13-2011 |
Chia-Ming Lin, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20110216007 | KEYBOARDS AND METHODS THEREOF - An integrated keyboard includes a touch pad and a dynamic keyboard embedded in an area of the touch pad. The touch pad, which may provide a transparent surface to allow the keyboard to be visible, provides motion tracking in areas around the periphery of the keyboard and may be configured into many operating modes. For example, virtual touchable buttons may be configured in the periphery of the keyboard. The keyboard may be provided as a dynamic keyboard with various layouts. A keyboard protector may be provided for each layout, with printed symbols for the keys under the layout. The integrated keyboard may also include a mini-projector to allow projection of a large image on a surface and a virtual Human Interface Device (HID) system to facilitate data input. With the input capabilities of the touch pad and the keyboard, the projector may be controlled in many additional ways not available in conventional projectors that are controlled by a few buttons. The virtual HID may provide motion tracking. The integrated keyboard may interface with a master/slave device, such as a slate type device. A customized case tightly integrates the integrated keyboard with the master/slave device. | 09-08-2011 |
| 20120011293 | Intelligent Platform - An intelligent platform integrates with an intelligent portable device or intelligent core to provide a dynamic computer that may serve as any of: a pad, a tablet computing device, a netbook computer, and a notebook computer. The operations of the integrated device are determined by the connected intelligent core's CPU architecture and its installed operating system. The intelligent platform includes a housing and a core slot located behind a display for accommodating the intelligent core. A core connector is provided on an inner wall of the core slot for interconnecting with a compatible connector of the inserted intelligent core. A control unit continually communicates with the intelligent core through signals carried by the connector, refreshes image received from the intelligent core on its touch-sensitive display, and sends touch-input commands from the touchable panel of the touch-sensitive display to the intelligent core. The battery on intelligent platform provides backup power to the intelligent core. | 01-12-2012 |
Chia-Ming Tsai, Yung-He City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090009005 | Control method for parallel redundant power system - A method for controlling the power system is presented. The power system is composed of at least one inverter for supplying AC power to a load through a bus, a phase lock system to synchronize all output voltages of the inverters and a current sharing circuit to properly distribute the load current among all inverters. Each inverter is controlled by an unbalanced power to limit the increase of its cross current. Moreover, the information related to DC bus voltage is further applied to control the inverters, whereby the cross current is mitigated and entire power system is operated steadily. | 01-08-2009 |
Chia-Ming Tsai, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20100112326 | COMPOUND MATERIAL MEMBER AND THE MANUFACTURING METHOD THEREOF - A composite material member including a rubber element and a composite fiber element is manufactured by integrally combining rubber and composite fiber. A method for manufacturing the composite material member is also provided. In this method, the composite fiber element whether being thermosetting or not is disposed in a first mold of a mold. The composite fiber element is a structure of at least one fiber layer wrapped with resin. The first mold and a second mold of the mold are then closed. Finally, the cavity is filled with rubber. Different forming environments are provided according to whether the composite fiber element is thermosetting or not to form and fix the rubber element on the resin of the composite fiber element. | 05-06-2010 |
Chia-Ming Tsai, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100143648 | FIBER-REINFORCED POLYMERIC CASING AND METHOD FOR MANUFACTURING THE SAME - This invention discloses a fiber-reinforced polymeric casing and a method for manufacturing the same. According to this invention, the casing includes a multi-layer structure, an intermedium film, and a structural part. The multi-layer structure is formed by shaping and stacking up a plurality of layers of fiber-reinforced polymeric mats. The intermedium film is disposed on a surface of the multi-layer structure. The structural part includes a polymer and is one-step molded on the intermedium film together with the multi-layer structure. | 06-10-2010 |
| 20100143650 | CASING AND METHOD FOR MANUFACTURING THE SAME - This invention discloses a casing and a method for manufacturing the same. The casing includes a fiber-reinforced thermosetting polymeric mat and a fiber-reinforced thermoplastic polymeric mat. The fiber-reinforced thermosetting polymeric mat is molded to have a predetermined shape with a curved inner surface. The fiber-reinforced thermoplastic polymeric mat is molded on the inner surface of the fiber-reinforced thermosetting polymeric mat and agrees with the curved inner surface. | 06-10-2010 |
| 20100236020 | HINGE DEVICE - A hinge device includes a bearing seat, a spherical joint, a plurality of positioning pins, and a retaining ring. The bearing seat has a containing recess. The spherical joint is rotatably disposed in the containing recess, and the surface of the spherical joint has a plurality of positioning holes. The positioning pins are disposed at the bearing seat and capable of sliding toward or away from the spherical joint. The positioning pins correspond to parts of the positioning holes respectively when the spherical joint rotates to a specific position relative to the bearing seat. The retaining ring is disposed at an opening of the containing recess of the bearing seat and surrounds the positioning pins, the retaining ring is against the positioning pins to allow the positioning pins to be fastened in the corresponding positioning holes when the spherical joint rotates to the specific position relative to the bearing seat. | 09-23-2010 |
Chia-Ming Wang, Shenkeng Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20090014972 | Computer cart - A computer cart includes a chassis, which is formed of a first chassis member and a second chassis member that are coupled to each other and movable relative to each other to adjust the width of the chassis, a locking mechanism for locking the first chassis member and the second chassis member, a first retaining panel affixed to the first chassis member in vertical for supporting a computer on the chassis, and a second retaining panel affixed to the second chassis member in vertical for supporting a computer on the chassis. | 01-15-2009 |
| 20090127418 | Computer dock station - A computer dock station includes a bracket covered with a cover member and having a fence at one side and upright pivot pins on the inside, and a locking mechanism, which includes a motive member, two follower members pivoted to the two opposite ends of the motive member and respectively coupled with the respective sliding slot to the upright pivot pins, two clamps respectively mounted on the follower members outside the bracket, and a screw rod threaded through the motive member and pivoted to the bracket and rotatable to move the motive member and to further turn the follower members about the respective upright pivot pins for adjusting the position of the clamps. | 05-21-2009 |
| 20090276976 | Hinge assembly - A hinge assembly includes a first swinging member, a second swinging member that has a barrel at one end, a pivot pin inserted through the barrel to pivotally secure the second swinging member to a proximal end of the first swinging member, a guide member, which has a first end inserted through an oblique guide slot on the barrel and pivotally coupled to the pivot pin and a second end provided with a transversely extending screw hole, and an adjustment screw transversely inserted through the proximal end of the first swinging member and threaded into the screw hole of the guide member for allowing rotation by a user to bias the second swinging member relative to the first swinging member. | 11-12-2009 |
Chia-Ming Wu, Taipei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100032915 | MOTOR VEHICLE AND RICKSHAW AND TILTING MECHANISM THEREOF - A motor vehicle is provided. The motor vehicle comprises a vehicle body, a front wheel, a rear wheel and a tilting mechanism. The front wheel, the rear wheel and the tilting mechanism are disposed on the vehicle body. The tilting mechanism comprises a first compensation unit, a first arm, a first wheel, a second compensation unit, a second arm, a second wheel, at least one pipe and a fluid. The first arm is connected to the first compensation unit, and the first wheel. The second arm is connected to the second compensation unit, and the second wheel. The pipe connects the first compensation unit to the second compensation unit. The fluid flows in the first compensation unit, the second compensation unit and the pipe, wherein when the motor vehicle tilts, an extension length of the first compensation unit equals to a compression length of the second compensation unit. | 02-11-2010 |