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Chi-I Lang

Chi-I Lang, Sunnyvale, CA US

Patent application numberDescriptionPublished
20090014846Methods for coating a substrate with an amphiphilic compound - Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.01-15-2009
20090053902LOW DIELECTRIC (LOW K) BARRIER FILMS WITH OXYGEN DOPING BY PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION (PECVD) - Methods are provided for depositing a silicon carbide layer having significantly reduced current leakage. The silicon carbide layer may be a barrier layer or part of a barrier bilayer that also includes a barrier layer. Methods for depositing oxygen-doped silicon carbide barrier layers are also provided. The silicon carbide layer may be deposited by reacting a gas mixture comprising an organosilicon compound, an aliphatic hydrocarbon comprising a carbon-carbon double bond or a carbon-carbon triple bond, and optionally, helium in a plasma. Alternatively, the silicon carbide layer may be deposited by reacting a gas mixture comprising hydrogen or argon and an organosilicon compound in a plasma.02-26-2009
20090075095METHODS FOR PROCESSING A SUBSTRATE HAVING A BACKSIDE LAYER - Methods for processing a substrate utilizing a backside layer are presented including: receiving a substrate, the substrate including a front side and a backside; forming the backside layer on the backside of the substrate; and performing at least one processing operation on the front side of the substrate, wherein the backside layer protects the backside of the substrate during the performing the at least one processing operation. In some embodiments, methods further include cross-linking the backside layer such that the backside layer is stabilized. In some embodiments, methods further include: functionalizing the backside layer, where the functionalizing alters a chemical characteristic of the backside layer, and where the functionalizing includes a functional group such as: a hydroxyl group, an amino group, a mercapto group, a fluorine group, a chlorine group, an alkene group, an aryle group, and a carboxy group.03-19-2009
20090124081Techniques to Improve Characteristics of Processed Semiconductor Substrates - Techniques to improve characteristics of processed semiconductor substrates are described, including cleaning a substrate using a preclean process, the substrate comprising a dielectric region and a conductive region, introducing a hydroquinone to the substrate after cleaning the substrate using the preclean operation, and forming a capping layer over the conductive region of the substrate after introducing the hydroquinone.05-14-2009
20090232966Stamp Usage To Enhance Surface Layer Functionalization And Selectivity - This disclosure provides methods, devices and systems for using a stamp to enhance selectivity between surface layers of a substrate, and to facilitate functionalizing selected layers. An array of flat stamps may be used to concurrently stamp multiple regions of a substrate to transfer one or more substances to the topmost layer or layers of the substrate. If desired, the affected regions of the substrate may be isolated from each other through the use of a reactor plate that, when clamped to the substrate's surface, forms reaction wells in the area of stamping. The stamp area can, if desired, be configured for stamping the substrate after the reactor plate has been fitted, with the individual stamps sized and arranged in a manner that permits stamping within each reaction well. If applied in a combinatorial process, a robotic process may be used to transfer multiple combinations of contact substances and processing chemicals to each reaction well to perform many concurrent processes upon a single substrate (e.g., a single coupon). The methods, devices and systems provided facilitate semiconductor design, optimization and qualification, and may be adapted to production manufacturing.09-17-2009
20090291275Methods For Improving Selectivity of Electroless Deposition Processes - Methods for improving selective deposition of a capping layer on a patterned substrate are presented, the method including: receiving the patterned substrate, the patterned substrate including a conductive region and a dielectric region; forming a molecular masking layer (MML) on the dielectric region; preparing an electroless (ELESS) plating bath, where the ELESS plating bath includes: a cobalt (Co) ion source: a complexing agent: a buffer: a tungsten (W) ion source: and a reducing agent; and reacting the patterned substrate with the ELESS plating bath for an ELESS period at an ELESS temperature and an ELESS pH so that the capping layer is selectively formed on the conductive region. In some embodiments, methods further include a pH adjuster for adjusting the ELESS pH to a range of approximately 9.0 pH to 9.2 pH. In some embodiments, the pH adjuster is tetramethylammonium hydroxide (TMAH). In some embodiments, the MML is hydrophilic.11-26-2009
20100203731Formation of a Zinc Passivation Layer on Titanium or Titanium Alloys Used in Semiconductor Processing - Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl08-12-2010

Patent applications by Chi-I Lang, Sunnyvale, CA US

Chi-I Lang, San Jose, CA US

Patent application numberDescriptionPublished
20080219039Nonvolatile memory elements with metal-deficient resistive-switching metal oxides - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.09-11-2008
20080220601Methods for forming nonvolatile memory elements with resistive-switching metal oxides - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.09-11-2008
20090061083VAPOR BASED COMBINATORIAL PROCESSING - A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.03-05-2009
20090061644VAPOR BASED COMBINATORIAL PROCESSING - A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.03-05-2009

Patent applications by Chi-I Lang, San Jose, CA US

Chi-I Lang, Cupertino, CA US

Patent application numberDescriptionPublished
20110146727COMBINATORIAL APPROACH TO THE DEVELOPMENT OF CLEANING FORMULATIONS FOR GLUE REMOVAL IN SEMICONDUCTOR APPLICATIONS - Embodiments of the current invention describe cleaning solutions to clean the surface of a photomask, methods of cleaning the photomask using at least one of the cleaning solutions, and combinatorial methods of formulating the cleaning solutions. The cleaning solutions are formulated to preserve the optical properties of the photomask, and in particular, of a phase-shifting photomask.06-23-2011