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Chi-Feng Huang

Chi-Feng Huang, Chang Hua TW

Patent application numberDescriptionPublished
20100012701Stapler with a leg-flatting device - A stapler has a supporting base, a magazine assembly, a trigger assembly and a leg-flatting device. The trigger assembly has a trigger lever and a pushing element. The pushing element is mounted pivotally on the trigger lever with a pivot and has two pushing arms extending toward the supporting base. The leg-flatting device is mounted on the supporting base and has a sliding base, a moving base and an anvil element. The sliding base is slidably mounted on the supporting base and has a pushed segment corresponding to and selectively pushed by the pushing arms. The moving base is selectively blocked by the sliding base to keep the moving base from moving downwardly before the sliding base sliding relative to the supporting base and has an elongated hole. The anvil element is mounted in the elongated hole in the moving base.01-21-2010
20110079625STAPLER WITH LEG-FLATTING AND ANVIL-GUIDING CAPABILITY - A stapler has a supporting base, a magazine assembly, a trigger assembly, a leg-flatting device and a rail assembly. The magazine assembly and the trigger assembly are connected pivotally to the supporting base. The leg-flatting device is mounted on the supporting base and has a moving base and an anvil element. The moving base is connected operationally to the supporting base and has an anvil hole. The anvil element is mounted moveably in the anvil hole and has a functional segment and a non-functional segment. The rail assembly mounted on and protrudes from the bottom face of the supporting base and has at least one rail bracket protruding from the bottom face of the supporting base. Each one of the at least one rail bracket has a rail in which the non-functional segment of the anvil element is slidably mounted.04-07-2011

Chi-Feng Huang, Hsinchu TW

Patent application numberDescriptionPublished
20100289518CIRCUIT AND METHOD FOR DETECTING FAULTY DIODE - A circuit for detecting faulty diode is disclosed, wherein the circuit for detecting faulty diode comprises a diode having an anode connecting to a voltage supply; a first switch having a first end connected to a cathode of the diode; a testing current source connected to the second end of the first switch; a one-shot circuit connected to a control end of the first switch, by which an output signal is generated and transmitted to the control end; and a comparator connected to a reference voltage input terminal for receiving a reference voltage and connected to the second end of the first switch. When the one-shot circuit closes the first switch for a maintaining period to urge the comparator comparing the reference voltage with the voltage applied to the second end of the first switch, whereby a signal used to discriminate whether the diode is fail or not is generated.11-18-2010
20100289519CIRCUIT FOR DETECTING FAULTY DIODE - A circuit for detecting faulty diode comprises a diode having an anode connected to a voltage supply; a resistor having a first end connected to a cathode of the diode; a transistor having a drain connected to a second end of the resistor and a source that is grounded; a differential amplifier having a positive terminal connected to the drain of the transistor, a negative terminal connected to a reference voltage input terminal for receiving a reference voltage, and an output terminal connected to a gate of the transistor; and a buffer having an input terminal connected to the gate of the transistor, and a signal output terminal used to output a faulty signal.11-18-2010
20110043497LED DISPLAY SYSTEM AND MODE-DETERMINING METHOD OF SAME - A LED display system includes a display controller including an output port having a first output terminal and a second output terminal; a plurality of LED sets; and a plurality of driving circuits, coupled in series and coupled between the display controller and the plurality of LED sets, respectively. Each of the driving circuits includes a first signal-input terminal, a first signal-output terminal, a second signal-input terminal, and a second signal-output terminal, wherein the first signal-input terminal of a first one of the driving circuits is coupled to the first output terminal, the second signal-input terminal of the first one of the driving circuits is coupled to the second output terminal. The display controller asserts a transition period for switching the driving circuits from a first operation mode to a second operation mode by manipulating a first signal outputted to the driving circuits through the first output terminal.02-24-2011
20110043545LED DISPLAY SYSTEM AND DATA-TRANSMISSION CONTROL METHOD OF SAME - A LED display system includes a display controller includes an output/input port; a plurality of driving circuits coupled in series, wherein a first one of the driving circuits is coupled to the output/input port; and a plurality of LED sets respectively coupled to the plurality of driving circuits. A plurality of image data, outputted from the display controller, are shifted to the plurality of driving circuits, respectively, in a first direction through the first one of the driving circuits when the display controller is in a displaying mode; and a plurality of status data, respectively generated by the plurality of driving circuits, are shifted to the display controller in a second direction through the first one of the driving circuits when the display controller is in a detecting mode.02-24-2011
20120062657PIEZOELECTRIC INKJET HEAD STRUCTURE - A piezoelectric inkjet head structure includes an upper cover plate, a lower cover plate, a piezoelectric actuating module, a nozzle plate and a seal layer. The piezoelectric actuating module includes an upper piezoelectric chip, a lower piezoelectric chip, a first electrode, a second electrode, a conductive layer and a plurality of flow channels. The entrances of the flow channels of the upper piezoelectric chip and the lower piezoelectric chip are separated from each other by the same spacing interval. The entrances of the flow channels of the upper piezoelectric chip and the entrances of the flow channels of the lower piezoelectric chip are arranged in a staggered form. During operation of the piezoelectric actuating module, ink liquid is introduced into the flow channels of the piezoelectric actuating module from the upper cover plate and the lower cover plate, and then ejected out of the nozzles.03-15-2012

Patent applications by Chi-Feng Huang, Hsinchu TW

Chi-Feng Huang, Taipei TW

Patent application numberDescriptionPublished
20110047614Permission management system for data accessing and method thereof - The invention discloses a permission management system for data accessing and a method thereof, applicable to operating system. The method of permission management for accessing data comprises the steps of: first, monitoring an unoccupied drive letter in operating system; then, detecting a drive letter request event and actively executing an authorizing procedure to produce an access right of the drive letter; and stop monitoring the drive letter and allowing a user to access data corresponding to the drive letter according to the access right.02-24-2011

Chi-Feng Huang, Linkou Township TW

Patent application numberDescriptionPublished
20100323237BATTERY CONNECTOR COUPLING - An information handling system (IHS) includes an IHS chassis having a processor and defining a battery housing. An IHS connector is located adjacent the battery housing and is electrically coupled to the processor. A battery is located in the battery housing and includes a battery chassis that houses at least one battery cell. A battery connector is electrically coupled to the at least one battery cell and engages the IHS connector. The battery connector is moveably coupled to the battery chassis through a battery connector coupling that allows the battery connector to move relative to the battery chassis when the battery connector engages the IHS connector.12-23-2010

Chi-Feng Huang, Taipei City TW

Patent application numberDescriptionPublished
20090114940Light-Emitting Device - The invention provides a light-emitting device, comprising a light-emitting element and a surface plasmon coupling element connected to the light-emitting element. In an embodiment of the invention, the surface plasmon coupling element comprises a dielectric layer connected to the light-emitting element and a metal layer on the dielectric layer. In another embodiment of the invention, the light-emitting device is a light-emitting diode, comprising an active layer between an n-type semiconductor layer and a p-type semiconductor layer, and a surface plasmon coupling element adjacent to the n-type semiconductor layer. In a further embodiment of the invention, a current spreading layer on a second type semiconductor layer of the light-emitting device includes a plurality of strip-shaped structures, and the surface plasmon coupling element is disposed on the current spreading layer and filled into the gap between the strip-shaped structures of the current spreading layer.05-07-2009
20100309638ELECTRONIC ELEMENT PACKAGING MODULE - An electronic element packaging module including a lead frame, an insulating layer and at least one electronic element is provided. The lead frame is a patterned metal sheet and has a first surface, a second surface opposite thereto and a through trench passing from the first surface to the second surface. A substrate portion and a plurality of lead portions around the substrate portion of the lead frame are defined by the through trench. The second surface of the lead frame is exposed outside the electronic element packaging module. The insulating layer disposed in the through trench has a third surface and a forth surface substantially coplanar with the first and the second surfaces, respectively. The electronic element disposed on the first surface is coupled to the lead frame.12-09-2010

Chi-Feng Huang TW

Patent application numberDescriptionPublished
20080299723METHODS FOR FORMING CAPACITOR STRUCTURES - A method for forming a capacitor includes forming a dielectric layer over a substrate. A conductive layer is formed over the dielectric layer. Dopants are implanted through at least one of the dielectric layer and the conductive layer after forming the dielectric layer so as to form a conductive region under the dielectric layer, wherein the conductive layer is a top electrode of the capacitor and the conductive region is a bottom electrode of the capacitor.12-04-2008

Chi-Feng Huang, Zhubei City TW

Patent application numberDescriptionPublished
20120104387Four-Terminal Metal-Over-Metal Capacitor Design Kit - A device includes a first MOM capacitor; a second MOM capacitor directly over and vertically overlapping the first MOM capacitor, wherein each of the first and the second MOM capacitors includes a plurality of parallel capacitor fingers; a first and a second port electrically coupled to the first MOM capacitor; and a third and a fourth port electrically coupled to the second MOM capacitor. The first, the second, the third, and the fourth ports are disposed at a surface of a respective wafer.05-03-2012