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| 20100111959 | ENGINEERED ANTI-IL-13 ANTIBODIES, COMPOSITIONS, METHODS AND USES - The present invention relates to engineered antibodies immunospecific for human interleukin-13 (IL-13) protein or fragment thereof, as well as methods of making and using thereof, including therapeutic indications. | 05-06-2010 |
| 20110091971 | Differentiation of Pluripotent Stem Cells - The present invention is directed to methods to differentiate pluripotent stem cells. In particular, the present invention is directed to methods and compositions to differentiate pluripotent stem cells into cells expressing markers characteristic of the definitive endoderm lineage. The present invention also provides methods to generate and purify agents capable of differentiating pluripotent stem cells into cells expressing markers characteristic of the definitive endoderm lineage. | 04-21-2011 |
| 20110318808 | Engineered Plant Cysteine Proteases and Their Uses - The present invention relates to potato virus NIa protease variants or fragments thereof, polynucleotides encoding them, and methods of making and using the foregoing. | 12-29-2011 |
| 20120045438 | ENGINEERED ANTI-IL-13 ANTIBODIES, COMPOSITIONS, METHODS AND USES - The present invention relates to engineered antibodies immuno specific for human interleukin-13 (IL-13) protein or fragment thereof, as well as methods of making and using thereof, including therapeutic indications. | 02-23-2012 |
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| 20080278122 | Apparatus and method for termination powered differential interface periphery - An apparatus and method for supplying power to the peripheral circuits of a transmitter circuit, especially an HDMI transmitter circuit, is disclosed. In an HDMI transmitter the termination resistors of the output driver are part of the receiver. DC power for the driver is supplied through these termination resistors. In prior art implementations of circuits this power, supplied by the receiver circuit, is wasted in the DC set-up circuit of the differential line driver. It is suggested to use this wasted power from the remote termination to power selected peripheral circuits of the transmitter. The use of this wasted power in the line driver for powering the peripheral circuits reduces the total system power. | 11-13-2008 |
| 20080278224 | Apparatus and method for recovery of wasted power from differential drivers - An apparatus and method for supplying power to circuits of an integrated circuit (IC) from the wasted power in low-swing high-speed differential line drivers used in the IC, is disclosed. In a high speed line driver the load resistors of the driver are connected to a power supply, either the local power supply or the receiver power supply. DC power for the driver is supplied through these resistors. A large portion of this power, supplied from the power supply is wasted in the DC set-up circuit of the differential line driver. It is proposed to use this wasted power to power selected circuits of an IC. The use of this wasted power from the drivers for powering the circuits reduces the overall power dissipation of the system. | 11-13-2008 |
| 20090189442 | Systems and methods for powering circuits for a communications interface - Embodiments include systems and methods of powering data communications transmitter circuitry using current sinked from biasing circuitry used to bias a transmission line between the data communications transmitter circuitry and data communications receiver circuitry. In some embodiments, the current sinked from the biasing circuitry is sourced by a power supply configured to power the data communications receiver circuitry. The current sinked from the biasing circuitry is then re-used to power the data communications transmitter circuitry. The data communications transmitter circuitry can be operated using less power overall than the prior art by re-using the current first used to bias the transmission line to power the data communications transmitter circuitry. Various embodiments include HDMI transceivers, DVI transceivers, and DisplayPort transceivers. | 07-30-2009 |
| 20120007664 | APPARATUS AND METHOD FOR RECOVERY OF WASTED POWER FROM DIFFERENTIAL DRIVERS - An apparatus and method for supplying power to circuits of an integrated circuit (IC) from the wasted power in low-swing high-speed differential line drivers used in the IC, is disclosed. In a high speed line driver the load resistors of the driver are connected to a power supply, either the local power supply or the receiver power supply. DC power for the driver is supplied through these resistors. A large portion of this power, supplied from the power supply is wasted in the DC set-up circuit of the differential line driver. It is proposed to use this wasted power to power selected circuits of an IC. The use of this wasted power from the drivers for powering the circuits reduces the overall power dissipation of the system. | 01-12-2012 |
| 20120033747 | Systems and Methods for Powering Circuits for a Communications Interface - Embodiments include systems and methods of powering data communications transmitter circuitry using current sinked from biasing circuitry used to bias a transmission line between the data communications transmitter circuitry and data communications receiver circuitry. In some embodiments, the current sinked from the biasing circuitry is sourced by a power supply configured to power the data communications receiver circuitry. The current sinked from the biasing circuitry is then re-used to power the data communications transmitter circuitry. The data communications transmitter circuitry can be operated using less power overall than the prior art by re-using the current first used to bias the transmission line to power the data communications transmitter circuitry. Various embodiments include HDMI transceivers, DVI transceivers, and DisplayPort transceivers. | 02-09-2012 |
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| 20090087996 | LINE WIDTH ROUGHNESS CONTROL WITH ARC LAYER OPEN - To achieve the foregoing and in accordance with the purpose of the present invention a method for etching an etch layer disposed below an antireflective coating (ARC) layer below a patterned mask is provided. The ARC layer is opened, and features are etched into the etch layer through the patterned mask. The opening the ARC layer includes (1) providing an ARC opening gas comprising a halogen containing gas, COS, and an oxygen containing gas, (2) forming a plasma from the ARC opening gas to open the ARC layer, and (3) stopping providing the ARC opening gas to stop the plasma. The patterned mask may be a photoresist (PR) mask having a line-space pattern. COS in the ARC opening gas reduces line width roughness (LWR) of the patterned features of the etch layer. | 04-02-2009 |
| 20100132889 | ULTRA-HIGH ASPECT RATIO DIELECTRIC ETCH - A method for etching an ultra high aspect ratio feature in a dielectric layer through a carbon based mask is provided. The dielectric layer is selectively etched with respect to the carbon based mask, wherein the selective etching provides a net deposition of a fluorocarbon based polymer on the carbon based mask. The selective etch is stopped. The fluorocarbon polymer is selectively removed with respect to the carbon based mask, so that the carbon based mask remains, using a trimming. The selectively removing the fluorocarbon polymer is stopped. The dielectric layer is again selectively etched with respect to the carbon based mask, wherein the second selectively etching provides a net deposition of a fluorocarbon based polymer on the carbon based mask. | 06-03-2010 |
| 20100323525 | CD BIAS LOADING CONTROL WITH ARC LAYER OPEN - A method for etching a line pattern in an etch layer disposed below an antireflective coating (ARC) layer below a patterned mask is provided. The method includes opening the ARC layer, in which an ARC opening gas comprising CF3I, a fluorocarbon (including hydrofluorocarbon) containing gas, and an oxygen containing gas are provided, a plasma is formed from the ARC opening gas to open the ARC layer, and providing the ARC opening gas is stopped. Line pattern features are etched into the etch layer through the opened ARC layer. | 12-23-2010 |
| 20110053379 | PROFILE CONTROL IN DIELECTRIC ETCH - A method for etching a dielectric layer is provided. The dielectric layer is disposed over a substrate and below a patterned mask having a line-space pattern. The method includes (a) providing an etchant gas comprising CF4, COS, and an oxygen containing gas, (b) forming a plasma from the etchant gas, and (c) etching the dielectric layer into the line-space pattern through the mask with the plasma from the etchant gas. The gas flow rate of CF4 may have a ratio greater than 50% of a total gas flow rate of all reactive gas components. The gas flow rate of COS may be between 1% and 50%. The method reduces bowing in etching of the dielectric layer by adding COS to the etchant gas. | 03-03-2011 |
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| 20110133710 | Partial Feedback Mechanism in Voltage Regulators to Reduce Output Noise Coupling and DC Voltage Shift at Output - Techniques are presented for reducing the DC voltage shift in a voltage regulator, particularly for high and ultra-high speed load switching operation. The regulator includes a power transistor, connected between an input supply voltage and an output node, and an error amplifier, having its output connected to control the gate of the output transistor, a first input connected to receive a reference voltage, and a second input connected to a feedback node. The regulator also includes a first resistance, connected between the feedback node and ground, and also a second resistance, a third resistance, and a first capacitance, where the feedback node is connected to the output node through a combination of the first capacitance in parallel with the second resistance and in series with the third resistance. Consequently, the feedback path from the output node of the regulator uses a partial feedback mechanism, where the capacitance is included to generate a zero in the feedback divider path, but a resistance is placed in series with the capacitance so that at high frequencies the feedback level is still separated from the output level. | 06-09-2011 |
| 20110234268 | Apparatus and Method for Host Power-On Reset Control - A host power-on reset control circuit includes a comparator connected to receive both a divided version of a supply voltage and a reference voltage. The comparator generates and outputs a high digital state signal when the divided version of the supply voltage is at least as large as the reference voltage. The control circuit includes an output node connected to transmit a power-on reset control signal. The control circuit includes pulldown circuitry connected between the comparator output and the output node. The pulldown circuitry maintains the output node at a reset voltage level as the supply voltage rises to a host operational level, based on a signal present at the comparator output. The control circuit includes pullup circuitry connected between the supply voltage and the output node. The pullup circuitry maintains the output node at a non-reset voltage level after the supply voltage has risen to the host operational level. | 09-29-2011 |
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| 20090160256 | Multi-regulator power delivery system for ASIC cores - A method for operating an electronic product having an application specific semiconductor chip (ASIC) device which includes in its circuitry both a linear regulator module configured to be coupled to an optional external capacitance and a capless regulator module configured to be coupled to internal capacitance of the electronic product utilizes control logic of the ASIC device responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device. The control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation. | 06-25-2009 |
| 20090160421 | Multi-regulator power delivery system for ASIC cores - An electronic product includes an application specific semiconductor chip (ASIC) device which includes in its circuitry both a linear regulator module configured to be coupled to an optional external capacitance and a capless regulator module configured to be coupled to internal capacitance of the electronic product. Control logic of the ASIC device is responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device. The control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation. | 06-25-2009 |
| 20090160423 | Self-configurable multi-regulator ASIC core power delivery - An electronic product includes an application specific semiconductor circuit (ASIC) including in its circuitry both a linear regulator module for use with an optional external capacitance and a capless regulator module coupled to internal capacitance of the product. The capless regulator module includes both a low-power sub-module and a high-power sub-module. Control logic of the ASIC is configured to determine if an external capacitance is present. If so, the control logic causes the high-power capless regulator sub-module to be used during a power-up phase of the ASIC; if not, only the low-power capless regulator sub-module is used during the power-up phase of the ASIC. After power-up of the ASIC, the control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation or it may select one or the other for all times of post-power-up operation. | 06-25-2009 |
| 20090164807 | Self-configurable multi-regulator ASIC core power delivery - A method for operating an electronic product having an application specific semiconductor circuit (ASIC) including in its circuitry both a linear regulator module for use with an optional external capacitance and a capless regulator module coupled to internal capacitance of the product selects a low-power sub-module or high-power sub-module of the capless regulator module for use in a power-up phase of the ASIC. Control logic of the ASIC determines if an external capacitance is present. If so, then the high-power capless sub-module is used during a power-up phase of the ASIC; if not only the low-power capless sub-module is used during the power-up phase of the ASIC. After power-up of the ASIC, the control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation or it may select one or the other for all times of post-power-up operation. | 06-25-2009 |
| 20090167093 | Systems and Circuits with Multirange and Localized Detection of Valid Power - Methods and systems for automatically and/or locally adjusting power-valid detection. In one class of embodiments, local power-on-reset circuits are included in individual power islands; in another class of embodiments, the power-on-reset circuit is automatically reprogrammed, depending on the detected interface voltage level, to use the same circuitry for power-valid detection in either case. | 07-02-2009 |
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| 20100057698 | SYSTEM AND METHOD FOR ASSISTING SEARCH REQUESTS WITH VERTICAL SUGGESTIONS - The present invention is directed towards systems, methods and computer program products for assisting search request by presenting suggestion of one or more vertical segments to produce a more focused result. A vertical segment may be selected by the user, the selected vertical segment being associated with one or more query terms and a search is performed on an index associated with the vertical segment. A search engine generates a search result and returns a list of search result pages for presentation to a user. | 03-04-2010 |
| 20100131902 | NAVIGATION ASSISTANCE FOR SEARCH ENGINES - Search assistance is provided to users that submit search queries to search engines. In one implementation, a partial search query input by a user to a search engine is received. The partial search query is predicted to be a navigational query. A web address is selected based on the predicted navigational query. A search assistance list that includes the selected web address is generated. The search assistance list is displayed to the user in response to the received partial search query. In another implementation, a plurality of suggested search queries is determined for the received partial search query. A suggested search query of the plurality of suggested search queries having a highest relevance to the user is determined. A search assistance list is generated and displayed to the user. The suggested search query having the highest relevance to the user is prominently displayed in the search assistance list. | 05-27-2010 |
| 20110202520 | NAVIGATION ASSISTANCE FOR SEARCH ENGINES - Search assistance is provided to users that submit search queries to search engines. In one implementation, a partial search query input by a user to a search engine is received. The partial search query is predicted to be a navigational query. A web address is selected based on the predicted navigational query. A search assistance list that includes the selected web address is generated. The search assistance list is displayed to the user in response to the received partial search query. In another implementation, a plurality of suggested search queries is determined for the received partial search query. A suggested search query of the plurality of suggested search queries having a highest relevance to the user is determined. A search assistance list is generated and displayed to the user. The suggested search query having the highest relevance to the user is prominently displayed in the search assistance list. | 08-18-2011 |
| 20110202881 | SYSTEM AND METHOD FOR REWARDING A USER FOR SHARING ACTIVITY INFORMATION WITH A THIRD PARTY - The present invention provides a method and system for receiving a user privacy preference that indicates an amount of activity information that the user is willing to share in response to a reward, a value of the reward related to a degree of the user privacy preference. The method and system includes setting a privacy setting for the user based on the received user privacy preference. The method and system further includes tracking web browsing activity of the user during one or more web-browsing sessions based on the privacy setting to generate user activity information. The method and system further includes sending the user activity information and providing a reward to the user based on the user activity information sent. | 08-18-2011 |
| 20110320437 | Infinite Browse - An online article is enhanced by displaying, in association with the article, supplemental content that includes entities that are extracted from the article and/or entities that are related to entities that are extracted from the article. The supplemental content further includes information about each of the entities. The information about an entity may be obtained by searching for the entity in one or more searchable repositories of data. For example, the supplemental content may include, for each entity, video, image, web, and/or news search results. The supplemental content may further include information such as stock quotes, abstracts, maps, scores, and so on. The entities are selected using a variety of analyses and ranking techniques based on contextual factors such as user-specific information, time-sensitive popularity trends, grammatical features, search result quality, and so on. The entities may further be selected for purposes such as generating ad-based revenue. | 12-29-2011 |
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| 20120022910 | INTELLIGENT MANAGEMENT OF VIRTUALIZED RESOURCES FOR CLOUD DATABASE SYSTEMS - Systems and methods are disclosed to manage resources in a cloud-based computing system by generating a model of a relationship between cloud database resources and an expected profit based on cloud-server system parameters and service level agreements (SLAs) that indicates profits for different system performances, wherein the model comprises a two level optimization/control problem, wherein model receives system metrics, number of replicas, and arrival rate as the multiple input; and dynamically adjusting resource allocation among different customers based on current customer workload and the expected profit to maximize the expected profit for a cloud computing service provider. | 01-26-2012 |
| 20120023501 | HIGHLY SCALABLE SLA-AWARE SCHEDULING FOR CLOUD SERVICES - An efficient cost-based scheduling method called incremental cost-based scheduling, iCBS, maps each job, based on its arrival time and SLA function, to a fixed point in the dual space of linear functions. Due to this mapping, in the dual space, the job will not change their locations over time. Instead, at the time of selecting the next job with the highest priority to execute, a line with appropriate angle in the query space is used to locate the current job with the highest CBS score in logarithmic time. Because only those points that are located on the convex hull in the dual space can be chosen, a dynamic convex hull maintaining method incrementally maintains the job with the highest CBS score over time. | 01-26-2012 |
