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Cheol-Woo
Cheol-Woo Ahn, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080268797 | APPARATUS AND METHOD FOR LOW POWER AMPLIFICATION IN A WIRELESS COMMUNICATION SYSTEM - An apparatus and a method for beamforming with less heat in a wireless communication system including multiple antennas are provided. The apparatus includes a digital signal processor for processing at least one baseband digital signal, and at least one Radio Frequency (RF) signal processor for converting a respective baseband digital signal of the at least one baseband digital signal into an RF analog signal and for amplifying a power of the RF analog signal for one or more antenna elements constituting a respective antenna of the at least one antenna. | 10-30-2008 |
| 20090215413 | APPARATUS AND METHOD FOR POWER TRANSMITTER IN WIRELESS COMMUNICATION SYSTEM - An apparatus and a method for an Envelope Elimination and Restoration (EER) power transmitter are provided. The apparatus includes a signal separator for splitting a transmit signal to an amplitude component and a phase component, an orthogonal modulator for modulating the phase component into a Radio Frequency (RF) signal, a bias modulator for linearly amplifying the amplitude component, for determining a bias voltage according to a magnitude of the amplitude component, and for providing a current generated using the determined bias voltage to a high-efficiency power amplifier and the high-efficiency power amplifier for amplifying the RF signal using the linearly amplified amplitude component as a drain bias voltage and using the generated current as a drain bias current. | 08-27-2009 |
| 20090218995 | Apparatus and method for bias modulator using zero current switching - An apparatus and a method for a bias modulator using a Zero Current Switching (ZCS) are provided. The bias modulator includes a Pulse Width Modulation (PWM) signal generator for converting an input envelope signal to a PWM signal; a PWM/ZCS converter for calculating the number of ZCS control signals to be provided within an on-time duration of the PWM signal and generating at least one ZCS control signal according to the number of the ZCS control signals; and a ZCS switching regulator for generating a bias current according to the ZCS control signal. | 09-03-2009 |
| 20110081880 | WIDEBAND RECEIVER FOR WIRELESS COMMUNICATION SYSTEM AND METHOD FOR CONTROLLING THE SAME - A wideband receiver for a wireless communication system and a method for controlling the same are provided. In the wideband receiver for a wireless communication system, a receive path includes a mixer for receiving a Radio Frequency (RF) signal having a frequency f | 04-07-2011 |
Cheol-Woo Park, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20100178754 | METHOD OF MANUFACTURING CMOS TRANSISTOR - A method of manufacturing a complementary metal-oxide semiconductor (CMOS) transistor includes: forming a semiconductor layer in which an n-MOS transistor region and a p-MOS transistor region are defined; forming an insulation layer on the semiconductor layer; forming a conductive layer on the insulation layer; forming a mask pattern exposing the n-MOS transistor region, on the conductive layer; generating a damage region in an upper portion of the conductive layer by implanting impurities in the conductive layer of the n-MOS transistor region using the mask pattern as a mask; removing the mask pattern; removing the damage region; and patterning the conductive layer to form an n-MOS transistor gate and a p-MOS transistor gate. Accordingly, gate thinning and formation of a step between the n-MOS transistor region gate and the p-MOS transistor region gate can be prevented. | 07-15-2010 |
| 20100210068 | Method of forming phase change memory device - Provided is a method of forming a phase change memory device, the method including washing and rinsing a phase change device structure. A phase change material layer may be formed on a semiconductor substrate. The phase change material layer may be etched so as to form a phase change device structure. The semiconductor substrate on which the phase change device structure is formed may be washed using a washing solution including a reducing agent containing fluorine (F), a pH controller, a dissolution agent and water. In addition, the semiconductor substrate on which the washing is performed may be rinsed. | 08-19-2010 |
Cheol-Woo Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080291195 | LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF - A liquid crystal display is provided, which includes: a plurality of pixel row groups, each pixel row group including at least one pixel row that includes a plurality of pixels arranged in a matrix and including switching elements; a plurality of gate lines connected to the switching elements and transmitting a gate-on voltage for turning on the switching elements; and a plurality of data lines connected to the switching elements and transmitting data voltages, wherein the switching elements in adjacent pixel row groups are connected to the data lines at opposite sides. | 11-27-2008 |
| 20090316101 | LIQUID CRYSTAL DISPLAY AND METHOD FOR DRIVING SAME - Disclosed is an LCD comprising a plurality of data lines extending in a first direction, a plurality of gate lines extending in a second direction defining with the plurality of data lines a plurality of pixel areas arranged in a matrix configuration and supplying a gate signal to at least two rows of the pixel areas simultaneously. Thin film transistors are connected to the plurality of gate lines and the plurality of data lines. Also disclosed is a driving method for an LCD including a thin film transistor substrate including pixel areas arranged in a matrix form with a gate line extending in a first direction and a data line extending in a second direction, along with a backlight providing the TFT substrate with light of three primary colors. In the method, the three primary colors are sequentially provided in one frame period and at least two rows of pixel areas and simultaneously provided with a common gate signal. | 12-24-2009 |