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Cheng-Tao
Cheng-Tao Lin, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110317121 | FLAT DISPLAY DEVICE INTEGRATED WITH PHOTOVOLTAIC CELL - A flat display device integrated with a photovoltaic cell is disclosed. The flat display device includes a first substrate, a second substrate, a display medium layer, a first photovoltaic cell, a connecting layer and a conductive structure. The display medium layer is sealed between the first and second substrates. The first photovoltaic cell is disposed on the first substrate. The connecting layer is disposed on the second substrate and is capable of electrically connecting the first photovoltaic cell to an external circuit. The conductive structure is disposed between the first and second substrates, and is electrically connected with the first photovoltaic cell and the connecting layer. | 12-29-2011 |
Cheng-Tao Wu, Xindian City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110288150 | Oligonucleotides for Suppressing Cancer Cell Invasion and Migration - Provided herein is a method for detection of migratory and invasive cancer cells based on a number of marker nucleic acids differentially expressed in migratory/invasive cancer cells relative to nonmigratory/noninvasive cancer cells. Also disclosed are antisense oligonucleotides of the marker nucleic acids and uses thereof for suppressing cancer cell migration and invasion. | 11-24-2011 |
Cheng-Tao Wu, Taipei TW
| Patent application number | Description | Published |
|---|---|---|
| 20120025257 | LED ASSEMBLY AND MANUFACTURING METHOD THEREOF - An LED assembly including a heat sink, a surface treatment dielectric layer, an electrically conductive layer, a thermally conductive layer and an LED chip. The surface treatment dielectric layer is disposed on an upper surface of the heat sink and defines at least one first through hole to expose a portion of the upper surface. The electrically conductive layer is formed on the surface treatment dielectric layer, includes a plurality of electrical traces and defines at least one second through hole corresponding to the first through hole. The thermally conductive layer is formed in the first and the second through holes and directly contacted with a portion of the upper surface exposed from the overlapped region of the first through hole and the second through hole. The LED chip includes a plurality of electrodes electrically connected to the electrical traces and is directly contacted with the thermally conductive layer. | 02-02-2012 |
