Patent application number | Description | Published |
20090016113 | NON-DIFFUSION JUNCTION SPLIT-GATE NONVOLATILE MEMORY CELLS AND ARRAYS, METHODS OF PROGRAMMING, ERASING, AND READING THEREOF, AND METHODS OF MANUFACTURE - Nonvolatile flash memory systems and methods are disclosed having a semiconductor substrate of a first conductivity type, including non-diffused channel regions through which electron flow is induced by application of voltage to associated gate elements. A plurality of floating gates are spaced apart from one another and each insulated from the channel region. A plurality of control gates are spaced apart from one another and insulated from the channel region, with each control gate being located between a first floating gate and a second floating gate and capacitively coupled thereto to form a subcell. A plurality of spaced-apart assist gates are insulated from the channel region, with each assist gate being located between and insulated from adjacent subcells. The channel is formed of three regions, two beneath adjacent control gate elements as well as a third region between the first two and beneath an associated assist gate. | 01-15-2009 |
20090096507 | Integrated Semiconductor Metal-Insulator-Semiconductor Capacitor - An integrated MIS capacitor has two substantially identical MIS capacitors. A first capacitor comprises a first region of a first conductivity type adjacent to a channel region of the first conductivity type in a semiconductor substrate. The semiconductor substrate has a second conductivity type. A gate electrode is insulated and spaced apart from the channel region of the first capacitor. The second capacitor is substantially identical to the first capacitor and is formed in the same semiconductor substrate. The gate electrode of the first capacitor is electrically connected to the first region of the second capacitor and the gate electrode of the second capacitor is electrically connected to the first region of the first capacitor. In this manner, the capacitors are connected in an anti-parallel configuration. A capacitor which has high capacitance densities, low process complexity, ambipolar operation, low voltage and temperature coefficient, low external parasitic resistance and capacitance and good matching characteristics for use in analog designs that can be integrated with existing semiconductor processes results. | 04-16-2009 |
20090290430 | Method And Apparatus For Reading And Programming A Non-Volatile Memory Cell In A Virtual Ground Array - A method and apparatus for dynamic programming and dynamic reading of a select non-volatile memory cell in a virtual grounds array is disclosed. The array of non-volatile memory cells are arranged in a plurality of rows and columns, wherein each cell in the same column share a first local bit line to one side and share a second local bit line to another side. Alternating local bit lines are connected to a first global bit line and other alternating local bit lines are connected to a second global bit line with the global bit lines connected to a sense amplifier. In the dynamic read operation the global bit lines and the associated local bit lines are connected to a precharged voltage. One of the first or second global bit lines is connected to a low voltage such as ground, wherein the one global bit line connected to ground also connects to the local bit line for sensing the select non-volatile memory cell. The state of the select non-volatile memory cell is detected by detecting the sense amplifier connected to the global bit line, other than the one global bit line. In a dynamic programming operation, the first and second global bit lines and their associated local bit lines are precharged to a first voltage. One of the first or second global bit line and its associated local bit lines is connected to a second voltage, wherein the associated local bit lines of the one global bit line include a select bit line connected to a programming terminal of the select non-volatile memory cell. The voltage differential between the second voltage and the first voltage is insufficient to cause programming of the select non-volatile memory cell. The bit line, other than the select bit line of the select non-volatile memory cell, is connected to a low voltage such as ground. The voltage differential between the second voltage and ground is sufficient to cause programming of the select non-volatile memory cell. In another embodiment of the programming operation, a local bit line connected to a programming terminal of a select non-volatile memory cell is precharged to a first voltage and then boosted to a programming voltage by precharging an adjacent local bit line. | 11-26-2009 |
20100220533 | NON-DIFFUSION JUNCTION SPLIT-GATE NONVOLATILE MEMORY CELLS AND ARRAYS, METHODS OF PROGRAMMING, ERASING, AND READING THEREOF, AND METHODS OF MANUFACTURE - Nonvolatile flash memory systems and methods are disclosed having a semiconductor substrate of a first conductivity type, including non-diffused channel regions through which electron flow is induced by application of voltage to associated gate elements. A plurality of floating gates are spaced apart from one another and each insulated from the channel region. A plurality of control gates are spaced apart from one another and insulated from the channel region, with each control gate being located between a first floating gate and a second floating gate and capacitively coupled thereto to form a subcell. A plurality of spaced-apart assist gates are insulated from the channel region, with each assist gate being located between and insulated from adjacent subcells. The channel is formed of three regions, two beneath adjacent control gate elements as well as a third region between the first two and beneath an associated assist gate. | 09-02-2010 |
20100322015 | Split Gate NAND Flash Memory Structure and Array, Method of Programming, Erasing and Reading Thereof, and Method of Manufacturing - A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type in the substrate with a second region of the second conductivity type in the substrate, spaced apart from the first region. A continuous first channel region is defined between the first region and the second region. A plurality of floating gates are spaced apart from one another with each positioned over a separate portion of the channel region. A plurality of control gates are provided with each associated with and adjacent to a floating gate. Each control gate has two portions: a first portion over a portion of the channel region and a second portion over the associated floating gate and capacitively coupled thereto. | 12-23-2010 |
20110170358 | PROGRAMMING NON-VOLATILE STORAGE WITH FAST BIT DETECTION AND VERIFY SKIP - A set of non-volatile storage elements are subjected to a programming process in order to store data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target. Non-volatile storage elements being programmed to a first set of one or more targets are verified to determine whether they have reached their target and are locked out of further programming if it is determined that they have reached their target. Non-volatile storage elements being programmed to the second set of one or more targets are tested to determine the number of fast programming bits. When the number of fast bits for a particular target is greater than a threshold, then programming stops for the non-volatile storage elements being programmed to the particular target. | 07-14-2011 |
20120188824 | PROGRAMMING NON-VOLATILE STORAGE WITH FAST BIT DETECTION AND VERIFY SKIP - A set of non-volatile storage elements are subjected to a programming process in order to store data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target. Non-volatile storage elements being programmed to a first set of one or more targets are verified to determine whether they have reached their target and are locked out of further programming if it is determined that they have reached their target. Non-volatile storage elements being programmed to the second set of one or more targets are tested to determine the number of fast programming bits. When the number of fast bits for a particular target is greater than a threshold, then programming stops for the non-volatile storage elements being programmed to the particular target. | 07-26-2012 |
20140340967 | Split Gate NAND Flash Memory Structure And Array, Method Of Programming, Erasing And Reading Thereof, And Method Of Manufacturing - A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type in the substrate with a second region of the second conductivity type in the substrate, spaced apart from the first region. A continuous first channel region is defined between the first region and the second region. A plurality of floating gates are spaced apart from one another with each positioned over a separate portion of the channel region. A plurality of control gates are provided with each associated with and adjacent to a floating gate. Each control gate has two portions: a first portion over a portion of the channel region and a second portion over the associated floating gate and capacitively coupled thereto. | 11-20-2014 |
Patent application number | Description | Published |
20090300237 | ASYNCHRONOUS/SYNCHRONOUS INTERFACE - The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode. | 12-03-2009 |
20110182128 | ASYNCHRONOUS/SYNCHRONOUS INTERFACE - The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode. | 07-28-2011 |
20120314517 | ASYNCHRONOUS/SYNCHRONOUS INTERFACE - The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode. | 12-13-2012 |
20140153335 | ASYNCHRONOUS/SYNCHRONOUS INTERFACE - The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode. | 06-05-2014 |
Patent application number | Description | Published |
20080259928 | Method and Apparatus for Out-of-Order Processing of Packets using Linked Lists - These and other aspects of the present invention will be better described with reference to the Detailed Description and the accompanying figures. A method and apparatus for out-of-order processing of packets using linked lists is described. In one embodiment, the method includes receiving packets in a global order, the packets being designated for different ones of a plurality of reorder contexts. The method also includes storing information regarding each of the packets in a shared reorder buffer. The method also includes for each of the plurality of reorder contexts, maintaining a reorder context linked list that records the order in which those of the packets that were designated for that reorder context and that are currently stored in the shared reorder buffer were received relative to the global order. The method also includes completing processing of at least certain of the packets out of the global order and retiring the packets from the shared reorder buffer out of the global order for at least certain of the packets. | 10-23-2008 |
20080259960 | Method and apparatus for Out-of-Order Processing of Packets - A method and apparatus for out-of-order processing of packets are described. In one embodiment, the method includes receiving packets in a global order, the packets being designated for different ones of a plurality of reorder contexts. The method also includes, for each of the plurality of reorder contexts, assigning reorder context sequence numbers indicating an order relative to the global order of the packets designated for that reorder context. The method also includes storing packet descriptors for each of the packets in a shared reorder buffer, and completing processing of at least certain of the packets out of the global order. The method also includes, for each of the plurality of reorder contexts, maintaining a first indication of the one of the sequence numbers assigned the one of the packets that is next to be retired for that reorder context. The method also includes retiring the packets from the shared reorder buffer, based on the sequence numbers, in order with respect to each of the plurality of reorder contexts, but out of the global order for at least certain of the packets. | 10-23-2008 |
20110286463 | HIGH PERFORMANCE HARDWARE LINKED LIST PROCESSORS - In one embodiment, a reassign command is received for reassigning a first node identified by a first global identifier (GID) from a first context identified by a first context ID (CID) to a second context identified by a second CID, the first and second contexts representing first and second linked lists, respectively. A walk-the-chain (WTC) command having the first GID and the first CID is issued to a first linked list processor. The first linked list processor is configured to access one or more nodes of the first context in an attempt to dequeue the first node from the first context. An enqueue command having the first GID and the second CID is issued to a second linked list processor. The second linked list processor is configured to insert the first node to the second context. The first and second linked list processors are cascaded to form a pipeline. | 11-24-2011 |
20120079228 | DIGITAL COUNTER SEGMENTED INTO SHORT AND LONG ACCESS TIME MEMORY - A method performed in a memory controller for maintaining segmented counters split into primary and secondary memories, the primary memory faster. Events occur that require incrementing one of the segmented counters and the memory controller responds by incrementing a corresponding primary part in the primary memory. Each time a primary part is rolling over the memory controller determines that a secondary part should be updated. Also, the memory controller periodically determines that the secondary part of a segmented counter should be opportunistically updated. The opportunistic update is based on a probability function and a random number. The secondary part includes at least all of bits of the segmented counter not in the primary part and is stored in the secondary memory. Each time an update to the secondary part occurs, both the secondary part and primary part of the segmented counter must be updated. | 03-29-2012 |
Patent application number | Description | Published |
20090055944 | HUMAN MONOCLONAL ANTIBODIES TO BE PROGRAMMED DEATH LIGAND 1 (PD-L1) - The present disclosure provides isolated monoclonal antibodies, particularly human monoclonal antibodies that specifically bind to PD-L1 with high affinity. Nucleic acid molecules encoding the antibodies of this disclosure, expression vectors, host cells and methods for expressing the antibodies of this disclosure are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The disclosure also provides methods for detecting PD-L1, as well as methods for treating various diseases, including cancer and infectious diseases, using anti-PD-L1 antibodies. | 02-26-2009 |
20100330078 | ALPHA 5 - BETA 1 ANTIBODIES AND THEIR USES - The present disclosure provides isolated monoclonal antibodies, particularly human monoclonal antibodies, or antigen binding portions thereof, that specifically bind to integrin α5β1 with high affinity. Nucleic acid molecules encoding the antibodies of the disclosure, expression vectors, host cells and methods for expressing the antibodies of the disclosure are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies or antigen binding portions thereof are also provided. The disclosure also provides methods for treating various cancers using the anti-α5β1 antibodies or antigen binding portions thereof described herein. | 12-30-2010 |
20110209230 | Human Monoclonal Antibodies To Programmed Death Ligand 1 (PD-L1) - The present disclosure provides isolated monoclonal antibodies, particularly human monoclonal antibodies that specifically bind to PD-L1 with high affinity. Nucleic acid molecules encoding the antibodies of this disclosure, expression vectors, host cells and methods for expressing the antibodies of this disclosure are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The disclosure also provides methods for detecting PD-L1, as well as methods for treating various diseases, including cancer and infectious diseases, using anti-PD-L1 antibodies. | 08-25-2011 |
20120009622 | ALPHA5-BETA1 ANTIBODIES AND THEIR USES - The present disclosure provides isolated monoclonal antibodies, particularly human monoclonal antibodies, or antigen binding portions thereof, that specifically bind to integrin α5β1 with high affinity. Nucleic acid molecules encoding the antibodies of the disclosure, expression vectors, host cells and methods for expressing the antibodies of the disclosure are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies or antigen binding portions thereof are also provided. The disclosure also provides methods for treating various cancers using the anti-α5β1 antibodies or antigen binding portions thereof described herein. | 01-12-2012 |
20140154268 | ALPHA5-BETA1 ANTIBODIES AND THEIR USES - The present disclosure provides isolated monoclonal antibodies, particularly human monoclonal antibodies, or antigen binding portions thereof, that specifically bind to integrin α5β1 with high affinity. Nucleic acid molecules encoding the antibodies of the disclosure, expression vectors, host cells and methods for expressing the antibodies of the disclosure are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies or antigen binding portions thereof are also provided. The disclosure also provides methods for treating various cancers using the anti-α5β1 antibodies or antigen binding portions thereof described herein. | 06-05-2014 |
Patent application number | Description | Published |
20090183548 | METHOD AND APPARATUS FOR IN SITU TESTING OF GAS FLOW CONTROLLERS - Methods and apparatus utilize a rate of drop in pressure upstream of a gas flow controller (GFC) to accurately measure a rate of flow through the GFC. Measurement of the gas flow through the many gas flow controllers in production use today is enabled, without requiring any special or sophisticated pressure regulators or other special components. Various provisions ensure that none of the changes in pressure that occur during or after the measurement perturb the constant flow of gas through the GFC under test. | 07-23-2009 |
20090183549 | METHOD AND APPARATUS FOR IN SITU TESTING OF GAS FLOW CONTROLLERS - Methods and apparatus utilize a rate of drop in pressure upstream of a gas flow controller (GFC) to accurately measure a rate of flow through the GFC. Measurement of the gas flow through the many gas flow controllers in production use today is enabled, without requiring any special or sophisticated pressure regulators or other special components. Various provisions ensure that none of the changes in pressure that occur during or after the measurement perturb the constant flow of gas through the GFC under test. | 07-23-2009 |
20110011183 | METHOD AND APPARATUS FOR IN SITU TESTING OF GAS FLOW CONTROLLERS - Methods and apparatus utilize a rate of drop in pressure upstream of a gas flow controller (GFC) to accurately measure a rate of flow through the GFC. Measurement of the gas flow through the many gas flow controllers in production use today is enabled, without requiring any special or sophisticated pressure regulators or other special components. Various provisions ensure that none of the changes in pressure that occur during or after the measurement perturb the constant flow of gas through the GFC under test. | 01-20-2011 |
20110108126 | METHOD AND APPARATUS FOR GAS FLOW CONTROL - A method and apparatus for self-calibrating control of gas flow. The gas flow rate is initially set by controlling, to a high degree of precision, the amount of opening of a flow restriction, where the design of the apparatus containing the flow restriction lends itself to achieving high precision. The gas flow rate is then measured by a pressure rate-of-drop upstream of the flow restriction, and the amount of flow restriction opening is adjusted, if need be, to obtain exactly the desired flow. | 05-12-2011 |
20120304781 | METHOD AND APPARATUS FOR IN SITU TESTING OF GAS FLOW CONTROLLERS - Methods and apparatus utilize a rate of drop in pressure upstream of a gas flow controller (GFC) to accurately measure a rate of flow through the GFC. Measurement of the gas flow through the many gas flow controllers in production use today is enabled, without requiring any special or sophisticated pressure regulators or other special components. Various provisions ensure that none of the changes in pressure that occur during or after the measurement perturb the constant flow of gas through the GFC under test. A pressure regulator is coupled to a gas source. The GFC is positioned downstream of the pressure regulator. A pressure transducer is measuring pressure in a volume between the pressure regulator and the GFC, wherein means are provided for increasing the pressure in the volume. | 12-06-2012 |
20140366952 | METHOD AND APPARATUS FOR GAS FLOW CONTROL - A method and apparatus for self-calibrating control of gas flow. The gas flow rate is initially set by controlling, to a high degree of precision, the amount of opening of a flow restriction, where the design of the apparatus containing the flow restriction lends itself to achieving high precision. The gas flow rate is then measured by a pressure rate-of-drop upstream of the flow restriction, and the amount of flow restriction opening is adjusted, if need be, to obtain exactly the desired flow. | 12-18-2014 |
20140367596 | METHOD AND APPARATUS FOR GAS FLOW CONTROL - A method and apparatus for self-calibrating control of gas flow. The gas flow rate is initially set by controlling, to a high degree of precision, the amount of opening of a flow restriction, where the design of the apparatus containing the flow restriction lends itself to achieving high precision. The gas flow rate is then measured by a pressure rate-of-drop upstream of the flow restriction, and the amount of flow restriction opening is adjusted, if need be, to obtain exactly the desired flow. | 12-18-2014 |
Patent application number | Description | Published |
20100245022 | Electrically activated surface mount thermal fuse - A reflowable thermal fuse includes a conduction element with first and second ends, disposed within a housing. The reflowable thermal fuse also includes an elastic element disposed within the housing and adapted to apply force on the conduction element in an activated state of the reflowable thermal fuse. A restraining element is utilized to secure the elastic element and prevent the elastic element from applying force on the conduction element in an installation state of the reflowable thermal fuse. Application of an activating current through the restraining element causes the restraining element to break and thereby release the elastic element and place the reflowable thermal fuse in the activated state. | 09-30-2010 |
20100245027 | Reflowable thermal fuse - A reflowable thermal fuse includes a positive-temperature-coefficient (PTC) device that defines a first end and a second end, a conduction element that defines a first end and a second end in electrical communication with the second end of the PTC device, and a restraining element that defines a first end in electrical communication with the first end of the PTC device and a second end, in electrical communication with a second end of the conduction element. The restraining element is adapted to prevent the conduction element from coming out of electrical communication with the PTC device in an installation state of the thermal fuse. During a fault condition, heat applied to the thermal fuse diverts current flowing between the first end of the PTC device and the second end of the conduction element to the restraining element, causing the restraining element to release the conduction element and activate the fuse. | 09-30-2010 |
20110050384 | Termal fuse - A thermal fuse includes a first contact surface connected to a top surface of a sensor and a bottom surface connected to a bottom surface of the sensor. The sensor includes a mixture of Sn and Zn. The distance between the top surface and the bottom surface of the sensor is sized to substantially limit Zn depletion in a center region of the sensor when a temperature of the sensor is below a melting temperature of the sensor. The center region of the sensor prevents the first contact surface and the second contact surface from separating when the temperature of the sensor is below the melting temperature, and the first contact surface and the second contact surface are configured to separate when the temperature of the center region of the sensor exceeds the melting temperature of the sensor. | 03-03-2011 |
20120194958 | Three-Function Reflowable Circuit Protection Device - A circuit protection device includes a substrate with first and second electrodes connected to the circuit to be protected. The circuit protection device also includes a heater element between the first and second electrodes. A sliding contact is connected by a sensing element to the first electrode, second electrode, and heater element, thereby bridging and providing a conductive path between each. A spring element is held in tension by, and exerts a force parallel to a length of the substrate against, the sliding contact. A flux material is provided around the sensing element. Upon detection of an activation condition, the sensing element releases the sliding contact and the force exerted by the spring element moves the sliding contact to another location on the substrate at which the sliding contact no longer provides a conductive path between the first electrode, second electrode, and heater element. The flux allows the sliding contact to move without dragging the sensing material. | 08-02-2012 |
20130047421 | Reflowable Thermal Fuse - A reflowable thermal fuse includes a positive-temperature-coefficient (PTC) device that defines a first end and a second end, a conduction element that defines a first end and a second end in electrical communication with the second end of the PTC device, and a restraining element that defines a first end in electrical communication with the first end of the PTC device and a second end, in electrical communication with a second end of the conduction element. The restraining element is adapted to prevent the conduction element from coming out of electrical communication with the PTC device in an installation state of the thermal fuse. During a fault condition, heat applied to the thermal fuse diverts current flowing between the first end of the PTC device and the second end of the conduction element to the restraining element, causing the restraining element to release the conduction element and activate the fuse. | 02-28-2013 |
20130200984 | Reflowable Circuit Protection Device - A circuit protection device includes a substrate with first and second electrodes connected to the circuit to be protected. The circuit protection device also includes a heater element. A sensing element facilitates an electrical connection between the first and second electrodes. A flux material is provided around the sensing element. In a preferred embodiment, the flux contains a first component that is a polar material and a second component that is a non-polar material. A spring element exerts a force on the sensing element. The sensing element resists the force applied by the spring element. Upon detection of an activation, or fault, condition, the sensing element loses resilience and no longer resists the force exerted by the spring element, resulting in the spring element severing the electrical connection between the first and second electrodes. The flux allows the spring element to sever with electrical connection without dragging the sensing element. | 08-08-2013 |
20130286700 | Zero-Standby Current Switch for Control of a Power Converter - A controller circuit for activating and deactivating an electrical power converter that provides power to a device includes power input terminals on a primary side, and power output terminals on a secondary side, which are configured to provide power to the device. The controller circuit includes a detection circuit configured to determine whether the device is connected and, if connected, causes power to be routed to the electrical power converter to activate the electrical power converter. When the device is not detected, the electrical power converter is deactivated until the device is reconnected. | 10-31-2013 |
20130286701 | Zero-Standby Current Switch for Control of a Power Converter - A controller circuit for activating and deactivating an electrical power converter that provides power to a device includes power input terminals on a primary side, and power output terminals on a secondary side, which are configured to provide power to the device. The controller circuit includes a detection circuit configured to determine whether the device is connected and, if connected, causes power to be routed to the electrical power converter to activate the electrical power converter. When the device is not detected, the electrical power converter is deactivated until the device is reconnected. | 10-31-2013 |
20140035716 | Reflowable Circuit Protection Device - A circuit protection device includes a housing, which includes first and second electrodes. The device includes a conductive slider inside the housing. At a first location within the housing, the slider provides an electrical connection between the first and second electrodes. At a second location within the housing, the slider does not provide the electrical connection. A spring is secured to and stretched between the slider and an inner side of the housing such that the spring is held in tension in an expanded state. The slider is held at the first location by a solder between the slider and the first and second electrodes. After the device is armed, detection of an over-temperature condition causes the solder to begin to melt and the spring to compress and pull the slider to the second location within the housing, thus severing the electrical connection between the first and second electrodes. | 02-06-2014 |
20140139314 | Remote Activated Fuse and Circuit - A fuse includes first, second, and third terminals disposed on a substrate. Respective ends of one or more primary conductors of the fuse are connected to one of the first and the second terminals. The primary conductors have a first conductivity and are configured to open when a primary current between the first and the second terminals exceeds a first predetermined threshold. One or more secondary conductors have an end connected to the third terminal. The secondary conductors are configured to ignite when a secondary current through the secondary conductors exceeds a second predetermined threshold. When ignited, the secondary conductors open the primary conductors to thereby stop the primary current. | 05-22-2014 |
Patent application number | Description | Published |
20100054535 | Video Object Classification - Techniques for classifying one or more objects in at least one video, wherein the at least one video comprises a plurality of frames are provided. One or more objects in the plurality of frames are tracked. A level of deformation is computed for each of the one or more tracked objects in accordance with at least one change in a plurality of histograms of oriented gradients for a corresponding tracked object. Each of the one or more tracked objects is classified in accordance with the computed level of deformation. | 03-04-2010 |
20100054540 | Calibration of Video Object Classification - Techniques for calibrating a classification system, wherein one or more objects in at least one video are classified, are provided. At least one view associated with the at least one video is obtained. The at least one view is partitioned into at least one region. A given object is classified in accordance with its location in reference to the at least one region. In an additional embodiment, one or more object models are obtained. At least one normalized size of the one or more objects is defined within at least one view associated with the at least one video in accordance with the one or more object models. The one or more objects are classified in accordance with the at least one defined normalized size. | 03-04-2010 |
20110022549 | Presenting Search Results Based on User-Customizable Criteria - In one embodiment, ranking search results generated in response to search queries comprises: receiving, a search query from a user; identifying a plurality of network contents in response to the search query; determining one or more ranking criteria for the search query; presenting the ranking criteria to the user; receiving from the user one or more weights assigned to one or more of the ranking criteria; ranking the identified network contents based on the ranking criteria and the weights; and presenting the network contents to the user in an order according to their ranking. | 01-27-2011 |
20110040769 | Query-URL N-Gram Features in Web Ranking - In one embodiment, access one or more pairs of search query and clicked Uniform Resource Locator (URL). For each of the pairs of search query and clicked URL, segment the search query into one or more query segments and the clicked URL into one or more URL segments; construct one or more query-URL n-grams, each of which comprises a query part comprising at least one of the query segments and a URL part comprising at least one of the URL segments; and calculate one or more association scores, each of which for one of the query-URL n-grams and represents a similarity between the query part and the URL part of the query-URL n-gram and is based on a first frequency of the query part and the URL part, a second frequency of the query part, and a third frequency of the URL part. | 02-17-2011 |
20120257793 | VIDEO OBJECT CLASSIFICATION - Techniques for classifying one or more objects in at least one video, wherein the at least one video comprises a plurality of frames are provided. One or more objects in the plurality of frames are tracked. A level of deformation is computed for each of the one or more tracked objects in accordance with at least one change in a plurality of histograms of oriented gradients for a corresponding tracked object. Each of the one or more tracked objects is classified in accordance with the computed level of deformation. | 10-11-2012 |
20130251275 | CALIBRATION OF VIDEO OBJECT CLASSIFICATION - Techniques for calibrating a classification system, wherein one or more objects in at least one video are classified, are provided. At least one view associated with the at least one video is obtained. The at least one view is partitioned into at least one region. A given object is classified in accordance with its location in reference to the at least one region. In an additional embodiment, one or more object models are obtained. At least one normalized size of the one or more objects is defined within at least one view associated with the at least one video in accordance with the one or more object models. The one or more objects are classified in accordance with the at least one defined normalized size. | 09-26-2013 |
Patent application number | Description | Published |
20100188657 | SYSTEMS AND METHODS FOR DETECTING DEFECTS ON A WAFER - Systems and methods for detecting defects on a wafer are provided. One method includes generating output for a wafer by scanning the wafer with an inspection system using first and second optical states of the inspection system. The first and second optical states are defined by different values for at least one optical parameter of the inspection system. The method also includes generating first image data for the wafer using the output generated using the first optical state and second image data for the wafer using the output generated using the second optical state. In addition, the method includes combining the first image data and the second image data corresponding to substantially the same locations on the wafer thereby creating additional image data for the wafer. The method further includes detecting defects on the wafer using the additional image data. | 07-29-2010 |
20110263111 | GROUP III-NITRIDE N-TYPE DOPING - Group III-nitride N-type doping techniques are described. | 10-27-2011 |
20120044486 | Detecting Defects on a Wafer - Systems and methods for detecting defects on a wafer are provided. | 02-23-2012 |
20120235116 | LIGHT EMITTING DIODE WITH ENHANCED QUANTUM EFFICIENCY AND METHOD OF FABRICATION - One embodiment of a quantum well structure comprises an active region including active layers that comprise quantum wells and barrier layers wherein some or all of the active layers are p type doped. P type doping some or all of the active layers improves the quantum efficiency of III-V compound semiconductor light emitting diodes by locating the position of the P-N junction in the active region of the device thereby enabling the dominant radiative recombination to occur within the active region. In one embodiment, the quantum well structure is fabricated in a cluster tool having a hydride vapor phase epitaxial (HVPE) deposition chamber with a eutectic source alloy. In one embodiment, the indium gallium nitride (InGaN) layer and the magnesium doped gallium nitride (Mg—GaN) or magnesium doped aluminum gallium nitride (Mg—AlGaN) layer are grown in separate chambers by a cluster tool to avoid indium and magnesium cross contamination. Doping of group III-nitrides by hydride vapor phase epitaxy using group III-metal eutectics is also described. In one embodiment, a source is provided for HVPE deposition of a p-type or an n-type group III-nitride epitaxial film, the source including a liquid phase mechanical (eutectic) mixture with a group III species. In one embodiment, a method is provided for performing HVPE deposition of a p-type or an n-type group III-nitride epitaxial film, the method including using a liquid phase mechanical (eutectic) mixture with a group III species. | 09-20-2012 |
20120268735 | Systems and Methods for Detecting Defects on a Wafer - Systems and methods for detecting defects on a wafer are provided. One method includes generating output for a wafer by scanning the wafer with an inspection system using first and second optical states of the inspection system. The first and second optical states are defined by different values for at least one optical parameter of the inspection system. The method also includes generating first image data for the wafer using the output generated using the first optical state and second image data for the wafer using the output generated using the second optical state. In addition, the method includes combining the first image data and the second image data corresponding to substantially the same locations on the wafer thereby creating additional image data for the wafer. The method further includes detecting defects on the wafer using the additional image data. | 10-25-2012 |
20130250287 | Systems and Methods for Detecting Defects on a Wafer - Systems and methods for detecting defects on a wafer are provided. One method includes generating output for a wafer by scanning the wafer with an inspection system using first and second optical states of the inspection system. The first and second optical states are defined by different values for at least one optical parameter of the inspection system. The method also includes generating first image data for the wafer using the output generated using the first optical state and second image data for the wafer using the output generated using the second optical state. In addition, the method includes combining the first image data and the second image data corresponding to substantially the same locations on the wafer thereby creating additional image data for the wafer. The method further includes detecting defects on the wafer using the additional image data. | 09-26-2013 |
Patent application number | Description | Published |
20080285435 | INTELLIGENT FAILBACK IN A LOAD-BALANCED NETWORKING ENVIRONMENT - One embodiment of the present invention sets forth a method for failing back network connections to a network interface card (NIC) within a computing device. The method includes the steps of monitoring a failed or unreliable NIC within the computing device, determining that the failed or unreliable NIC has recovered, determining that a functional NIC within the computing device is overloaded, selecting a first connection set communicating through the overloaded NIC, and transferring the first connection set to the recovered NIC. With this approach, intelligent decisions can be advantageously made regarding whether to fail back a network connection set to a recovered NIC based on the traffic loads on the overloaded NIC and the recovered NIC. Such an approach to balancing network traffic across the functional NICs within a computing device may substantially improve overall performance relative to prior art techniques. | 11-20-2008 |
20080285441 | INTELLIGENT LOAD BALANCING AND FAILOVER OF NETWORK TRAFFIC - A hash engine in a network device driver maintains data on the utilization and error rate for each network interface card (“NIC”) within a local computing device. From this data, the hash engine intelligently selects transmit NICs and receive NICs based on various networking parameters provided from a software driver program. Transmit packets sent from the operating system in a local computing device to a remote computing device are intercepted, modified and redirected to transmit NICs selected by the hash engine for transmission to remote computing devices. Similarly, address resolution protocol (“ARP”) response packets sent by the operating system in response to ARP request packets are intercepted, modified and redirected to receive NICs selected by the hash engine for transmission. By selecting receive NICs and transmit NICs in this fashion, the hash engine is able to intelligently load balance transmit and receive traffic in the local computing device, thereby improving overall network performance relative to prior art techniques. | 11-20-2008 |
20080285448 | INTELLIGENT LOAD BALANCING AND FAILOVER OF NETWORK TRAFFIC - A hash engine in a network device driver maintains data on the utilization and error rate for each network interface card (“NIC”) within a local computing device. From this data, the hash engine intelligently selects transmit NICs and receive NICs based on various networking parameters provided from a software driver program. Transmit packets sent from the operating system in a local computing device to a remote computing device are intercepted, modified and redirected to transmit NICs selected by the hash engine for transmission to remote computing devices. Similarly, address resolution protocol (“ARP”) response packets sent by the operating system in response to ARP request packets are intercepted, modified and redirected to receive NICs selected by the hash engine for transmission. By selecting receive NICs and transmit NICs in this fashion, the hash engine is able to intelligently load balance transmit and receive traffic in the local computing device, thereby improving overall network performance relative to prior art techniques. | 11-20-2008 |
20080285472 | INTELLIGENT FAILOVER IN A LOAD-BALANCED NETWORK ENVIRONMENT - A hash table in the network device driver maintains data on the traffic characteristics for each network interface (“NIC”) within a computing device. If one of the NICs in the computing device becomes unreliable, the cost function in the hash engine allows the software driver to initiate network traffic redistribution among the remaining reliable NICs in the computing device. Using this hash engine, the software driver is able to intelligently redirect each of the network connections on an unreliable NIC to a reliable NIC within the computing device, in a way that optimizes the distribution of network traffic across the remaining reliable NICs. Alternatively, if a connection is moved from an old NIC to a new NIC, the software driver can detect the moved connection and offload the moved connection to a hardware offload engine on the new NIC. With this approach, issues such as network interface overloading and computing device performance degradation may be more easily avoided when failing over network connections, thereby improving overall system performance relative to prior art techniques. | 11-20-2008 |
20080285552 | INTELLIGENT FAILOVER IN A LOAD-BALANCED NETWORKING ENVIRONMENT - A hash table in the network device driver maintains data on the traffic characteristics for each network interface (“NIC”) within a computing device. If one of the NICs in the computing device becomes unreliable, the cost function in the hash engine allows the software driver to initiate network traffic redistribution among the remaining reliable NICs in the computing device. Using this hash engine, the software driver is able to intelligently redirect each of the network connections on an unreliable NIC to a reliable NIC within the computing device, in a way that optimizes the distribution of network traffic across the remaining reliable NICs. Alternatively, if a connection is moved from an old NIC to a new NIC, the software driver can detect the moved connection and offload the moved connection to a hardware offload engine on the new NIC. With this approach, issues such as network interface overloading and computing device performance degradation may be more easily avoided when failing over network connections, thereby improving overall system performance relative to prior art techniques. | 11-20-2008 |
20080285553 | INTELLIGENT LOAD BALANCING AND FAILOVER OF NETWORK TRAFFIC - A hash engine in a network device driver maintains data on the utilization and error rate for each network interface card (“NIC”) within a local computing device. From this data, the hash engine intelligently selects transmit NICs and receive NICs based on various networking parameters provided from a software driver program. Transmit packets sent from the operating system in a local computing device to a remote computing device are intercepted, modified and redirected to transmit NICs selected by the hash engine for transmission to remote computing devices. Similarly, address resolution protocol (“ARP”) response packets sent by the operating system in response to ARP request packets are intercepted, modified and redirected to receive NICs selected by the hash engine for transmission. By selecting receive NICs and transmit NICs in this fashion, the hash engine is able to intelligently load balance transmit and receive traffic in the local computing device, thereby improving overall network performance relative to prior art techniques. | 11-20-2008 |
20120155249 | TECHNIQUE FOR IDENTIFYING A FAILED NETWORK INTERFACE CARD WITHIN A TEAM OF NETWORK INTERFACE CARDS - A method for identifying a failed network interface card in a system having two NICs configured as a team includes the steps of transmitting a first data packet from the first NIC to a third NIC, wherein the third NIC is not a member of the team, and transmitting a second data packet from the first NIC to the second NIC or from the second NIC to the third NIC, depending on whether the third NIC responds to the transmission of the first data packet. One advantage of the disclosed method is that it specifically identifies which NIC within the team has failed, which is something that cannot be determined by simply exchanging packets between the two NICs. | 06-21-2012 |
Patent application number | Description | Published |
20110192229 | MICRO ELECTRICAL MECHANICAL MAGNETIC FIELD SENSOR UTILIZING MODIFIED INERTIAL ELEMENTS - A micro electrical-mechanical system (MEMS) is disclosed. The MEMS includes a substrate, a first pivot extending upwardly from the substrate, a first lever arm with a first longitudinal axis extending above the substrate and pivotably mounted to the first pivot for pivoting about a first pivot axis, a first capacitor layer formed on the substrate at a location beneath a first capacitor portion of the first lever arm, a second capacitor layer formed on the substrate at a location beneath a second capacitor portion of the first lever arm, wherein the first pivot supports the first lever arm at a location between the first capacitor portion and the second capacitor portion along the first longitudinal axis, and a first conductor member extending across the first longitudinal axis and spaced apart from the first pivot axis. | 08-11-2011 |
20130015536 | MEMS WITH SINGLE USE VALVE AND METHOD OF OPERATIONAANM Feyh; AndoAACI Palo AltoAAST CAAACO USAAGP Feyh; Ando Palo Alto CA USAANM Chen; Po-JuiAACI SunnyvaleAAST CAAACO USAAGP Chen; Po-Jui Sunnyvale CA US - In one embodiment, a method of opening a passageway to a cavity includes providing a donor portion, forming a heating element adjacent to the donor portion, forming a first sacrificial slab abutting the donor portion, wherein the donor portion and the sacrificial slab are a shrinkable pair, forming a first cavity, a portion of the first cavity bounded by the first sacrificial slab, generating heat with the heating element, forming a first reduced volume slab from the first sacrificial slab using the generated heat and the donor portion, and forming a passageway to the first cavity by forming the first reduced volume slab. | 01-17-2013 |
20130181575 | Piezoelectric Based MEMS Structure - In one embodiment, a method of deforming a MEMS structure includes providing a base layer, providing a first piezoelectric slab operably connected to a surface of the base layer, determining a desired deformation of the base layer, applying a first potential to a first electrode operably connected to the first piezoelectric slab, applying a second potential to a second electrode operably connected to the first piezoelectric slab, and deforming the base layer with the first piezoelectric slab using the applied first potential and the applied second potential based upon the determined desired deformation. | 07-18-2013 |
20140035071 | Substrate with Multiple Encapsulated Devices - A device with multiple encapsulated functional layers, includes a substrate, a first functional layer positioned above a top surface of the substrate, the functional layer including a first device portion, a first encapsulating layer encapsulating the first functional layer, a second functional layer positioned above the first encapsulating layer, the second functional layer including a second device portion, and a second encapsulating layer encapsulating the second functional layer. | 02-06-2014 |
20140150552 | Chip Level Sensor with Multiple Degrees of Freedom - A sensing assembly device includes a substrate, a chamber above the substrate, a first piezoelectric gyroscope sensor positioned within the chamber, and a first accelerometer positioned within the chamber. | 06-05-2014 |
Patent application number | Description | Published |
20090184904 | System and Method for Backlight Control for An Electronic Display - The present invention discloses apparatus and techniques relating to the intelligent control of a display's backlight LED strings. The present invention provides for controlling the display intensity on a region-by-region basis and for adjusting the intensity multiple times within the duration of a frame. The present invention also provides backlight adjustment in a manner that emphasizes certain colors and deemphasizes certain colors. The present invention also provides for adjustment of the backlight based on the ambient temperature. | 07-23-2009 |
20100333161 | SYSTEM AND METHOD FOR RECORDING AND TIME-SHIFTING PROGRAMMING IN A TELEVISION DISTRIBUTION SYSTEM WITH LIMITED CONTENT RETENTION - Various embodiments of the disclosed subject matter provide methods and systems to record broadcast programming for at least one television channel for a period of time, wherein the recording is performed upstream from subscribers in a television distribution system, and further including after the period of time, keeping recorded programming by request from at least one subscriber. And further wherein the request is for at least one television program contained in the recorded programming or for a time window for a particular channel. According to another embodiment a subscriber requests that broadcast programming be saved for the subscriber upstream from the subscriber in a television distribution system, and wherein the subscriber may request the programming be saved for later viewing by the subscriber between the time the programming was broadcast and a later point in time. | 12-30-2010 |
20110012609 | METHOD AND APPARTUS FOR SUB-ASSEMBLY ERROR DETECTION IN HIGH VOLTAGE ANALOG CIRCUITS AND PINS - The innovation relates to systems and/or methodologies for error detection during sub-assembly in high voltage analog circuits. A signal driver communicates test signals to one or more high voltage analog circuits, and a state machine compares the electrical and/or thermal responses of the high voltage analog circuits to a set of predetermined expected results (e.g., signatures). The signal driver and state machine can be incorporated into the high voltage analog circuits. The expected results can be stored in the target circuits in the form of look-up tables, matrices, and so forth. Errors, such as, dry solders and bridge solders can be determined based on the comparison of the obtained responses to the expected signatures. | 01-20-2011 |
20120072966 | SYSTEM AND METHOD FOR RECORDING AND TIME-SHIFTING PROGRAMMING IN A TELEVISION DISTRIBUTION SYSTEM WITH LIMITED CONTENT RETENTION - Various embodiments of the disclosed subject matter provide methods and systems to record broadcast programming for at least one television channel for a period of time, wherein the recording is performed upstream from subscribers in a television distribution system, and further including after the period of time, keeping recorded programming by request from at least one subscriber. And further wherein the request is for at least one television program contained in the recorded programming or for a time window for a particular channel. According to another embodiment a subscriber requests that broadcast programming be saved for the subscriber upstream from the subscriber in a television distribution system, and wherein the subscriber may request the programming be saved for later viewing by the subscriber between the time the programming was broadcast and a later point in time. | 03-22-2012 |
20130263196 | SYSTEM AND METHOD FOR RECORDING AND TIME-SHIFTING PROGRAMMING IN A TELEVISION DISTRIBUTION SYSTEM WITH LIMITED CONTENT RETENTION - Various embodiments of the disclosed subject matter provide methods and systems to record broadcast programming for at least one television channel for a period of time, wherein the recording is performed upstream from subscribers in a television distribution system, and further including after the period of time, keeping recorded programming by request from at least one subscriber. And further wherein the request is for at least one television program contained in the recorded programming or for a time window for a particular channel. According to another embodiment a subscriber requests that broadcast programming be saved for the subscriber upstream from the subscriber in a television distribution system, and wherein the subscriber may request the programming be saved for later viewing by the subscriber between the time the programming was broadcast and a later point in time. | 10-03-2013 |
20140298372 | SYSTEM AND METHOD FOR RECORDING AND TIME-SHIFTING PROGRAMMING IN A TELEVISION DISTRIBUTION SYSTEM USING POLICIES - Various embodiments of the disclosed subject matter provide methods and systems to store a policy specifying rules relating to recording, storage or delivery of broadcast programming to a consumer of such programming, and to record, store or deliver broadcast programming in response to a rule. According to an example embodiment, a method and system provide for a subscriber requesting that a broadcast television program be saved for the subscriber upstream from the subscriber in a television distribution system, and that the program offered to the subscriber for saving is determined based on a policy established for the program. According to another example embodiment a system provides a computing device including a computer program to control the recording or delivery of a broadcast television program in accordance with a policy established to control the recording or delivery of the broadcast television program. | 10-02-2014 |
Patent application number | Description | Published |
20110106501 | AUTOMATED DESIGN OF AN IT INFRASTRUCTURE - A method for automated design of an IT infrastructure, includes a) identifying IT equipment to support services to be provided to meet one or more user requirements; b) identifying one or more auxiliary infrastructures to meet requirements of the identified computer equipment; c) synthesizing the IT equipment and the one or more auxiliary infrastructures to generate a candidate design; d) analyzing one or more operating characteristics of the candidate design; e) repeating steps a)-d) on at least one additional candidate design that differs from the candidate design generated at step c); and f) storing at least one of the candidate design and the at least one additional candidate design. | 05-05-2011 |
20120109605 | MANAGING AN INFRASTRUCTURE - In a method for managing an infrastructure, a utilization of a plurality of infrastructure components in performing an objective is simulated. In addition, a resource demand for the infrastructure associated with the simulated utilization of the infrastructure components is determined and a supply of resources by a plurality of available sources to meet the determined resource demand is simulated. Moreover, at least one metric associated with the determined resource demand and the simulated supply of resources by the plurality of available sources is determined. | 05-03-2012 |
20120109619 | GENERATING A RESOURCE MANAGEMENT PLAN FOR AN INFRASTRUCTURE - In a method for generating a resource management plan for an infrastructure, a resource supply available from a combination of resource sources is determined, an operation of the infrastructure in performing an objective using the determined supply of resources is simulated, in which the simulation is to simulate resource demand of a plurality of infrastructure components in performing the objective, a metric(s) associated with operating the infrastructure based upon the simulation is determined, a determination as to whether the metric(s) satisfies a predetermined goal(s) is made, the resources supplied and/or the simulation of the resource demand of the plurality of infrastructure components is modified in response to the at least one metric failing to satisfy the predetermined goal(s), and a resource management plan for the infrastructure that has been determined to result in the metric(s) satisfying the predetermined goal(s) is generated. | 05-03-2012 |
20120221373 | Estimating Business Service Responsiveness - An embodiment includes gathering input data including observed utilizations of allocations and business service response times. The input data is partitioned into a plurality of data sets that include at least one training data set and at least one test data set. A model is generated that predicts responsiveness using the at least one training data set. The model is evaluated using the at least one test data set, and a business service response time distribution is predicted using the model. An embodiment may use a trace-based capacity planning methodology to estimate the impact of planning alternatives on business service responsiveness. | 08-30-2012 |
20120265881 | PROVISIONING DATA CENTER RESOURCES - Example methods, apparatus and articles of manufacture to provision data center resources are disclosed. An example method includes provisioning a first portion of data center resources to operate during time intervals based on a base workload for the respective time intervals, the base workload being based on data patterns of a data center and configuring a second portion of the data center resources to operate when an actual workload exceeds a threshold corresponding to the base workload. | 10-18-2012 |
20120297385 | INTERACTIVE SERVICE MANAGEMENT - In one implementation, an interactive service management system includes a performance profile module and a performance evaluation module. The performance profile modules defines a performance measure of an interactive service based on a quality assessment associated with the interactive service. The performance evaluation module compares the performance measure with performance target associated with the interactive service, and modifies the performance target associated with the interactive service based on the comparison of the performance measure and the performance target. | 11-22-2012 |
20130132009 | SYSTEMS AND METHODS FOR APPORTIONING POWER CONSUMPTION - The present disclosure includes a system and method for apportioning power consumption. In an example of apportioning power consumption according to the present disclosure, a transaction mix for a service is determined ( | 05-23-2013 |
20130227317 | POWER MANAGEMENT - A method for power management may include collecting data related to resource utilization and process information from a server. The method may further include using the collected data to generate use and state models respectively based on use and state categories of the server. The method may also include determining a state condition of the server through use of the generated use and state models to manage power utilization of the server. | 08-29-2013 |
20130275084 | ESTIMATING A METRIC RELATED TO A SERVICE DEMAND USING A DEFINED FRAMEWORK - In a method for estimating a metric related to a service demand, a framework to be used in evaluating a services ecosystem or a services infrastructure is defined. The framework comprises a matrix of elements, in which the elements comprise a plurality of services and a plurality of services components that are usable in delivering at least one of the plurality of services. In addition, dependencies between the matrix elements are determined using initialization data and the metric related to the service demand is estimated through use of the framework. | 10-17-2013 |
20130278623 | PROVIDING A CORRELATION RING FOR INDICATING CORRELATION BETWEEN ATTRIBUTES - Pixels representing attributes of data records are into discrete rings of a graphical visualization, where the discrete rings correspond to respective ones of the attributes, and where the pixels are arranged in each of the discrete rings according to time intervals of the data records. A correlation ring is provided in the graphical visualization in addition to the discrete rings, where the correlation ring has visual indicators for indicating degrees of correlation between at least two of the attributes. | 10-24-2013 |
20130290047 | FACILITATING ASSESSMENT OF A SERVICE THROUGH USE OF USER ASSIGNED WEIGHTS - In a method for facilitating assessment of a service, values of a plurality of metrics corresponding to the service are acquired. In addition, weights that a user has respectively assigned to each of the plurality of metrics are acquired and a service-level metric value for the service is calculated through calculation of a function that statistically evaluates the weights respectively assigned to the plurality of metrics and the acquired values of the plurality of metrics. | 10-31-2013 |
20130290074 | BENCHMARKING SUSTAINABILITY OF SERVICE PROVIDERS - A method of benchmarking a sustainability for service providers using a program having executable computer-readable instructions first includes selecting a plurality of service providers to evaluate for sustainability. A report is received from each of the selected service providers which includes at least one reported value characteristic having a value metric and at least one reported cost characteristic having a cost metric. The reported cost and value characteristics are compared to select at least one common value characteristic and at least one common cost characteristic each of which is common among the selected service providers. A service sustainability relationship is then computed as a function of the at least one common value characteristic and the at least one common cost characteristic to benchmark the sustainability of each of the selected service providers relative to one another. | 10-31-2013 |
20130290511 | MANAGING A SUSTAINABLE CLOUD COMPUTING SERVICE - A method for managing a cloud using a cloud controller and a sustainability metrics manager having executable computer-readable instructions stored on a database first includes receiving a request from a cloud user to implement a new cloud service having at least one service characteristic. Once the request is received, the controller computes a prediction of a first sustainability impact based on the service characteristic for an implementation of the cloud service on a high quality of service (QoS) server operating in the cloud, and also computes a prediction of a second sustainability impact based on the service characteristic for an implementation of the cloud service on a high sustainability server operating in the cloud. The controller then presents the first and second predicted sustainability impacts to the cloud user so that the cloud user can make an informed decision with regard to the new cloud service request. | 10-31-2013 |
20130346247 | Recommending Options Based on Sustainability Metrics - Recommending options based on sustainability metrics includes identifying multiple end to end service delivery options, each of the end to end service delivery options having a kind of service, an application service provider to provide the kind of service, and a client device; calculating a sustainability value for each of the end to end service delivery options, and recommending one of the end to end service delivery options based on the sustainability value. | 12-26-2013 |
20140040474 | MAXIMIZING SERVER UTILIZATION WITHIN A DATACENTER - A method of maximizing server utilization within a datacenter comprising collocating a number of workloads to a subset of a number of physical servers within a datacenter, adjusting access to resources by critical and non-critical workloads, isolating a number of critical workloads that share resources to the subset of resource instances, and controlling resource utilization of the collocated workloads. A system for collocating workloads in a datacenter, the system comprising a number of servers communicatively coupled to each other and a collocation module that receives information from each server and decides whether to leave a workload running on one of any of the servers on that server, or migrate a workload running on one of the number of servers to another server. | 02-06-2014 |
20140040899 | SYSTEMS AND METHODS FOR DISTRIBUTING A WORKLOAD IN A DATA CENTER - A data center workload distribution management system includes a cooling cost engine to determine a cooling cost or cooling capacity for each of a plurality of zones of a data center and a workload distribution engine. The workload distribution engine is to identify the zone that has a lowest cooling cost and sufficient cooling capacity and also has sufficient processing capacity for a workload, determine a local cooling efficiency index for at least one location within the identified zone, and distribute the workload to the location having a local cooling efficiency index that indicates the highest cooling efficiency. | 02-06-2014 |
20140236680 | SERVICE SUSTAINABILITY SYSTEMS AND METHODS - A service sustainability system and method. An example method may include identifying service-level factors for providing a service. The method may also include identifying dependencies between the service-level factors. The method may also include determining service-level resource consumption based on information corresponding to the service-level factors and dependencies between the service-level factors. | 08-21-2014 |
20140257907 | GENERATING A CAPACITY SCHEDULE FOR A FACILITY - In a method for generating a capacity schedule for a facility to meet a predefined operational goal, in which the facility is to receive resources from a first resource supply, a prediction of a supply of resources available from the first resource supply for a predetermined period of time is accessed. In addition, a prediction of a demand for resources in the facility during the predetermined period of time is accessed. The prediction of the supply of resources and the prediction of the demand for resources are inputted into a constrained optimization problem and the capacity schedule for the facility is generated by finding a solution to the constrained optimization problem. | 09-11-2014 |
20140282503 | WEIGHT-BASED COLLOCATION MANAGEMENT - According to an example, an application performance measurement for an application for a current time interval, a performance specification for the application, and a resource consumption metric for a resource of a plurality of resources that are to process the application for the current time interval may be accessed. In addition, the application performance measurement, the performance specification, and the resource consumption metric may be used to determine a resource specification for a next time interval for the resource of the plurality of resources. Moreover, the resource specification may be used to determine, by a processor, a resource weight for the resource of the plurality of resources for the next time interval. | 09-18-2014 |
20140324535 | POWER INFRASTRUCTURE SIZING AND WORKLOAD MANAGEMENT - According to an example, power infrastructure sizing and workload management of an entity may include receiving power supply and information technology (IT) workload demand input parameter specifications for the entity, and using the power supply and IT workload demand input parameter specifications for a power infrastructure sizing and workload management model for the entity. The power infrastructure sizing and workload management model may be used to generate power supply and IT workload demand output parameter specifications for the entity. | 10-30-2014 |
20150066225 | GENERATING A DEMAND RESPONSE FOR AN ENERGY-CONSUMING FACILITY - A demand response for an energy-consuming facility is disclosed. A demand response is generated by estimating a likelihood of a coincident peak time period, modeling workloads to be scheduled in the energy-consuming facility, determining a workload schedule based on the likelihood of the coincident peak time period and a plurality of utility charging rates, and scheduling the workloads for execution in the energy-consuming facility according to the determined workload schedule. | 03-05-2015 |
Patent application number | Description | Published |
20090230088 | FORMING A PRINT HEAD WITH A THIN MEMBRANE - A microfabricated device and method for forming a microfabricated device are described. A thin membrane including silicon is formed on a silicon body by bonding a silicon-on-insulator substrate to a silicon substrate. The handle and insulator layers of the silicon-on-insulator substrate are removed, leaving a thin membrane of silicon bonded to a silicon body such that no intervening layer of insulator material remains between the membrane and the body. A piezoelectric layer is bonded to the membrane. | 09-17-2009 |
20110092049 | METHOD AND APPARATUS FOR SUBSTRATE BONDING - Methods for bonding a first substrate to a second substrate are described. A surface of the first substrate is coated with an adhesive layer. The adhesive layer is cured to b-stage. The surface of the first substrate is positioned in contact with the second substrate. An edge of the first substrate is pressed to an edge of the second substrate to initiate Van der Waals bonding. The first and second substrates are allowed to come together by Van der Waals bonding. The bonded first and second substrates are subjected to a sufficient heat for a sufficient time period to cure completely the adhesive layer. | 04-21-2011 |
20110109694 | Thermal Oxide Coating On A Fluid Ejector - A fluid ejection module includes a flow-path body, a first oxide layer, a membrane, and a second oxide layer. The flow-path body has a first outer surface and an opposing second outer surface and a plurality of flow paths, each flow path extending at least from the first outer surface to the second outer surface. The first oxide layer coats at least an interior surface of each of the flow paths and the first and second outer surfaces of the flow-path body and has a thickness that varies by less than 5% along {100} planes. The membrane has a first outer surface. The second oxide layer is coated on the first outer surface of the membrane and has a thickness that varies by less than 5% along {100} planes and is bonded to the first oxide layer. | 05-12-2011 |
20110115341 | Insulated Film Use in a Mems Device - A method of forming an actuator and an actuable device formed by this method are disclosed. This method includes depositing a photoimageable material to form a first photoimageable layer on a piezoelectric layer; patterning the first photoimageable layer to form an aperture; and disposing a first conductive layer on the first photoimageable layer. The first conductive layer partially overlies the first photoimageable layer such that a first portion of the first conductive layer contacts the first photoimageable layer and a second portion of the first conductive layer electrically contacts the piezoelectric layer in the aperture. | 05-19-2011 |
20110168317 | Controlled Bond Wave Over Patterned Wafer - A method of bonding two substrates includes placing a separating member between a first substrate and a second substrate, applying pressure to the first substrate to initiate a bond wave between the first substrate and the second substrates with the separating member between the first substrate and the second substrate, and controlling movement of the bond wave by translating the separating member away from a center of the first substrate or the second substrate. | 07-14-2011 |
20130210175 | Forming a Device Having a Curved Piezoelectric Membrane - Processes for forming an actuator having a curved piezoelectric membrane are disclosed. The processes utilize a profile-transferring substrate having a curved surface surrounded by a planar surface to form the curved piezoelectric membrane. The piezoelectric material used for the piezoelectric actuator is deposited on at least the curved surface of the profile-transferring substrate before the profile-transferring substrate is removed from the underside of the curved piezoelectric membrane. The resulting curved piezoelectric membrane includes grain structures that are columnar and aligned, and all or substantially all of the columnar grains are locally perpendicular to the curved surface of the piezoelectric membrane. | 08-15-2013 |