| Patent application number | Description | Published |
| 20110087824 | FLASH MEMORY ACCESSING APPARATUS AND METHOD THEREOF - A flash memory accessing apparatus is disclosed. The flash memory accessing apparatus includes a controller, a first channel memory set and a second channel memory set. The first channel memory set includes a first flash memory and at least one first memory expanding socket. The second channel memory set includes a second flash memory and at least one second memory expanding socket. The controller determines the accessing method to be implemented on the first memory and second flash memory according to whether there is any flash memory inserted into the first memory expanding socket and the second memory expanding socket. | 04-14-2011 |
| 20110087826 | FLASH MEMORY ACCESSING APPARATUS AND ACCESSING METHOD THEREOF - A flash memory accessing apparatus is disclosed. The flash memory accessing apparatus includes a memory controller, a first open NAND flash interface (ONFI) and an expanding flash memory module. The first ONFI is used for connecting a main flash memory module. The memory controller obtains a detecting result by, detecting whether the main flash memory module and the expanding flash memory module are single side or double side. The memory controller further configures an accessing method of the main flash memory module and the expanding flash memory module according to the detecting result. | 04-14-2011 |
| 20110113265 | CIRCUIT SYSTEM AND CONTROL METHOD THEREOF - A circuit system is provided, including a processing unit, a control unit electrically connected to the processing unit, and a plurality of PWM units electrically connected to the control unit. The processing unit transmits a control signal to the control unit according to a load current value of the circuit system, and the control unit enables at least one of the PWM units according to the control signal. | 05-12-2011 |
| Patent application number | Description | Published |
| 20100246383 | Motherboard with backup network circuit - A motherboard includes at least one backup network circuit except for a network circuit used in a normal setup. The motherboard includes a first network circuit, a second network circuit, a network port, a switch circuit and a driver. The switch circuit is configured for coupling the first network circuit or the second network circuit to the network port. The driver is configured for switching the switch circuit according to states of the network port and the first network circuit. | 09-30-2010 |
| 20100250822 | Motherboard with Backup Chipset - A motherboard includes a first chipset, a second chipset, a central processing unit (CPU), a low-speed bus, a first switch circuit and a second switch circuit. In a normal setup, the first switch circuit is coupled to the first chipset and the CPU, and the second switch circuit is coupled to the first chipset and the low-speed bus. In a backup setup, the first switch circuit is coupled to the second chipset and the CPU, and the second switch circuit is coupled to the second chipset and the low-speed bus. The motherboard of the present invention further comprises a switch-circuit control unit or a driver configured for switching the first and second switch circuits to be in the backup setup when the first chipset is damaged in the normal setup. | 09-30-2010 |
| 20110010485 | Flash Memory Control Device - A flash memory control device includes a controller and an expansion device. The expansion device is electrically connected to the controller and one and more flash memory devices for temporarily storing data, integrating data and presenting processing status, wherein the controller orders the expansion device to transform data to the one and more flash memory devices or receive data from the one and more flash memory devices according to processing status. | 01-13-2011 |
| 20110022831 | Method for Operation System Startup - A method for operation system startup includes steps of switching on hardware startup; determining whether there is a trigger signal; reading an initial parameter from a storage device, and loading the initial parameter into a startup program when there is no trigger signal, executing the startup program; and entering operational system. | 01-27-2011 |
| Patent application number | Description | Published |
| 20090144460 | System for detecting a peripheral device - A system for detecting a peripheral device is used to detect whether the peripheral device is completely inserted into a peripheral interface slot of a mother board before booting. When the peripheral device is inserted into the peripheral interface slot, the system judges whether the peripheral device is completely inserted into the peripheral interface slot according to a potential of fins of the peripheral interface slot. If the system detects that the peripheral device has not been completely inserted into the peripheral interface slot before booting, a booting procedure of the mother board is interrupted and an alarm signal is output. | 06-04-2009 |
| 20090144535 | Method for automatically restoring system configuration with a single key - A method for automatically restoring a system configuration with a single key in a computer having a power button is provided. The method includes detecting a press mode of the power button; determining a relevant restoring item according to the press mode; performing a process for restoring the system configuration corresponding to the restoring item, which aims at updating/recovering the system configuration, or clearing the system configuration setting stored in a CMOS memory; and performing a normal boot process. | 06-04-2009 |
| 20090172427 | Method and system for power management of a motherboard - A method for power management of a motherboard is provided to manage a power supply on the motherboard and specially to manage an output power of a power management module on the mother board. The motherboard at least comprises a microprocessor, and the power management module provides a power with a number of output phases to the microprocessor. First, a first load of the microprocessor is detected in a first time. Then a second load of the microprocessor in a second time is detected. When the second load is less than the first load and is lower than a first predetermined value, the number of output phases of the power outputted from the power management module is reduced. | 07-02-2009 |