Chen, Pingtung County
Bi-Hsien Chen, Pingtung County TW
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20080265781 | LIGHT SOURCE MODULE - A light source module including a circuit substrate, light emitting chip packages, and driving devices is provided. The circuit substrate has a top surface and a bottom surface opposite to the top surface. The bottom surface has at least one component installed area and at least one metal exposed area. The light emitting chip packages are disposed on the top surface. The driving devices are disposed in the component installed area. The driving devices are electrically connected to the light emitting chip packages through the circuit substrate. | 10-30-2008 |
20080284692 | METHOD FOR CONTROLLING BACKLIGHT APPARATUS AND LUMINANCE CONTROL CIRCUIT THEREOF - A luminance control circuit including a detection unit, a control unit and a current adjustor is provided. The detection unit detects a working current of each light emitting module and produces detection signals to be transmitted to the control unit. The control unit produces control signals according to the detection signals to be transmitted to the current adjustor. The current adjustor adjusts each of the working currents of each of the light emitting modules according to the control signals. | 11-20-2008 |
20090295298 | LIGHT SOURCE DRIVING CIRCUIT - A light source driving circuit includes a power supply circuit, a first dimming circuit, and a control circuit. The power supply circuit has a control terminal and an output terminal that is connected to a terminal of a first light-emitting element. The first dimming circuit has a first terminal connected to the other terminal of the first light-emitting element, a second terminal connected to a common potential, and a pulse width signal input terminal. The control circuit is connected between the pulse width input terminal of the first dimming circuit and the control terminal of the power supply circuit. The first dimming circuit determines an ON/OFF state according to a logic state of the pulse width signal. The power supply circuit determines whether or not to output the voltage. The control circuit delays the power supply circuit, turns off the power supply circuit, and delays the first dimming circuit. | 12-03-2009 |
Chee-Cheng Chen, Pingtung County TW
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20110301737 | INSTANT PRODUCTION PERFORMANCE IMPROVING METHOD - The invention discloses a real-time production performance improving method comprising a real-time monitoring step, a performance satisfaction determination step and a real-time performance improving step. The real-time monitoring step monitors an operation status of a production machine via a monitoring unit, records the monitored operation status into a database and determines whether the operation status of the production machine has changed. The performance satisfaction determination step determines whether the change in the operation status meets a required performance level. This involves the monitoring unit monitoring the at least one production machine to detect a next change in the operation status of the at least one production machine, and the performance satisfaction determination step determining whether the next change in the operation status meets the required performance level. The real-time performance improving step sends information illustrating the problem to an assigned task team. | 12-08-2011 |
Cheng-Wei Chen, Pingtung County TW
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20090278175 | METHOD FOR FORMING EXTENDED GATE FIELD EFFECT TRANSISTOR (EGFET) BASED SENSOR AND THE SENSOR THEREFROM - The invention provides a method for forming an extended gate field effect transistor (EGFET) based sensor, including: (a) providing a substrate; (b) forming a sensing film including titanium dioxide, ruthenium doped titanium dioxide or ruthenium oxide on the substrate; and (c) forming a conductive wire extended from the sensing film for external contact. | 11-12-2009 |
20110115473 | MULTI-ELECTRODE MEASURING SYSTEM - The invention provides a multi-electrode measuring system including a front end device which is a sensing device including a multi-electrode sensing device having a plurality of electrodes; a multi-channel fixture coupled to the multi-electrode sensing device; and a reference electrode. A back-end device as a virtual instrumentation is an electronic device including a read out circuit device coupled to the multi-channel fixture and the reference electrode for receiving each original signal from each electrode of the multi-electrode sensing device and the reference electrode determining a sample solution; a data acquisition device coupled to the read out circuit device for digitizing each original signal to form a digital signal and for array sampling; and a signal processing device coupled to the data acquisition device for processing each signal. | 05-19-2011 |
Chia-Yi Chen, Pingtung County TW
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20100053977 | Lap based in light-emitting diodes - A lamp includes a tube, a reflector, at least one illuminator unit, at least one radiator and two connectors. The tube is made of a transparent material. A reflector is disposed in the tube. The illuminator unit includes at least one light-emitting diode for emitting light. The radiator includes a first reduced portion inserted in the tube, a second reduced portion located opposite to the first reduced portion and fins for dissipating heat generated by the light-emitting diode. The first reduced portion of the radiator is formed with a face for supporting the illuminator unit so that the light-emitting diode can cast the light to the reflector that can reflect the light. The connectors are connected to the illuminator unit for conducting electricity to the illuminator unit from a power supply. | 03-04-2010 |
20100188847 | Lamp holder - A lamp holder is made by extrusion of aluminum. The lamp holder includes at least one recess for receiving an illuminator. The recess is defined by a mounting face, a first reflective face and a second reflective face. The mounting face is at 18 to 25 degrees from a horizontal plane. The first reflective face is at 120 to 130 degrees from a lower edge of the mounting face. The second reflective face is at 110 to 120 degrees from an upper edge of the mounting face. | 07-29-2010 |
Chien-Ru Chen, Pingtung County TW
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20150062194 | PRE-CHARGING APPARATUS OF SOURCE DRIVING CIRCUIT AND OPERATING METHOD THEREOF - A source driver pre-charging apparatus including a data detection module, a determining module, and a pre-charging module is disclosed. The data detection module captures a first most significant bit having N bits in a current data and a second most significant bit having N bits in a former data and compares them to generate a compared result. N is a positive integer larger than or equal to 2. The determining module judges whether any data is transited from a first grey-level region to a second grey-level region between the former data and the current data and at least one other grey-level region is existed between the first grey-level region and the second grey-level region. If the judgment result of the determining module is yes, the pre-charging module performs a pre-charging action on an output voltage of a source driver. | 03-05-2015 |
Chiu-Hsiang Chen, Pingtung County TW
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20130061643 | KEY - A key includes a shank having at least one groove and at least one recess, and the at least one groove has different lengths. At least one magnetic member is received in the at least one recess and a number of the at least one magnetic member is not more than a number of the at least one recess. The arrangements of the at least one recess, the at least one groove and the at least one magnetic member have multiple options. The magnetic members are located in different recesses and the magnetic poles of the magnetic members are arranged in different ways. The key is difficult to be copied and has higher safety standards. | 03-14-2013 |
Chung-Ping Chen, Pingtung County TW
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20100224736 | NET STRUCTURE AND METHODS OF MAKING THE SAME - A net structure includes a plurality of metal rightwards inclined wires including, in sequence, a first rightwards inclined wire, a second rightwards inclined wire, and an N-th rightwards inclined wire. The net structure further includes a plurality of metal leftwards inclined wires including, in sequence, a first leftwards inclined wire, a second leftwards inclined wire, and an N-th leftwards inclined wire. The first rightwards inclined wires intersects, in sequence, from the first rightwards inclined wire through the N-th rightwards inclined wire at an intersection at which a twine portion is formed. The second rightwards inclined wires intersects, in sequence, from the second rightwards inclined wire through the N-th rightwards inclined wire at an intersection at which a twine portion is formed. The N-th leftwards inclined wire intersects the N-th rightwards inclined wire at an intersection at which a twine portion is formed, thereby forming a net structure with a plurality of hexagonal meshes. The net structure is made by slant weaving. | 09-09-2010 |
Chung-Ping Chen, Pingtung County CN
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20140116568 | Net Knitting Method - Disclosed is a net knitting method. The knitting method comprises: leading multiple first thread materials ( | 05-01-2014 |
Chun-Hsi Chen, Pingtung County TW
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20140015791 | TOUCH PANEL DRIVING DEVICE AND DRIVING METHOD THEREOF - A touch panel driving device is provided, which is adapted to drive a capacitive touch panel and includes a driving part, a power supply part and a control part. The driving part is configured to sequentially generate a plurality of scan signals with the level of an operation voltage in response to the operation voltage, so as to drive the capacitive touch panel. The power supply part is coupled to the driving part, and configured to supply the operation voltage to the driving part. The control part is coupled to the driving part and the power supply part, and configured to control operations of the driving part and the power supply part and adjust the operation voltage supplied by the power supply part in response to different touch conditions, so as to change the amplitudes of the scan signals. | 01-16-2014 |
20140049510 | CAPACITIVE TOUCH CONTROL SYSTEM - A capacitive touch control system includes a sensing matrix, a comparator and a control unit. The control unit is configured to couple the sensing matrix to at least one of two input terminals of the comparator, to provide at least one variable voltage to at least one of the two input terminals of the comparator and to adjust the at least one variable voltage according to a comparison result of the comparator so as to balance the two input terminals of the comparator to accordingly identify a touch event and a contact extent. | 02-20-2014 |
20140110683 | ORGANIC LIGHT EMITTING DIODE TOUCH DISPLAY PANEL - The present invention provides an organic light emitting diode touch display panel including a substrate, a plurality of first electrodes and a plurality of second electrodes disposed on the substrate, a plurality of light emitting layers, a plurality of dielectric layers, a plurality of first electrode stripes, and a plurality of second stripes. Each light emitting layer is disposed on each first electrode, and each dielectric layer is disposed on each second electrode. Each first electrode stripe is disposed on the light emitting layers in each row, and each second electrode stripe is disposed on the dielectric layers in each row. Each first electrode, each light emitting layer and each first electrode stripe form an organic light emitting diode, and each second electrode, each dielectric layer and each second electrode stripe form a touch sensing capacitor. | 04-24-2014 |
20150145806 | IN-CELL TOUCH DISPLAY PANEL AND AN OPERATION METHOD THEREOF - The invention relates to an in-cell touch display panel including a thin film transistor array substrate, a color filter substrate, a liquid crystal molecule layer, sensing driving electrodes and touch control sensing electrodes. The liquid crystal molecule layer is disposed between the thin film transistor substrate and the color filter substrate. The sensing driving electrodes are arranged in a first direction and disposed on the thin film transistor array substrate. The touch control sensing electrodes are arranged in a second direction and disposed on a surface of the color filter substrate farther away from the thin film transistor array. The data lines of a pixel array on the thin film transistor array are used as the sensing driving electrodes to cooperate with the touch control sensing electrodes to perform a touch sensing operation. | 05-28-2015 |
Chun-Ta Chen, Pingtung County TW
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20120158773 | METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR ACTIVATING INFORMATION OF OBJECT COMPUTER SYSTEM - An object association system for activating associated information is provided. The system includes an environment recognition and monitor module, a feature analyzer and builder module, a feature repository, a feature matching module, and an actuator module. The environment recognition and monitor module is configured for detecting an object that is opened and extracting digital environment information and physical environment sensor information corresponding to the object. The feature analyzer and builder module is configured for generating a digital environment feature and a physical environment feature corresponding to the object, building an environment feature association model according to the digital environment feature, the physical environment feature and a text feature corresponding to the object and storing the environment feature association model in the feature repository. When the object is re-opened, the feature matching module identifies other objects related to the object, and the actuator module displays information related to the other objects. | 06-21-2012 |
Hang-Sheng Chen, Pingtung County TW
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20150349677 | DC BRUSHLESS MOTOR CONTROL SYSTEM APPLICABLE FOR AC POWER - A control system electrically coupled between a main control module and a DC brushless motor includes a switching power conversion circuit, a voltage conversion circuit, a central processing circuit, a motor driving circuit and a switching circuit. The switching power conversion circuit is connected to the air-conditioning main control module for receiving an AC power, and rectifying, bucking and filtering the AC power to form and supply a stable DC power for the operation of the DC brushless motor, so that a conventional air-conditioning system converts AC signals into DC signal to control and drive DC brushless motor, so as to achieve the power saving effect without the need of changing the existing pipeline wiring and control interface. | 12-03-2015 |
Ho-Hsien Chen, Pingtung County TW
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20140173974 | METHOD FOR PRODUCING BIODIESEL - A method for producing biodiesel includes feeding methanol into a tank and heating methanol to a temperature above a critical temperature of methanol to obtain a supercritical methanol. A reactive matrix is fed into the tank. The reactive matrix includes acetic acid and a material oil. A molar ratio of acetic acid to the material oil is in a range from 1:1 to 5:1. A molar ratio of methanol to the material oil is in a range from 20:1 to 90:1. A supercritical carbon dioxide is fed into the tank. A total pressure of the supercritical methanol and the supercritical carbon dioxide is higher than 10 MPa. The supercritical methanol, the material oil, acetic acid, and the supercritical carbon dioxide react with each other in the tank at 240-500° C. and 8.1-50 MPa for 0.1-1.5 hours to obtain biodiesel. | 06-26-2014 |
Holi Chen, Pingtung County TW
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20120219645 | Chinese Herbal Aqueous Extract Having Anti-Anxiety Activities and Method of In Vitro Evaluating the Same - A Chinese herbal aqueous extract having anti-anxiety activities and a method of in vitro evaluating the same are disclosed. Neural cells and/or glial cells are cultured in a medium containing the Chinese herbal aqueous extract, and then subjected to an electric pulse treatment to form epileptic cells. The epileptic cells are applied on evaluation of at least one criterion of anti-anxiety activities of the Chinese herbal aqueous extract. | 08-30-2012 |
20150204854 | Chinese Herbal Aqueous Extract Having Anti-Anxiety Activities and Method of In Vitro Evaluating the Same - A Chinese herbal aqueous extract having anti-anxiety activities and a method of in vitro evaluating the same are disclosed. Neural cells and/or glial cells are cultured in a medium containing the Chinese herbal aqueous extract, and then subjected to an electric pulse treatment to form epileptic cells. The epileptic cells are applied on evaluation of at least one criterion of anti-anxiety activities of the Chinese herbal aqueous extract. | 07-23-2015 |
Hsin-Change Chen, Pingtung County TW
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20090067898 | TONER FUSER FOR FUSING TONERS ON A PRINT MEDIUM AND RELATED LASER PRINTER - A toner fuser includes a pressure roller for pressing toners on a print medium so as to fuse the toners on a print medium, and a rolling heating component for clamping the print medium with the pressure roller and heating the pressure roller. A fusing region is formed between the pressure roller and the rolling heating component. The toner fuser further includes a rolling preheating component installed on a side of the pressure roller for preheating the pressure roller and a part of the print medium not entering into the fusing region. | 03-12-2009 |
Hsin-Liang Chen, Pingtung County TW
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20140375207 | LARGE-AREA PLASMA GENERATING APPARATUS - A large-area plasma generating apparatus is disclosed, which includes a reaction chamber; a first electrode disposed in the reaction chamber; a second electrode parallel with the first electrode and disposed in the reaction chamber; and a discharge region formed between the first and second electrodes and a plasma can be formed therein; wherein a travelling wave or a traveling-wave-like electromagnetic field is generated via at least one of the first and second electrodes and travels from one end of the discharge region to its opposite end, so as to uniform the plasma in the discharge region. | 12-25-2014 |
Huan-Sheng Chen, Pingtung County TW
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20150266594 | Despin Device - A despin device includes a central base installed in an outer rotational ring. The outer rotational ring includes a plurality of through-holes extending from an inner wall face thereof through an outer wall face thereof. Masses are symmetrically installed in ball grooves of the central base and the through-holes of the outer rotational ring. The masses are connected by a connecting line extending through a line cutter and tensioned by a tensioning device. Cables are wrapped around an outer periphery of the central base. Each cable includes an end attached to one of the masses. A plurality of release-hitch devices is provided. Each release-hitch device includes a hitch member fixed to the central base and a disengagement member releasably engaged with the hitch member and fixed to the other end of one of the cables. | 09-24-2015 |
Jian-Ging Chen, Pingtung County TW
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20130090469 | GREEN ZINC PORPHYRIN SENSITIZERS AND THEIR APPLICATIONS - The present invention relates to zinc porphyrin-based photosensitive dyes, specifically to zinc porphyrin-based photosensitive dyes with green transparency. The photosensitive dyes exhibit high push-pull ability in the zinc porphyrin-based structure, higher absorption and power conversion efficiency. The photosensitive dyes are used in the manufacture of dye-sensitive solar cells. | 04-11-2013 |
Jian-Liang Chen, Pingtung County TW
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20140220869 | SUBTLE VORTEX POLISHING APPARATUS - A subtle vortex polishing apparatus includes a receiving unit; a stirring unit, movably provided in the receiving unit; and a transmission unit, connected to the stirring unit. The workpiece to be polished and the fluid abrasive are placed in the in the receiving unit. The stirring unit is driven by the transmission unit so that the fluid abrasive in the receiving unit forms the eddy friction for polishing the workpiece and the deburring, polishing, chamfering for the workpiece can be finished in one time. Thereby, the grinding effect of the inner and outer surfaces of the workpiece enhances, and this invention can be thus used in processing small, bored, cracked, cambered complex surfaces, achieving the effects of easy operation, single-sided or multi-surface processing at the same time, increase in the processing rate, significant reduce in labor intensity, reduced processing costs and improved productivity. | 08-07-2014 |
Ke-Wei Chen, Pingtung County TW
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20140193823 | PRIMER SET AND A METHOD FOR IDENTIFICATION OF MEAT SPECIES - The invention discloses a primer set for identification of meat species. The primer set comprises a pair of outer primers used to amplify a sense strand of DNA fragment of mitochondrial cytochrome b between positions 51 and 507. The pair of outer primers comprises a forward outer primer and a backward outer primer. The primer set further comprises a pair of inner primers comprising a forward inner primer and a backward inner primer. The forward inner primer comprises a first annealing portion and a first warped portion. The backward inner primer comprises a second annealing portion and a second warped portion. Accordingly, the primer set is used to identify species of meat especially with DNA fragmentation due to processing processes of processed food. | 07-10-2014 |
Kun-Yu Chen, Pingtung County TW
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20120167930 | DECARBONIZATION DEVICE - A decarbonization device for engine decarbonization includes an oxyhydrogen supplying unit, a dryer unit connected to the oxyhydrogen supplying unit, an exhaust unit connected to the dryer unit, and a pressure adjusting unit connected to the exhaust unit. The oxyhydrogen supplying unit is configured to supply oxyhydrogen gas. The dryer unit is configured to dry the oxyhydrogen gas from the oxyhydrogen supplying unit. The exhaust unit is configured to be connected to an engine for providing the oxyhydrogen gas from the oxyhydrogen supplying unit through the dryer unit to the engine. The pressure adjusting unit is configured to provide air into the engine through the exhaust unit so as to adjust inner pressure within the engine. | 07-05-2012 |
Kuo-Feng Chen, Pingtung County TW
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20090169399 | Ultra-thin miniature pump - An ultra-thin miniature pump applied to transport a fluid includes a main body, a rotor, and a stator. The main body includes a cover part and a bottom part. A joint surface between the cover part and the bottom part possesses an anti-leakage device, and a chamber including a suction port and a discharge port is formed inside the main body. The rotor disposed in the chamber includes a magnet set, an impeller, and a central shaft. The magnet set is connected on the surface of the impeller, and the impeller with the magnet set is aligned by the central shaft and rotates in coaxial. The stator disposed in the chamber includes a plurality of coils corresponding to the magnet set axially. The coils and the magnet set generate an axial magnetic flux to make the impeller rotate for transporting the fluid from the suction port to the discharge port. | 07-02-2009 |
Li-Che Chen, Pingtung County TW
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20090305451 | MANUFACTURING METHOD OF WAFER LEVEL CHIP SCALE PACAKGE OF IMAGE-SENSING MODULE - A manufacturing method of a wafer level chip scale package of an image-sensing module is provided. The method includes providing. a wafer having a plurality of die regions, and a plurality of sensing units is formed on a surface of the wafer in each die region. A plurality of lens units is formed on the sensing units, wherein each lens unit includes a lens and an edge wall that are integrally formed. A light-shielding film is also formed on a surface of at least one edge wall of at least one lens units. A dicing process is then performed on the wafer to form a plurality of image sensor chips. | 12-10-2009 |
20100020991 | DIAPHRAGM OF MEMS ELECTROACOUSTIC TRANSDUCER - A diaphragm of an MEMS electroacoustic transducer including a first axis-symmetrical pattern layer is provided. Because the layout of the first axis-symmetrical pattern layer can match the pattern of the sound wave, the vibration uniformity of the diaphragm can be improved. | 01-28-2010 |
20100067728 | MICROELECTROMECHANICAL SYSTEM MICROPHONE STRUCTURE AND MICROELECTROMECHANICAL SYSTEM MICROPHONE PACKAGE STRUCTURE - A microelectromechanical system microphone structure including a substrate, a first device and at least one second device is provided. The first device is disposed on the substrate and including a first upper electrode and a first lower electrode disposed between the first upper electrode and the substrate. The second device is disposed on the substrate, surrounding the first device and including a second upper electrode and a second lower electrode disposed between the second upper electrode and the substrate. The second upper electrode includes a plurality of first conductive layers and first plugs. The first conductive layers are arranged in steps, and the first plug is disposed between the adjacent first conductive layers. The second lower electrode includes a plurality of second conductive layers and a plurality of second plugs. The second conductive layers are arranged in steps, and the second plug is disposed between the adjacent second conductive layers. | 03-18-2010 |
20120193735 | MICROELECTROMECHANICAL SYSTEM MICROPHONE PACKAGE STRUCTURE - A microelectromechanical system microphone package structure includes a base plate and a plurality of chips is provided. The plurality of chips are disposed on the base plate, wherein an active area of each of the chips is disposed with a microelectromechanical system microphone structure, each of the active areas comprises a normal line, and the normal lines of the chips are not parallel to each other. | 08-02-2012 |
20120205808 | MEMS and Protection Structure Thereof - A protection structure of a pad is provided. The pad is disposed in a dielectric layer on a semiconductor substrate and the pad includes a connection region and a peripheral region which encompasses the connection region. The protection structure includes at least a barrier, an insulation layer and a mask layer. The barrier is disposed in the dielectric layer in the peripheral region. The insulation layer is disposed on the dielectric layer. The mask layer is disposed on the dielectric layer and covers the insulation layer and the mask layer includes an opening to expose the connection region of the pad. | 08-16-2012 |
20130113048 | HIGH VOLTAGE SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF - A method for fabricating a high voltage semiconductor device is provided. Firstly, a substrate is provided, wherein the substrate has a first active zone and a second active zone. Then, a first ion implantation process is performed to dope the substrate by a first mask layer, thereby forming a first-polarity doped region at the two ends of the first active zone and a periphery of the second active zone. After the first mask layer is removed, a second ion implantation process is performed to dope the substrate by a second mask layer, thereby forming a second-polarity doped region at the two ends of the second active zone and a periphery of the first active zone. After the second mask layer is removed, a first gate conductor structure and a second gate conductor structure are formed over the middle segments of the first active zone and the second active zone, respectively. | 05-09-2013 |
20130312246 | METHOD FOR SUPPORTING SEMICONDUCTOR WAFER AND WAFER SUPPORTING ASSEMBLY - A method for supporting a semiconductor wafer includes providing a device wafer to a magnetizable ring, providing a magnetizable carrier to the device wafer, and magnetizing the magnetizable ring and the magnetizable carrier to form a magnetized clamp having a magnetized ring and magnetized carrier. The magnetized clamp securely clamps the device wafer therebetween. | 11-28-2013 |
20140367805 | MEMS structure and method of forming the same - A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer. | 12-18-2014 |
Li-Hsiu Chen, Pingtung County TW
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20090015305 | DIGITIZED METHOD FOR GENERATING PULSE WIDTH MODULATION SIGNALS - A digitized method for generating pulse width modulation (PWM) signals is disclosed. In the digitized method, multiphase PWM signals are generated by altering the reference levels so that fully on duty cycle or fully off duty cycle of each phase PWM signal can be achieved. Therefore, the digitized PWM signal generation method in the present invention can be applied to any application apparatus having boost/buck converter. | 01-15-2009 |
Li-Wen Chen, Pingtung County TW
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20100160110 | Transmission Assembly for Electric Vehicle - A transmission assembly for an electric vehicle includes a transmission having an input shaft, an output shaft, and a gear train coupled between the input shaft and the output shaft. A motor includes an output coupled to the input shaft of the transmission. A motor controller is electrically connected to the motor and controls a rotating speed of the motor. A gear controller is electrically connected to the motor controller. The gear controller outputs a speed request signal to the motor controller, and the motor controller controls the rotating speed of the motor based on the speed request signal, allowing smooth engagement between the gear train and the output shaft. | 06-24-2010 |
Mei-Chin Chen, Pingtung County TW
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20150146473 | RESISTIVE MEMORY APPARATUS AND WRITE-IN METHOD THEREOF - A resistive memory apparatus and a write-in method thereof are provided. The memory controller provides unselected bit-lines and unselected word-lines both not coupled to a selected resistive memory cell respectively with a first bit-line voltage and a first word-line voltage in one of a setting duration and a resetting duration, wherein the first bit-line voltage is equal to a product of a writing-in voltage V | 05-28-2015 |
Meng-Tse Chen, Pingtung County TW
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20140370659 | SINGULATION APPARATUS AND METHOD - A singulation apparatus includes a carrier having a plurality of singulation sites and a scribe line between each of the plurality of singulation sites and an adjacent singulation site. The carrier has a top surface configured to receive a semiconductor substrate thereon. Each of the plurality of singulation sites includes a deformable portion and at least one vacuum hole. The at least one vacuum hole and the deformable portion is configured to form a seal around the at least one vacuum holes when a force is applied. The present disclosure further includes a method of manufacturing semiconductor devices, especially for a singulation process. | 12-18-2014 |
20150061115 | INTERCONNECT STRUCTURE AND MANUFACTURING METHOD THEREOF - A conductive interconnect structure includes a contact pad; a conductive body connected to the contact pad at a first end; and a conductive layer positioned on a second end of the conductive body. The conductive body has a longitudinal direction perpendicular to a surface of the contact pad. The conductive body has an average grain size (a) on a cross sectional plane (Plane A) whose normal is perpendicular to the longitudinal direction of the conductive body. The conductive layer has an average grain size (b) on Plane A. The conductive body and the conductive layer are composed of same material, and the average grain size (a) is greater than the average grain size (b). | 03-05-2015 |
Ming-Yen Chen, Pingtung County TW
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20160091604 | APPARATUS, SYSTEM AND METHOD FOR SPACE STATUS DETECTION BASED ON ACOUSTIC SIGNAL - An apparatus, a system and a method for space status detection based on acoustic signal are provided. The detecting apparatus includes an audio transmitting device, an audio receiving device, a signal processing device and a decision device. The audio transmitting device transmits an acoustic signal into a space. The audio receiving device receives a varied acoustic signal as a sensing signal. The signal processing device is coupled to the audio receiving device to receive the sensing signal and generates a characteristic parameter of a space status according to the sensing signal. The decision device is coupled to the signal processing device to receive the characteristic parameter and detects a change of the space status according to the characteristic parameter. | 03-31-2016 |
Pao-Lai Chen, Pingtung County TW
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20100200786 | PRESSURE-SENSING VALVE AND THE METHOD FOR USING THE SAME - A pressure-sensing valve comprises a first housing part, a second housing part, a first regulating knob, a second regulating knob, a valve piston, an upper washer and lower washer, and a pair of springs. The housing parts each has an inner space for moveably receiving the other elements therebetween, and connected with the regulating knobs by a threaded portions. The regulating knobs adjustably abut against the opposite ends of the pair of springs to shift the balanced position thereof to a gating position for closing the pressure-sensing valve under a desired compressed length of the springs and opening for temporarily responding to the acceleration of engine. | 08-12-2010 |
Ping-Hsien Chen, Pingtung County TW
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20100265229 | LEVEL REGULATION CIRCUIT OF COMMON SIGNAL OF LCD - A level regulation circuit of a common signal of an LCD generates a first level voltage and a second level voltage according to a common voltage so as to generate a first common signal and a second common signal. Each pixel of the LCD includes two storage capacitors receiving the first common signal and the second common signal respectively. The level regulation circuit of the common signal uses an operational amplifier and one or two Zener diodes to generate the first level voltage and the second level voltage. The first level voltage and the second level voltage have the same voltage difference to the common voltage, so the flicker of the LCD can be reduced. | 10-21-2010 |
20110193849 | VOLTAGE REGULATION METHOD - A voltage regulation method is provided and includes the following steps. A plurality of fixed voltages is provided to a gray-level resistor string, and a plurality of gray-level voltages and the fixed voltages are divided into a first voltage group and a second voltage group according to signal-to-noise ratios of the gray-level values. It is to determine whether the regulated fixed voltage is used to regulate a gray-level voltage corresponding to low gray-level value according to different voltage group. When the regulated fixed voltage is used to regulate the gray-level voltage corresponding to low gray-level value, it is determined whether the fixed voltage is regulated again by measuring a luminance value of a gray-level voltage having higher signal-to-noise ratio. | 08-11-2011 |
Rong-Liang Chen, Pingtung County TW
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20090214047 | System for producing the parameters of a bass-enhanced loudspeaker enclosure - A system for producing parameters for a bass-enhanced loudspeaker enclosure; meanwhile, a low-frequency extended frequency, a quality and quantity ratio and radius of a port need to be defined for the system. Also, the resonance frequency of a mechanical system and the quality and quantity of a mechanical system are fixed to obtain the parameters for the frequency ratio, the length of the duct and the cavity volume inside the device, etc. and to manufacture the bass-enhanced loudspeaker enclosure. | 08-27-2009 |
Shih-Ting Chen, Pingtung County TW
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20140335244 | FROZEN INSTANT TAPIOCA PEARLS AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing frozen instant tapioca pearls includes: (a) preparing raw tapioca pearls; (b) cooking the raw tapioca pearls to obtain cooked tapioca pearls; (c) soaking the cooked tapioca pearls in a hot water solution; (d) after step (c), cooling the cooked tapioca pearls using ice water; and (e) blowing cold air with a temperature of −5° C. to −40° C. over the cooked tapioca pearls at a wind speed ranging from 3 m/sec to 5 m/sec and a wind pressure ranging from 500 Pa to 1000 Pa so as to separate and quickly freeze the cooked tapioca pearls. | 11-13-2014 |
Shun-Fang Chen, Pingtung County TW
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20100224736 | NET STRUCTURE AND METHODS OF MAKING THE SAME - A net structure includes a plurality of metal rightwards inclined wires including, in sequence, a first rightwards inclined wire, a second rightwards inclined wire, and an N-th rightwards inclined wire. The net structure further includes a plurality of metal leftwards inclined wires including, in sequence, a first leftwards inclined wire, a second leftwards inclined wire, and an N-th leftwards inclined wire. The first rightwards inclined wires intersects, in sequence, from the first rightwards inclined wire through the N-th rightwards inclined wire at an intersection at which a twine portion is formed. The second rightwards inclined wires intersects, in sequence, from the second rightwards inclined wire through the N-th rightwards inclined wire at an intersection at which a twine portion is formed. The N-th leftwards inclined wire intersects the N-th rightwards inclined wire at an intersection at which a twine portion is formed, thereby forming a net structure with a plurality of hexagonal meshes. The net structure is made by slant weaving. | 09-09-2010 |
Son-Lung Chen, Pingtung County TW
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20080217296 | ETCHING APPARATUS FOR SEMICONDUCTOR PROCESSING APPARATUS AND METHOD THEREOF FOR RECYCLING ETCHANT SOLUTIONS - An etching apparatus of a semiconductor processing apparatus and the method thereof for recycling etchant solutions are provided. The method is suitable for a processing apparatus which provides an etchant solution on a wafer so as to perform an etching process. After the etching process is completed, a water solution is added to the etchant solution for maintaining a water content thereof. Then, the mixed etchant solution is recycled. | 09-11-2008 |
Te-Chih Chen, Pingtung County TW
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20130169351 | TRANSISTOR OPERATING METHOD - A transistor operating method is applicable to a transistor including a first gate, a first gate insulating layer, a semiconductor layer, a source, a drain, a second gate insulating layer and a second gate. The transistor operating method includes: grounding the first gate and the source, applying a negative bias to the second gate and applying a positive bias to the drain, so that the transistor acts as an optical detector; alternatively, grounding the source, grounding or floating the second gate, applying a bias to the first gate and applying a positive bias to the drain, so that the transistor acts as a pixel switch. | 07-04-2013 |
Tun-Shih Chen, Pingtung County TW
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20090174439 | MULTIFUNCTIONAL OUTPUT DRIVERS AND MULTIFUNCTIONAL TRANSMITTERS USING THE SAME - A multifunctional output driver capable of transmitting signals of different interfaces in different modes is provided, in which first and second current sources are provided, and first to fourth switching devices are coupled between the first and second current sources, and the first and second current source and the first to the fourth switching devices act as a current steering circuit. In a first transmission mode, the first and second switching devices are turned off, and the third and fourth switching devices and the first current source act as a current mode logic circuit to provide an output signal compatible with a first transmission interface according to an input signal from a pre-driver. In a second transmission mode, the current steering circuit outputs an output signal compatible with a second transmission interface according to the input signal from the pre-driver. | 07-09-2009 |
20100213908 | LOW DROPOUT REGULATORS - Low dropout regulators capable of preventing damage caused by a short circuit or a heavy load are provided, in which a pass transistor receives an unregulated power supply voltage to generate a regulated output voltage according to a control signal. Additionally, a constant overcurrent limiting circuit limits an output current through the pass transistor to below a predetermined current, and a foldback overcurrent limiting circuit enables the constant overcurrent limiting circuit to further decrease the output current, when the regulated output voltage is lower than a predetermined voltage. | 08-26-2010 |
20110043259 | Multifunctional Output Drivers and Multifunctional Transmitters Using the Same - A multifunctional output driver capable of transmitting signals of different interfaces in different modes is provided, in which first and second current sources are provided, and first to fourth switching devices are coupled between the first and second current sources, and the first and second current source and the first to the fourth switching devices act as a current steering circuit. In a first transmission mode, the first and second switching devices are turned off, and the third and fourth switching devices and the first current source act as a current mode logic circuit to provide an output signal compatible with a first transmission interface according to an input signal from a pre-driver. In a second transmission mode, the current steering circuit outputs an output signal compatible with a second transmission interface according to the input signal from the pre-driver. | 02-24-2011 |
Wei-Chuan Chen, Pingtung County TW
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20110115473 | MULTI-ELECTRODE MEASURING SYSTEM - The invention provides a multi-electrode measuring system including a front end device which is a sensing device including a multi-electrode sensing device having a plurality of electrodes; a multi-channel fixture coupled to the multi-electrode sensing device; and a reference electrode. A back-end device as a virtual instrumentation is an electronic device including a read out circuit device coupled to the multi-channel fixture and the reference electrode for receiving each original signal from each electrode of the multi-electrode sensing device and the reference electrode determining a sample solution; a data acquisition device coupled to the read out circuit device for digitizing each original signal to form a digital signal and for array sampling; and a signal processing device coupled to the data acquisition device for processing each signal. | 05-19-2011 |
Wei-Ren Chen, Pingtung County TW
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20120236646 | NON-VOLATILE MEMORY CELL - The non-volatile memory cell includes a coupling device and a first select transistor. The coupling device is formed in a first conductivity region. The first select transistor is serially connected to a first floating gate transistor and a second select transistor, all formed in a second conductivity region. An electrode of the coupling device and a gate of the first floating gate transistor are a monolithically formed floating gate; wherein the first conductivity region and the second conductivity region are formed in a third conductivity region; wherein the first conductivity region, the second conductivity region, and the third conductivity region are wells. | 09-20-2012 |
20130234227 | ERASABLE PROGRAMMABLE SINGLE-PLOY NONVOLATILE MEMORY - An erasable programmable single-poly nonvolatile memory includes a first PMOS transistor comprising a select gate, a first p-type doped region, and a second p-type doped region, wherein the select gate is connected to a select gate voltage, and the first p-type doped region is connected to a source line voltage; a second PMOS transistor comprising the second p-type doped region, a third p-type doped region, and a floating gate, wherein the third p-type doped region is connected to a bit line voltage; and an erase gate region adjacent to the floating gate, wherein the erase gate region is connected to an erase line voltage. | 09-12-2013 |
20130234228 | ERASABLE PROGRAMMABLE SINGLE-PLOY NONVOLATILE MEMORY - An erasable programmable single-poly nonvolatile memory includes a floating gate transistor having a floating gate, a gate oxide layer under the floating gate, and a channel region; and an erase gate region, wherein the floating gate is extended to and is adjacent to the erase gate region. The gate oxide layer comprises a first portion above the channel region of the floating gate transistor and a second portion above the erase gate region, and a thickness of the first portion of the gate oxide layer is different from a thickness of the second portion of the gate oxide layer. | 09-12-2013 |
20130237048 | METHOD OF FABRICATING ERASABLE PROGRAMMABLE SINGLE-PLOY NONVOLATILE MEMORY - The present invention provides method of fabricating an erasable programmable single-poly nonvolatile memory, comprising steps of: defining a first area and a second area in a first type substrate; forming a second type well region in the first area; forming a first gate oxide layer and a second gate oxide layer covered on a surface of the first area, wherein the second gate oxide layer is extended to and is adjacent to the second area; forming a DDD region in the second area; etching a portion of the second gate oxide layer above the second area; forming two polysilicon gates covered on the first and the second gate oxide layers; and defining a second type doped region in the DDD region and a first type doped regions in the second type well region. | 09-12-2013 |
20130242663 | PROGRAMMING INHIBIT METHOD OF NONVOLATILE MEMORY APPARATUS FOR REDUCING LEAKAGE CURRENT - The invention provides a nonvolatile memory apparatus. The nonvolatile memory apparatus comprises a plurality of memory cells and a signal generator. The memory cells are arranged in an array, and each of the memory cells has a control gate terminal, a floating gate, a source line terminal, a bit-line terminal, a selected gate terminal and a word-line terminal. The signal generator is coupled to the memory cells. When the nonvolatile memory apparatus executes a programming operation, the signal generator provides a programming signal to the control gate terminals of a plurality of inhibited memory cells among the memory cells. Wherein, the programming signal is a pulse signal with a direct-current (DC) offset voltage. | 09-19-2013 |
20130248972 | ERASABLE PROGRAMMABLE SINGLE-PLOY NONVOLATILE MEMORY - An erasable programmable single-poly nonvolatile memory includes a substrate structure; a first PMOS transistor comprising a select gate, a first source/drain region, and a second source/drain region, wherein the select gate is connected to a select gate voltage, and the first source/drain region is connected to a source line voltage; a second PMOS transistor comprising the second source/drain region, a third source/drain region, and a floating gate, wherein the third source/drain region is connected to a bit line voltage and the first, second and third source/drain regions are constructed in a N-well region; and an erase gate region adjacent to the floating gate, wherein the erase gate region comprises a n-type source/drain region connected to an erase line voltage and a P-well region; wherein the N-well region and the P-well region are formed in the substrate structure. | 09-26-2013 |
20130248973 | ERASABLE PROGRAMMABLE SINGLE-PLOY NONVOLATILE MEMORY - An erasable programmable single-poly nonvolatile memory includes a substrate structure; a floating gate transistor having a floating gate, a gate oxide layer under the floating gate, and a channel region, wherein the channel region is formed in a N-well region; and an erase gate region, wherein the floating gate is extended to and is adjacent to the erase gate region and the erase gate region comprises a n-type source/drain region connected to an erase line voltage and a P-well region. The N-well and P-well region are formed in the substrate structure. The gate oxide layer comprises a first portion above the channel region of the floating gate transistor and a second portion above the erase gate region, and a thickness of the first portion of the gate oxide layer is different from a thickness of the second portion of the gate oxide layer. | 09-26-2013 |
20130302977 | METHOD OF FABRICATING ERASABLE PROGRAMMABLE SINGLE-PLOY NONVOLATILE MEMORY - The present invention provides method of fabricating an erasable programmable single-poly nonvolatile memory, comprising steps of: defining a first area and a second area in a first type substrate; forming a second type well region in the first area; forming a first gate oxide layer and a second gate oxide layer covered on a surface of the first area, wherein the second gate oxide layer is extended to and is adjacent to the second area; forming a DDD region in the second area; etching a portion of the second gate oxide layer above the second area; forming two polysilicon gates covered on the first and the second gate oxide layers; and defining a second type doped region in the DDD region and a first type doped regions in the second type well region. | 11-14-2013 |
20140183612 | NONVOLATILE MEMORY STRUCTURE AND FABRICATION METHOD THEREOF - A nonvolatile memory structure includes a semiconductor substrate having thereon a first oxide define (OD) region, a second OD region and a third OD region arranged in a row. The first, second, and third OD regions are separated from one another by an isolation region. The isolation region includes a first intervening isolation region between the first OD region and the second OD region, and a second intervening isolation region between the second OD region and the third OD region. A select gate transistor is formed on the first OD region. A floating gate transistor is formed on the second OD region. The floating gate transistor is serially coupled to the select gate transistor. The floating gate transistor includes a floating gate that is completely overlapped with the underlying second OD region and is partially overlapped with the first and second intervening isolation regions. | 07-03-2014 |
20140242763 | METHOD FOR FABRICATING NONVOLATILE MEMORY STRUCTURE - A nonvolatile memory structure includes a semiconductor substrate having thereon a first oxide define (OD) region, a second OD region and a third OD region arranged in a row. The first, second, and third OD regions are separated from one another by an isolation region. The isolation region includes a first intervening isolation region between the first OD region and the second OD region, and a second intervening isolation region between the second OD region and the third OD region. A select gate transistor is formed on the first OD region. A floating gate transistor is formed on the second OD region. The floating gate transistor is serially coupled to the select gate transistor. The floating gate transistor includes a floating gate that is completely overlapped with the underlying second OD region and is partially overlapped with the first and second intervening isolation regions. | 08-28-2014 |
20140361358 | NONVOLATILE MEMORY STRUCTURE - A nonvolatile memory structure includes a substrate having thereon a first, a second, and a third OD regions arranged in a row. The first, second, and third OD regions are separated from one another by an isolation region. The isolation region includes a first intervening isolation region between the first OD region and the second OD region, and a second intervening isolation region between the second the third OD region. A first select transistor is formed on the first OD region. A floating gate transistor is formed on the second OD region. The floating gate transistor is serially coupled to the first select transistor. The floating gate transistor includes a floating gate completely overlapped with the second OD region and is partially overlapped with the first and second intervening isolation regions. A second select transistor is on the third OD region and serially coupled to the floating gate transistor. | 12-11-2014 |
20150091074 | NONVOLATILE MEMORY STRUCTURE - A nonvolatile memory structure included a P substrate, an N well in the P substrate, and a PMOS storage transistor. The PMOS storage transistor includes a floating gate and an auxiliary gate disposed in close proximity to the floating gate. The floating gate and the auxiliary gate are disposed directly on the same floating gate channel of the PMOS storage transistor. A gap is provided between the auxiliary gate and the floating gate such that the auxiliary gate and the floating gate are separated from each other at least directly above the floating gate channel. | 04-02-2015 |
20150287438 | ARRAY STRUCTURE OF SINGLE-PLOY NONVOLATILE MEMORY - An array structure of a single-poly nonvolatile memory includes a first and a second MTP sections, a first and a second OTP sections. The first MTP is connected to a first word line, a first source line, a first erase line and a plurality of bit lines. The second MTP section is connected to a second word line, a second source line and shares the first erase line and the plurality of bit lines with the first MTP section. The first OTP section is connected to a third word line and shares the first source line and the plurality of bit lines with the first MTP section. The second OTP section is connected to a fourth word line, a third source line, and shares the plurality of bit lines with the first MTP section, the second MTP section and the third OTP section. | 10-08-2015 |
20150287732 | NONVOLATILE MEMORY CELL STRUCTURE WITH ASSISTANT GATE - A nonvolatile memory (NVM) cell includes a semiconductor substrate having therein an N well and a P well; a first OD region and a second OD region disposed within the N well; a PMOS select transistor disposed on the first OD region; a PMOS floating gate transistor serially connected to the select transistor and being disposed on the on the first OD region, wherein the PMOS floating gate transistor comprises a floating gate overlying the first OD region; and an assistant gate protruding from one distal end of the floating gate to one edge of the second OD region such that the assistant gate is capacitively coupled to the second OD region and the N well. The select transistor, the floating gate transistor and the assistant gate disposed on the same N well. | 10-08-2015 |
Yi-Cheng Chen, Pingtung County TW
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20110274365 | ELECTRICAL-DEVICE-IMPLEMENTED IMAGE CODING METHOD - An electrical-device-implemented image coding method includes: a raw block is obtained from an image. There are a max pixel value and a min pixel value among the raw pixel values of the image. A first difference sum, which is sum of differences between the raw pixel values and the max pixel value respectively, are calculated. A second difference sum, which is sum of differences between the raw pixel values and the min pixel value respectively, are calculated. If the first difference sum is not smaller than the second difference sum, each of the residue values is calculated by subtracting the min pixel value from the corresponding raw pixel value. Otherwise, each of the residue values is calculated by subtracting the corresponding raw pixel value from the max pixel value. Each of the residue values is encoded into a compressed codeword. A bit stream is generated according to the compressed codewords. | 11-10-2011 |
Yi-Chun Chen, Pingtung County TW
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20140027856 | ELECTROSTATIC DISCHARGE PROTECTION DEVICE - An electrostatic discharge (ESD) includes a semiconductor substrate having the first conductive type, a well having the first conductive type, a buried layer having the second conductive type and a well having the second conductive type. The buried layer having a second conductive type is disposed in the semiconductor substrate under the well having the first conductive type. The well having the second conductive type disposed to divide the well having the first conductive type into a first well and a second well. The well having the second conductive type contacts the buried layer, and the well having the second conductive type and the buried layer are jointly used to isolate the first well from the second well. | 01-30-2014 |
20150236010 | ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE CAPABLE OF PREVENTING LATCH-UP ISSUE CAUSED BY UNEXPECTED NOISE - The electrostatic discharge protection structure includes an N-well disposed on a substrate, a P-well disposed on the substrate and adjacent to the N-well, a first doped region of N-type conductivity disposed in the N-well, a second doped region of N-type conductivity disposed in the N-well, a third doped region of P-type conductivity disposed in the N-well, a fifth doped region of P-type conductivity disposed in the P-well, a fourth doped region of N-type conductivity disposed between the third doped region and the fifth doped region in the P-well, an anode electrically connected to the first doped region and the second doped region, and a cathode electrically connected to the fourth doped region and the fifth doped region. | 08-20-2015 |
Yi-Keng Chen, Pingtung County TW
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20130304965 | STORAGE UNIT MANAGEMENT METHOD, MEMORY CONTROLLER AND MEMORY STORAGE DEVICE USING THE SAME - A storage unit management method for managing a plurality of physical units in a rewritable non-volatile memory module is provided, wherein the physical units are at least grouped into a data area and a spare area. The method includes configuring a plurality of logical units for mapping to the physical units belonging to the data area, and determining whether the rewritable non-volatile memory module contains cold data. The method further includes performing a first wear-leveling procedure on the physical units if it is determined that the rewritable non-volatile memory module does not contain any cold data, and performing a second wear-leveling procedure on the physical units if it is determined that the rewritable non-volatile memory module contains the cold data. | 11-14-2013 |
Ying-Nan Chen, Pingtung County TW
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20110130435 | TIME-RELEASED MEDICATION FOR APPLYING TO CRUSTACEAN OVARIAN DEVELOPMENT - A time-released medication for applying to crustacean ovarian development comprises a covering oil and a serotonin-related reagent. The covering oil is coated with the serotonin-related reagent and provides a sustainable releasing effect for the serotonin-related reagent. The serotonin-related reagent is selected from a group of serotonin, a precursor of serotonin, a derivative of serotonin and an agonist of serotonin. The coating relationship between the serotonin-related reagent and the covering oil makes them become a time-released medication. | 06-02-2011 |
Yung-Chuan Chen, Pingtung County TW
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20140124485 | RESISTANCE SPOT WELDING METHOD FOR A LAP-JOINT OF MULTI-METAL SHEETS - A resistance spot welding method for a lap joint multi-metal sheets which may improve the welding efficiency and nugget quality comprises: coating a joining zone of one of two mutually facing surfaces of two adjacent metal sheets with an active agent with high resistivity to form a welding region, and clamping the welding region with an upper welding electrode and a lower welding electrode and providing an electric current into the welding region. The active agent with high resistivity generates high heat energy to melt the joining zone and join the two adjacent metal sheets. The active agent with high resistivity has a resistivity much greater than a resistivity of each of the two metal sheets, and the active agent with high resistivity consists of multi-component powders and an organic solvent. | 05-08-2014 |
Yung-Yu Chen, Pingtung County TW
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20090271113 | METHOD FOR MODIFYING NAVIGATION INFORMATION AND NAVIGATION APPARATUS USING THE SAME - A method for modifying navigation information for guiding the driver is provided in the present invention, in which attitude angle of a carrier at a specific location is detected and compared with an identifying information for judging whether the carrier is on a correct route or not. In another embodiment, the present invention further provides a navigation apparatus according the foregoing method, which comprises an inertia navigation unit, a satellite signal receiving unit, a database, and signal processing unit. The signal processing unit generates a navigation route in accordance with the start and destination and determines whether the attitude angle is conformed to the identifying information with respect to the specific location on the navigation route. If the attitude angle is not conformed to the identifying information, the signal processing unit remodifies the navigation route for the carrier. | 10-29-2009 |
20100131198 | METHOD FOR MODIFYING NAVIGATION INFORMATION AND NAVIGATION APPARATUS USING THE SAME - A method for modifying navigation information is provided in the present invention. The method comprises steps of detecting a status information with respect to a moving carrier guiding by a navigating route; comparing the status information with a characteristic information corresponding to a characteristic point on the navigating route; and finally, determining whether the moving carrier is passing the characteristic point according to the comparing result and modifying the coordinate position of the carrier. In another embodiment, the present invention further provides a navigating apparatus comprising a sensing module for detecting the status of the moving carrier, a signal processing unit, and a storage unit for storing a map information. The signal processing unit comparing the status information to the characteristic information with respect to the characteristic point on the navigating route, and modifying the deviation of the moving carrier to the modify location according to the comparing result. | 05-27-2010 |
20110153196 | MAP BUILDING SYSTEM, BUILDING METHOD AND COMPUTER READABLE MEDIA THEREOF - A map building system, method and computer readable media thereof are provided, which are applied to a movable apparatus or which with a server apparatus. The system includes at least two distance sensing units, a inertial sensing unit, a parameter processing unit, and a display unit. The distance sensing units detect a distance between the movable device and at least one obstacle object and create at least two range data. The inertial sensing unit detects moving mode of the movable device and creates at least one moving data. The parameter processing unit calculates an area map data according the range data and the moving data. The area map data is shown on the display unit. | 06-23-2011 |