Patent application number | Description | Published |
20090125293 | Method and System for Real-Time Prediction of Power Usage for a Change to Another Performance State - A method and system for real-time prediction of power usage for a change to another performance state provides input data for power management decision-making processes or for display to system operators. The unit(s) for which power usage is predicted may be a single processor in a uni-processor system or may extend up to the level of facilities within a complex of processing facilities. The method and system gather real-time data on the power consumption of the unit(s) and create a model, such as a regression model, of power versus performance. A resulting power usage change required by a prospective nominal performance state change is shown as display data, or is transmitted to a power budgeting controller to inform the controller as to potential changes that can enhance system operation, such as managing tradeoffs of power allocated to various sub-units of a processing system. | 05-14-2009 |
20090144566 | Method for Equalizing Performance of Computing Components - A performance measure (e.g., processor speed) for computing components such as servers is optimized by creating models of power consumption versus the performance measure for each server, adding the power models to derive an overall power model, and calculating an optimum set point for the performance measure which corresponds to a power limit on the servers using the overall power model. The set point is then used to set power budgets for the servers based on their power models, and the servers maintain power levels no greater than their respective power budgets. The server power models are preferably created in real time by monitoring power consumption and the performance measure to derive sets of data points for the servers, and performing regression on the sets of data points to yield power models for the servers. Multiple server power models may be created for different program applications. | 06-04-2009 |
20090150693 | METHOD FOR POWER CAPPING WITH CO-OPERATIVE DYNAMIC VOLTAGE AND FREQUENCY SCALING - A co-operative mechanism in which a service processor and a host CPU (with an OS running thereupon) work together to implement both power capping and utilization-based power savings, and with negligible side effects. Preferably, a 2-level modulation scheme is employed to undertake both power capping and energy savings simultaneously. Preferably, a frequency governor in the OS running on a host processor saves power by modulating p-states based on a shared table, thus avoiding SMIs. The range of the p-states in the shared table is adjusted to implement power capping in conjunction with power sensors in the system. This adjustment can be done either by a service processor, which can monitor total energy consumption, or an OS or software running on the host processor, which can read energy consumption from the service processor and adjust the shared table. | 06-11-2009 |
20090327764 | Managing Power Consumption Of A Computer - Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor. | 12-31-2009 |
20090327765 | Managing Power Consumption Of A Computer - Methods and products for managing power consumption of a computer and computers for which power consumption is managed. The computer includes the computer including a computer processor and embodiments of the present invention include providing, by an in-band power manger to an out-of-band power manager, a proposed performance state (‘p-state’) for the computer processor; determining, by the out-of-band power manager, in dependence upon a power setpoint and currently-measured operating metrics of the computer processor, whether to approve the proposed p-state; and if the out-of-band power manager approves the proposed p-state, setting operating parameters of the computer processor according to the approved p-state. | 12-31-2009 |
20120005513 | PERFORMANCE CONTROL OF FREQUENCY-ADAPTING PROCESSORS BY VOLTAGE DOMAIN ADJUSTMENT - A performance control technique for a processing system that includes one or more adaptively-clocked processor cores provides improved performance/power characteristics. An outer feedback loop adjusts the power supply voltage(s) provided to the power supply voltage domain(s) powering the core(s), which may be on a per-core basis or include multiple cores per voltage domain. The outer feedback loop operates to ensure that each core is meeting specified performance, while the cores also include an inner feedback loop that adjusts their processor clock or other performance control mechanism to maximize performance under present operating conditions and within a margin of safety. The performance of each core is measured and compared to a target performance. If the target performance is not met for each core in a voltage domain, the voltage is raised for the voltage domain until all cores meet the target performance. | 01-05-2012 |
20120102468 | REGISTRATION-BASED REMOTE DEBUG WATCH AND MODIFY - A remote debugging technique provides anonymity of program variables and selective debugging capability by providing a registration facility by which program variables are registered locally with a debugging module. An external program then communicates with the debugging modules and observes and/or modifies the program variables by specifying either an index or a variable name. The need to publish symbols is thereby averted and only the variables that a developer is interested in observing need be registered. | 04-26-2012 |
20120116599 | Allocation of Energy Budgets to Individual Partitions - A mechanism is provided for allocating energy budgets to a plurality of logical partitions. An overall energy budget for the data processing system and a total of a set of requested initial energy budgets for the plurality of partitions are determined. A determination is made as to whether the total of the set of requested initial energy budgets for the plurality of partitions is greater than the overall energy budget for the data processing system. Responsive to the total of the set of requested initial energy budgets exceeding the overall energy budget, an initial energy budget is allocated to each partition in the plurality of partitions based on at least one of priority or proportionality of each partition in the plurality of partitions such that a total of the initial energy budgets for the plurality of partitions does not exceed the overall energy budget of the data processing system. | 05-10-2012 |
20120284540 | Managing Power Consumption Of A Computer - Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor. | 11-08-2012 |
20120324264 | Priority-Based Power Capping in Data Processing Systems - A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system. | 12-20-2012 |
20130116963 | Minimizing Aggregate Cooling and Leakage Power with Fast Convergence - A mechanism is provided for minimizing system power in the data processing system with fast convergence. A current aggregate system power value is determined using a current thermal threshold value. For each potential thermal threshold value in a set of potential thermal threshold values, a determination is made as to whether there is a potential thermal threshold value that results in a potential aggregate system power value that is lower than the current aggregate system power value. Responsive to identifying an optimal potential thermal threshold value from the set of potential thermal threshold values that results in minimum aggregate system power value that is lower than the current aggregate system power value, the optimal potential thermal threshold value is set as a new thermal threshold value. | 05-09-2013 |
20130117590 | Minimizing Aggregate Cooling and Leakage Power with Fast Convergence - A mechanism is provided for minimizing system power in the data processing system with fast convergence. A current aggregate system power value is determined using a current thermal threshold value. For each potential thermal threshold value in a set of potential thermal threshold values, a determination is made as to whether there is a potential thermal threshold value that results in a potential aggregate system power value that is lower than the current aggregate system power value. Responsive to identifying an optimal potential thermal threshold value from the set of potential thermal threshold values that results in minimum aggregate system power value that is lower than the current aggregate system power value, the optimal potential thermal threshold value is set as a new thermal threshold value. | 05-09-2013 |
20130318502 | REGISTRATION-BASED REMOTE DEBUG WATCH AND MODIFY - A remote debugging technique provides anonymity of program variables and selective debugging capability by providing a registration facility by which program variables are registered locally with a debugging module. An external program then communicates with the debugging modules and observes and/or modifies the program variables by specifying either an index or a variable name. The need to publish symbols is thereby averted and only the variables that a developer is interested in observing need be registered. | 11-28-2013 |
20140149750 | COMPUTING SYSTEM VOLTAGE CONTROL - An apparatus including a voltage safety verification unit (VSVU) configured to receive an indication of a first performance state, the first performance state being associated with a first voltage. The first performance state applies to at least one computing system component and the indication is received by a computing system component distinct from the requesting computing system component. The VSVU is configured to receive an indication of a second performance state. The second performance state is associated with a second voltage that is not equal to the first voltage. The VSVU is configured to determine whether the second performance state is within a range defined by a minimum and maximum performance state. Responsive to a determination that the second performance state is within the, the VSVU is configured to set the voltage of the at least one computing system component equal to the voltage associated with the second performance state. | 05-29-2014 |
20140149752 | ASSOCIATING ENERGY CONSUMPTION WITH A VIRTUAL MACHINE - Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory. | 05-29-2014 |
20140149760 | DISTRIBUTED POWER BUDGETING - A distributed power management computer program product is configured to collect power consumption data that indicates power consumption by at least a plurality of the components of a node. The program code can be configured to provide, to each of a plurality of controllers associated with a respective one of the plurality of components, the power consumption data. The program code can be configured to determine a node power consumption. The program code can be configured to determine a power differential as a difference between the node power consumption and an upper power consumption threshold of the node. The program code can be configured to determine a proportion of the node power consumption consumed by a first component. The program code can be configured to compute a local power budget for the first component. | 05-29-2014 |
20140149761 | DISTRIBUTED POWER BUDGETING - Embodiments include collecting, from each of a plurality of controllers of a node having a plurality of components, component power consumption. Each of the plurality of controllers is associated with one or more of the components. The component power consumptions are provided to the controllers. A node power consumption for the node is determined based, at least in part, on the component power consumption. The power cap is determined for the plurality of components. A power differential power is determined as a difference between the node power consumption and the power cap for the plurality of components. A proportion of the node power consumption consumed by the component is determined based on the component power consumption of the component. A local power budget is computed for the component based, at least in part, on the power differential and the proportion of the node power consumption consumed by the component. | 05-29-2014 |
20140149763 | COMPUTING SYSTEM VOLTAGE CONTROL - Computing system voltage control methods include receiving an indication of a first performance state. The first performance state is associated with a first voltage and applies to at least one computing system component. The indication of the first performance state is received by a first computing system component from a second computing system component. An indication of a second performance state is received, wherein the second performance state is associated with a second voltage that is not equal to the first voltage. It is determined whether the second performance state is within a range defined by a minimum performance state and a maximum performance state. Responsive to determining that the second performance state is within the range defined by the minimum performance state and the maximum performance state, the voltage of the at least one computing system component is set equal to the voltage associated with the second performance state. | 05-29-2014 |
20140149769 | COMPUTING SYSTEM FREQUENCY TARGET MONITOR - An apparatus includes memory, a processor coupled to the memory, and a set of one or more frequency target monitors. The processor includes a set of one or more processor cores, and the set of one or more frequency target monitors are coupled to the set of one or more processor cores. Each frequency target monitor is configured to determine a difference between an actual performance and an expected performance of a processor core from the set of one or more processor cores. Each frequency target monitor is also configured to, responsive to determining the difference between the actual performance and the expected performance of the processor core from the set of one or more processor cores, record an indication of a difference between the actual performance and the expected performance of the processor core from the set of one or more processor cores. | 05-29-2014 |
20140149779 | ASSOCIATING ENERGY CONSUMPTION WITH A VIRTUAL MACHINE - Associating processor and processor core energy consumption with a task such as a virtual machine is disclosed. Various events cause a trace record to be written to a trace buffer for a processor. An identifier associated with a task using a processor core of the processor is read. In addition, one or more values associated with an energy consumption of the processor core are read. In response to the event, the one or more values associated with the energy consumption of the processor core and the identifier are written to the trace buffer memory. | 05-29-2014 |
20140244212 | Monitoring Aging of Silicon in an Integrated Circuit Device - A mechanism is provided for determining a modeled age of a mufti-core processor. For each core in a set of cores in the multi-core processor, a determination is made of a temperature, a voltage, and a frequency at regular intervals for a set of degradations and a set of voltage domains, thereby forming the modeled age of the multi-core processor. A determination is made as to whether the modeled age of the multi-core processor is greater than an end-of-life value. Responsive to the modeled age of the multi-core processor being greater than an end-of-life value, an indication is sent that the multi-core processor requires replacement. | 08-28-2014 |
20150081039 | Dynamic Adjustment of Operational Parameters to Compensate for Sensor Based Measurements of Circuit Degradation - A mechanism is provided for implementing an operational parameter change within the data processing system based on an identified degradation. One or more degradations existing in the data processing system are identified based on a set of degradation values obtained from a set of degradation sensors. A determination is made as to whether one or more operational parameters need to be modified based on the one or more identified degradations. Responsive to determining that the one or more operational parameters need to be modified based on the one or more identified degradations, an input change is implemented to a one or more control devices in order that the one or more operational parameters are modified. | 03-19-2015 |
20150081044 | Dynamic Adjustment of Operational Parameters to Compensate for Sensor Based Measurements of Circuit Degradation - A mechanism is provided for implementing an operational parameter change within the data processing system based on an identified degradation. One or more degradations existing in the data processing system are identified based on a set of degradation values obtained from a set of degradation sensors. A determination is made as to whether one or more operational parameters need to be modified based on the one or more identified degradations. Responsive to determining that the one or more operational parameters need to be modified based on the one or more identified degradations, an input change is implemented to a one or more control devices in order that the one or more operational parameters are modified. | 03-19-2015 |