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Chao-Kun Hu, Somers US

Chao-Kun Hu, Somers, NY US

Patent application numberDescriptionPublished
20090142924REDUCED ELECTROMIGRATION AND STRESSED INDUCED MIGRATION OF CU WIRES BY SURFACE COATING - The idea of the invention is to coat the free surface of patterned Cu conducting lines in on-chip interconnections (BEOL) wiring by a 1-20 nm thick metal layer prior to deposition of the interlevel dielectric. This coating is sufficiently thin so as to obviate the need for additional planarization by polishing, while providing protection against oxidation and surface, or interface, diffusion of Cu which has been identified by the inventors as the leading contributor to metal line failure by electromigration and thermal stress voiding. Also, the metal layer increases the adhesion strength between the Cu and dielectric so as to further increase lifetime and facilitate process yield. The free surface is a direct result of the CMP (chemical mechanical polishing) in a damascene process or in a dry etching process by which Cu wiring is patterned. It is proposed that the metal capping layer be deposited by a selective process onto the Cu to minimize further processing. We have used electroless metal coatings, such as CoWP, CoSnP and Pd, to illustrate significant reliability benefits, although chemical vapor deposition (CVD) of metals or metal forming compounds can be employed.06-04-2009
20090278229EFFICIENT INTERCONNECT STRUCTURE FOR ELECTRICAL FUSE APPLICATIONS - A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element.11-12-2009
20090294901STRUCTURE AND METHOD OF FORMING ELECTRICALLY BLOWN METAL FUSES FOR INTEGRATED CIRCUITS - A fuse structure for an integrated circuit device includes an elongated metal interconnect layer defined within an insulating layer; a metal cap layer formed on only a portion of a top surface of the metal interconnect layer; and a dielectric cap layer formed on both the metal cap layer and the remaining portions of the metal interconnect layer not having the metal cap layer formed thereon; wherein the remaining portions of the metal interconnect layer not having the metal cap layer formed thereon are susceptible to an electromigration failure mechanism so as to facilitate programming of the fuse structure by application of electric current through the elongated metal interconnect layer.12-03-2009
20090294973INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS HAVING IMPROVED ELECTROMIGRATION CHARACTERISTICS - An interconnect structure for an integrated circuit (IC) device includes an elongated, electrically conductive line comprising one or more segments formed at a first width, w12-03-2009
20100038782NITROGEN-CONTAINING METAL CAP FOR INTERCONNECT STRUCTURES - An interconnect structure is provided that has enhanced electromigration reliability without degrading circuit short yield, and improved technology extendibility. The inventive interconnect structure includes a dielectric material having a dielectric constant of about 3.0 or less. The dielectric material has at least one conductive material embedded therein. A nitrogen-containing noble metal cap is located predominately (i.e., essentially) on an upper surface of the at least one conductive region. The nitrogen-containing noble metal cap does not extend onto an upper surface of the dielectric material. In some embodiments, the nitrogen-containing noble metal cap is self-aligned to the embedded conductive material, while in other embodiments some portion of the nitrogen-containing noble metal cap extends onto an upper surface of a diffusion barrier that separates the at least one conductive material from the dielectric material. A method of fabricating such an interconnect structure utilizing a low temperature (about 200° C. or less) chemical deposition process is also provided.02-18-2010
20100038793INTERCONNECT STRUCTURES COMPRISING CAPPING LAYERS WITH LOW DIELECTRIC CONSTANTS AND METHODS OF MAKING THE SAME - Interconnect structures comprising capping layers with low dielectric constants and good oxygen barrier properties and methods of making the same are provided. In one embodiment, the integrated circuit structure comprises: an interlevel dielectric layer disposed above a semiconductor substrate; a conductive interconnect embedded in the interlevel dielectric layer; a first capping layer comprising Si02-18-2010
20100084767DISCONTINUOUS/NON-UNIFORM METAL CAP STRUCTURE AND PROCESS FOR INTERCONNECT INTEGRATION - An interconnect structure including a noble metal-containing cap that is present at least on some portion of an upper surface of at least one conductive material that is embedded within an interconnect dielectric material is provided. In one embodiment, the noble metal-containing cap is discontinuous, e.g., exists as nuclei or islands on the surface of the at least one conductive material. In another embodiment, the noble metal-containing cap has a non-uniform thickness across the surface of the at least one conductive material.04-08-2010
20110092031EFFICIENT INTERCONNECT STRUCTURE FOR ELECTRICAL FUSE APPLICATIONS - A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element.04-21-2011

Patent applications by Chao-Kun Hu, Somers, NY US