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Chao-Cheng
Chao-Cheng Chang, Jhudong Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20100207461 | Power-on signal transmitting system and power-on signal transmitting method - The invention discloses a power-on signal transmitting system, which includes a first electronic device, a second electronic device and a cable coupled between the two electronic devices. The first electronic device includes a power-on control unit. The second electronic device includes a power-on detection unit. The cable includes at least one information wiring and a signal level wiring. The at least one information wiring is used for transmitting an information signal between the first electronic device and the second electronic device. When the second electronic device is at a power-off state, the power-on control unit of the first electronic device is used for transmitting a power-on signal through the signal level wiring to the second electronic device. The power-on detection unit senses the power-on signal and turns on the second electronic device. | 08-19-2010 |
Chao-Cheng Chen, Shin-Chu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100068861 | METHOD OF DEFINING GATE STRUCTURE HEIGHT FOR SEMICONDUCTOR DEVICES - Provided is a method of semiconductor fabrication including process steps allowing for defining and/or modifying a gate structure height during the fabrication process. The gate structure height may be modified (e.g., decreased) at one or more stages during the fabrication by etching a portion of a polysilicon layer included in the gate structure. The method includes forming a coating layer on the substrate and overlying the gate structure. The coating layer is etched back to expose a portion of the gate structure. The gate structure (e.g., polysilicon) is etched back to decrease the height of the gate structure. | 03-18-2010 |
| 20110049567 | BOTTLE-NECK RECESS IN A SEMICONDUCTOR DEVICE - The present disclosure provides a method for fabricating a semiconductor device that includes providing a silicon substrate, forming a gate stack over the silicon substrate, performing a biased dry etching process to the substrate to remove a portion of the silicon substrate, thereby forming a recess region in the silicon substrate, performing a non-biased etching process to the recess region in the silicon substrate, thereby forming a bottle-neck shaped recess region in the silicon substrate, and epi-growing a semiconductor material in the bottle-neck shaped recess region in the silicon substrate. An embodiment may include a biased dry etching process including adding HeO2 gas and HBr gas. An embodiment may include performing a first biased dry etching process including N2 gas and performing a second biased dry etching process not including N2 gas. An embodiment may include performing an oxidation process to the recess region in the silicon substrate by adding oxygen gas to form silicon oxide on a portion of the recess region in the silicon substrate. As such, these processes form polymer protection to help form the bottle-neck shaped recess. | 03-03-2011 |
| 20110147810 | METHOD OF FABRICATING STRAINED STRUCTURE IN SEMICONDUCTOR DEVICE - The present disclosure provides a semiconductor device that includes a semiconductor substrate, a gate structure disposed on a portion of the substrate, and strained structures disposed at either side of the portion of the substrate and formed of a semiconductor material different from the semiconductor substrate. The portion of the substrate is T shaped having a horizontal region and a vertical region that extends from the horizontal region in a direction away from a surface of the substrate. | 06-23-2011 |
Chao-Cheng Chen, Shinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110031562 | SEALING LAYER OF A FIELD EFFECT TRANSISTOR - An exemplary structure for a gate structure of a field effect transistor comprises a gate electrode; a gate insulator under the gate electrode having footing regions on opposing sides of the gate electrode; and a sealing layer on sidewalls of the gate structure, wherein a thickness of lower portion of the sealing layer overlying the footing regions is less than a thickness of upper portion of the sealing layer on sidewalls of the gate electrode, whereby the field effect transistor made has almost no recess in the substrate surface. | 02-10-2011 |
Chao-Cheng Chen, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080303102 | Strained Isolation Regions - An isolation trench having localized stressors is provided. In accordance with embodiments of the present invention, a trench is formed in a substrate and partially filled with a dielectric material. In an embodiment, the trench is filled with a dielectric layer and a planarization step is performed to planarize the surface with the surface of the substrate. The dielectric material is then recessed below the surface of the substrate. In the recessed portion of the trench, the dielectric material may remain along the sidewalls or the dielectric material may be removed along the sidewalls. A stress film, either tensile or compressive, may then be formed over the dielectric material within the recessed portion. The stress film may also extend over a transistor or other semiconductor structure. | 12-11-2008 |
| 20090045482 | Shallow Trench Isolation with Improved Structure and Method of Forming - A shallow trench isolation (STI) structure has a top portion tapering in width from wide to narrow in a direction from a substrate surface, from a first width at a top of the first portion to a second width at a bottom of the first portion. The STI structure also includes a bottom portion below the top portion, which expands from the bottom of the top portion to a substantially widened lateral distance having a third width. The third width is, in general, substantially larger than the second width. The inventive STI structure can provide desired isolation characteristics with a significantly reduced aspect ratio, thus suitable for device isolations in advanced processing technology. | 02-19-2009 |
Chao-Cheng Chen, Chong-Ling TW
| Patent application number | Description | Published |
|---|---|---|
| 20100190349 | Method for backside polymer reduction in dry-etch process - A method for preventing the formation of contaminating polymeric films on the backsides of semiconductor substrates includes providing an oxygen-impregnated focus ring and/or an oxygen-impregnated chuck that releases oxygen during etching operations. The method further provides delivering oxygen gas to the substrate by mixing oxygen in the cooling gas mixture, maintaining the focus ring at a temperature no greater than the substrate temperature during etching and cleaning the substrate using a two step plasma cleaning sequence that includes suspending the substrate above the chuck. | 07-29-2010 |
Chao-Cheng Chiang, Xizhi City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100179146 | Indolinone Compounds as Kinase Inhibitors - Indolinone compounds of formula (I) or (II): | 07-15-2010 |
Chao-Cheng Hsu, Yilan County TW
| Patent application number | Description | Published |
|---|---|---|
| 20100061790 | LABEL ROLL HOLDER RETURNING MECHANISM FOR BARCODE PRINTER - A label roll holder returning mechanism is provided for a barcode printer and includes at least one restoration roller, a coiled resilient element, at least two movable rails, and at least two label roll holding elements. The restoration roller is rotatably mounted to a bottom of the barcode printer and has a top portion forming a positive-movement engagement section. The coiled resilient element is received inside the restoration roller to provide a restoration force to the rotation of the restoration roller. The movable rails are set to the bottom of the barcode printer in a substantially parallel manner. Each movable rail has a surface forming at least one counterpart positive-movement engagement section engaging the positive-movement engagement section of the restoration roller. The label roll holding elements are arranged at a top of the barcode printer and are coupled to the movable rails respectively, whereby the label roll holding elements offer the function of outward separating from each other for removing and installing a roll of label and inward approaching each other to clamp and hold the label roll by means of the engagement between the restoration roller and the movable rails and the restoration force thereof. As such, a label roll holder returning mechanism featuring balanced force restoration is provided. | 03-11-2010 |
Chao-Cheng Lin, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090128760 | FLAT DISPLAY PANEL HAVING STRENGTH ENHANCING STRUCTURE - A flat display panel includes a first substrate, a second substrate opposite to the first substrate, a sealant disposed between the first and second substrates. The sealant, the edge of the inner surface of the first substrate, and the edge of the inner surface of the second substrate form a space, and the flat display panel further includes a protection layer disposed inside the space so as to reinforce the structural strength of the flat display panel. | 05-21-2009 |
| 20090258565 | Method for Manufacturing Display Panel within Substrates having Different Thickness - The present invention provides a method for manufacturing display panel with substrates having different thickness. The display panel manufacturing method includes assembling a first substrate and a second substrate, positioning the anti-etching layer on the outer surface of the first substrate and etching the substrates at the first etching process. Because the anti-etching layer is disposed on the first substrate, the first substrate is protected by the anti-etching layer from being etched or later etched. Simultaneously, the second substrate is etched to reduce its thickness in order to adjust the thickness difference between the first substrate and the second substrate. | 10-15-2009 |
Chao-Cheng Lin, Taichung TW
| Patent application number | Description | Published |
|---|---|---|
| 20110059592 | NONVOLATILE MEMORY AND FABRICATION METHOD THEREOF - Non-volatile memories formed on a substrate and fabrication methods are disclosed. A bottom electrode comprising a metal layer is disposed on the substrate. A buffer layer comprising a LaNiO | 03-10-2011 |
Chao-Cheng Lin, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090033813 | MULTI-DOMAIN LIQUID CRYSTAL DISPLAY - A multi-domain liquid crystal display (LCD) including an active device array substrate, an opposite substrate, an electric field shielding layer, and a liquid crystal layer is provided. The active device array substrate has a plurality of pixels, wherein each pixel has a pixel electrode. The opposite substrate has a common electrode disposed between the opposite substrate and the active device array substrate. The electric field shielding layer is disposed on a part of each pixel electrode. The liquid crystal layer is disposed between the active device array substrate and the opposite substrate. The liquid crystal layer corresponding to each pixel is divided into a low-voltage domain and a high-voltage domain having the same cell gap, wherein the position of the electric field shielding layer is corresponding to the position of the low-voltage domain. Color shift of the multi-domain LCD is improved effectively at oblique viewing angles. | 02-05-2009 |
| 20090130413 | THINNED SUBSTRATE, MANUFACTURING PROCESS THEREOF, AND MANUFACTURING PROCESS OF DISPLAY PANEL APPLYING THE SAME - A thinned substrate for a display panel and manufacturing process thereof are provided. The thinned substrate includes an inorganic transparent plate and a supporting layer to form a stacked layer. The supporting layer avails improvement of structure strength of the thinned substrate and reliability of the thinned substrate. A ratio between thickness of the inorganic transparent plate and thickness of the supporting layer is substantially less than or substantially equal to 4. A total thickness of the stacked layer is substantially less than or substantially equal to 20 mm. Bending strength of the stacked layer is substantially greater than or substantially equal to 150 MPa. Besides, a manufacturing process of the display panel applying said thinned substrate is also provided. | 05-21-2009 |
| 20100117944 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel includes a display region, a periphery circuit region, a joint obligate region, a plurality of first test thin-film transistors (TFTs), a plurality of second TFTs, a plurality of first lines, a plurality of second lines, a blank region, and at least one first adjustment TFT. The first and second test TFTs are disposed on the joint obligate region according to a regular distance. Each of the first and second test TFTs has a transistor width. The first adjustment TFT is disposed on the blank region. The width of the blank region is not smaller than the sum of the twice regular distance and the transistor width. Thereby, the present invention can prevent the band mura of the liquid crystal display panel effectively when the liquid crystal display panel is in testing. | 05-13-2010 |
Chao-Cheng Liu, Gangshan Township TW
| Patent application number | Description | Published |
|---|---|---|
| 20090267210 | INTEGRATED CIRCUIT PACKAGE AND MANUFACTURING METHOD THEREOF - An integrated circuit package and a manufacturing method thereof are provided. The package includes a die pad, a plurality of first and second contact pads, a first die, a second die and a molding compound. The contact pads adjacent to at least one side of the die pad are arranged along an inner row and an outer row with respect to the die pad. The first die is fixed on the first die and electrically connected to the first contact pads by wire-bonding. The second die is fixed on the first die and electrically connected to the second contact pads by wire-bonding. The molding compound covers the second die, the first die, the die pad, the first contact pads and the second contact pads. The bottoms of the die pad, the first contact pads and the second contact pads are exposed at the bottom surface of the molding compound. | 10-29-2009 |
Chao-Cheng Wang, Nantou City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120088318 | Method for Fabricating a Vertical Light-Emitting Diode with High Brightness - A method for fabricating a vertical light-emitting diode comprises forming a stack including a plurality of epitaxial layers on a patterned first substrate, placing a second substrate on the stack, removing the first substrate to expose the first surface, planarizing a first surface of the stack that was in contact with the patterned first substrate and has a pattern corresponding to a pattern provided on the first substrate to form a planarized second surface, and forming a first electrode in contact with a side of the second substrate that is opposite to the stack, and a second electrode in contact with the second surface of the stack. A roughening step can be performed to form uneven surface portions on a region of the second surface for improving light emission through the second surface of the stack. | 04-12-2012 |
Chao-Cheng Wen, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20110025628 | Method for Determining Touch Point Displacement and Associated Apparatus - A method for determining a displacement of a touch point is applied to a touch panel to reduce noise interfering with determination of the displacement. The method includes obtaining a displacement according to a movement of a touch point on the touch panel; checking whether the displacement is within a predetermined range; and determining that the movement is valid when the displacement is within the predetermined range. | 02-03-2011 |
| 20110242022 | Touch Determining Method and Determining Method of Touch Gesture on a Touch Panel - A determining method of touch gesture on a touch panel is provided to avoid misjudgment of determination of a multi-finger touch as a single-finger touch. The method includes determining whether a first valid touch is present on the touch panel; determining whether a second valid touch is present on the touch panel within a predetermined time period when the first valid touch is continuously present within the predetermined time period; generating a first hand gesture instruction when the second valid touch is not detected during the predetermined time period; and generating a second hand gesture instruction when the second valid touch is detected within the predetermined time period. | 10-06-2011 |
| 20110242025 | Hand Gesture Recognition Method for Touch Panel and Associated Apparatus - A hand gesture recognition method according to the present disclosure is applied to a touch panel comprising a plurality of sensors, each of which generating a sensing value according to a touch operation. The method includes providing a first reference value and a second reference value; generating a count value by counting a quantity of the sensing values that are greater than a threshold; determining the touch operation as a first hand gesture when the count value is greater than the first reference value but smaller than the second reference value; and determining the touch operation as a second hand gesture when the count value is greater than the second reference value. | 10-06-2011 |
Chao-Cheng Wu, Tamshui TW
| Patent application number | Description | Published |
|---|---|---|
| 20110097207 | PRESSURE RELIEF DEVICE - A pressure relief device includes a main body and at least two air control units. The main body has at least one passage therein and two outlets formed at upper and lower ends of the passage. A lid is pivotally connected to each of the outlets. The two air control units are each disposed in the passage close to the lid. An air control device drives the air control units to open/close the lid which is adapted to open/close the passage. | 04-28-2011 |