| Patent application number | Description | Published |
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| 20080303118 | PROCESS FOR FABRICATING A STRUCTURE FOR EPITAXY WITHOUT AN EXCLUSION ZONE - A process for fabricating a composite structure for epitaxy, including at least one crystalline growth seed layer of semiconductor material on a support substrate, with the support substrate and the crystalline growth seed layer each having, on the periphery of their bonding face, a chamfer or an edge rounding zone. The process includes at least one step of wafer bonding the crystalline growth seed layer directly onto the support substrate and at least one step of thinning the crystalline growth seed layer. After thinning, the crystalline growth seed layer has a diameter identical to its initial diameter. | 12-11-2008 |
| 20090091002 | METHODS FOR PRODUCING IMPROVED EPITAXIAL MATERIALS - This invention provides methods for fabricating substantially continuous layers of group III nitride semiconductor materials having low defect densities. The methods include epitaxial growth of nucleation layers on a base substrate, thermally treatment of said nucleation layer and epitaxial growth of a discontinuous masking layer. The methods outlined promote defect reduction through masking, annihilation and coalescence, therefore producing semiconductor structures with low defect densities. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g., group II-VI and group III-V compound semiconductor materials. | 04-09-2009 |
| 20090098343 | EPITAXIAL METHODS AND TEMPLATES GROWN BY THE METHODS - This invention provides methods for fabricating substantially continuous layers of a group III nitride semiconductor material having low defect densities and optionally having a selected crystal polarity. The methods include epitaxial growth nucleating and/or seeding on the upper portions of a plurality of pillars/islands of a group III nitride material that are irregularly arranged on a template structure. The upper portions of the islands have low defect densities and optionally have a selected crystal polarity. The invention also includes template structures having a substantially continuous layer of a masking material through which emerge upper portions of the pillars/islands. The invention also includes such template structures. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g., group II-VI and group III-V compound semiconductor materials. | 04-16-2009 |
| 20090189185 | EPITAXIAL GROWTH OF RELAXED SILICON GERMANIUM LAYERS - A relaxed silicon germanium structure comprises a silicon buffer layer produced using a chemical vapor deposition process with an operational pressure greater than approximately 1 torr. The relaxed silicon germanium structure further comprises a silicon germanium layer deposited over the silicon buffer layer. The silicon germanium layer has less than about 10 threading dislocations per square centimeter. By depositing the silicon buffer layer at a reduced deposition rate, the overlying silicon germanium layer can be provided with a “crosshatch free” surface. | 07-30-2009 |
| 20090205563 | TEMPERATURE-CONTROLLED PURGE GATE VALVE FOR CHEMICAL VAPOR DEPOSITION CHAMBER - The present invention relates to methods and apparatus that are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the methods relate to substantially preventing the formation of unwanted materials on an isolation valve fixture within a chemical vapor deposition (CVD) reactor. In particular, the invention provides apparatus and methods for limiting deposition/condensation of GaCl | 08-20-2009 |
| 20090214785 | THERMALIZATION OF GASEOUS PRECURSORS IN CVD REACTORS - The present invention relates to the field of semiconductor processing and provides apparatus and methods that improve chemical vapor deposition (CVD) of semiconductor materials by promoting more efficient thermalization of precursor gases prior to their reaction. In preferred embodiments, the invention comprises heat transfer structures and their arrangement within a CVD reactor so as to promote heat transfer to flowing process gases. In certain preferred embodiments applicable to CVD reactors transparent to radiation from heat lamps, the invention comprises radiation-absorbent surfaces placed to intercept radiation from the heat lamps and to transfer it to flowing process gases. | 08-27-2009 |
| 20090283029 | ABATEMENT OF REACTION GASES FROM GALLIUM NITRIDE DEPOSITION - Methods for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, or for wafers. The equipment and methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. The method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber to form the semiconductor material; removing exhaust gases including unreacted Group III precursor, unreacted Group V component and reaction byproducts; and heating the exhaust gases to a temperature sufficient to reduce condensation thereof and enhance manufacture of the semiconductor material. Advantageously, the exhaust gases are heated to sufficiently avoid condensation to facilitate sustained high volume manufacture of the semiconductor material. | 11-19-2009 |
| 20100072576 | METHODS AND STRUCTURES FOR ALTERING STRAIN IN III-NITRIDE MATERIALS - Methods and structures for producing semiconductor materials, substrates and devices with improved characteristics are disclosed. Structures and methods for forming reduced strain structures include forming an interface between a support structure surface and a strained semiconductor layer. The support structure is selectively etched to form a plurality of semiconductor islands with reduced levels of strain. | 03-25-2010 |
| 20100109126 | METHODS OF FORMING LAYERS OF SEMICONDUCTOR MATERIAL HAVING REDUCED LATTICE STRAIN, SEMICONDUCTOR STRUCTURES, DEVICES AND ENGINEERED SUBSTRATES INCLUDING SAME - Methods of fabricating semiconductor devices or structures include forming structures of a semiconductor material overlying a layer of a compliant material, subsequently changing the viscosity of the compliant material to relax the semiconductor material structures, and utilizing the relaxed semiconductor material structures as a seed layer in forming a continuous layer of relaxed semiconductor material. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Novel intermediate structures are formed during such methods. Engineered substrates include a continuous layer of semiconductor material having a relaxed lattice structure. | 05-06-2010 |
| 20100124814 | METHODS FOR IMPROVING THE QUALITY OF STRUCTURES COMPRISING SEMICONDUCTOR MATERIALS - Methods which can be applied during the epitaxial growth of semiconductor structures and layers of III-nitride materials so that the qualities of successive layers are successively improved. An intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface. A following layer is then grown on the intermediate layer according to the known phenomena of epitaxial lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits. Preferably, prior to growing the following layer, a discontinuous film of a dielectric material is deposited so that the dielectric material deposits discontinuously so as to reduce the number of dislocations in the laterally growing material. The methods of the invention can be performed multiple times to the same structure. Also, semiconductor structures fabricated by these methods. | 05-20-2010 |
| 20100133548 | METHODS FOR IMPROVING THE QUALITY OF EPITAXIALLY-GROWN SEMICONDUCTOR MATERIALS - The invention provides methods which can be applied during the epitaxial growth of two or more layers of semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects present in one epitaxial layer are capped with a masking material. A following layer is then grown so it extends laterally above the caps according to the known phenomena of epitaxial lateral overgrowth. The methods of the invention can be repeated by capping surface defects in the following layer and then epitaxially growing a second following layer according to ELO. The invention also includes semiconductor structures fabricated by these methods. | 06-03-2010 |
| 20100180913 | METHODS FOR IN-SITU CHAMBER CLEANING PROCESS FOR HIGH VOLUME MANUFACTURE OF SEMICONDUCTOR MATERIALS - The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and apparatus for in-situ removal of undesired deposits in the interiors of reactor chambers, for example, on chamber walls and elsewhere. The invention provides methods according to which cleaning steps are integrated and incorporated into a high-throughput growth process. Preferably, the times when growth should be suspended and cleaning commenced and when cleaning should be terminated and growth resumed are automatically determined based on sensor inputs. The invention also provides reactor chamber systems for the efficient performance of the integrated cleaning/growth methods of this invention. | 07-22-2010 |
| 20100187568 | EPITAXIAL METHODS AND STRUCTURES FOR FORMING SEMICONDUCTOR MATERIALS - Methods and structures for producing semiconductor materials, substrates and devices with improved characteristics are disclosed. Structures and methods for forming reduced strain structures include forming a plurality of substantially strain-relaxed island structures and utilizing such island structures for subsequent further growth of strain-relaxed substantial continuous layers of semiconductor material. | 07-29-2010 |
| 20100242835 | HIGH VOLUME DELIVERY SYSTEM FOR GALLIUM TRICHLORIDE - The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and equipment for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods and equipment are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the precursor is provided at a mass flow of at least 50 g Group III element/hour for a time of at least 48 hours to facilitate high volume manufacture of the semiconductor material. Advantageously, the mass flow of the gaseous Group III precursor is controlled to deliver the desired amount. | 09-30-2010 |
| 20100244197 | EPITAXIAL METHODS AND STRUCTURES FOR REDUCING SURFACE DISLOCATION DENSITY IN SEMICONDUCTOR MATERIALS - The invention provides methods and structures for reducing surface dislocations of a semiconductor layer, and can be employed during the epitaxial growth of semiconductor structures and layers comprising III-nitride materials. Embodiments involve the formation of a plurality of dislocation pit plugs to prevent propagation of dislocations from an underlying layer of material into a following semiconductor layer of material. | 09-30-2010 |
| 20100244203 | SEMICONDUCTOR STRUCTURE HAVING A PROTECTIVE LAYER - A semiconductor structure includes a substrate having a first nitride-based semiconductor layer. A pseudomorphic protective layer is formed on the first nitride-based semiconductor layer and a second nitride-based semiconductor layer is formed on the pseudomorphic protective layer. The pseudomorphic protective layer has a thickness that is less than a critical thickness so that it drives the material quality of the second nitride-based semiconductor layer to correspond with that of the first nitride-based semiconductor layer. | 09-30-2010 |
| 20100258053 | APPARATUS FOR DELIVERING PRECURSOR GASES TO AN EPITAXIAL GROWTH SUBSTRATE - This invention provides gas injector apparatus that extends into a growth chamber in order to provide more accurate delivery of thermalized precursor gases. The improved injector can distribute heated precursor gases into a growth chamber in flows that spatially separated from each other up until they impinge of a growth substrate and that have volumes adequate for high volume manufacture. Importantly, the improved injector is sized and configured so that it can fit into existing commercial growth chamber without hindering the operation of mechanical and robot substrate handling equipment used with such chambers. This invention is useful for the high volume growth of numerous elemental and compound semiconductors, and particularly useful for the high volume growth of Group III-V compounds and GaN. | 10-14-2010 |
| 20110011450 | METHODS AND STRUCTURES FOR BONDING ELEMENTS - Embodiments of the invention relate to methods and structures for fabricating semiconductor structures that include at least one bonding layer for attaching two or more elements to one another. The at least one bonding layer may be at least substantially comprised of zinc, silicon and oxygen. | 01-20-2011 |
| 20110024747 | METHODS FOR IMPROVING THE QUALITY OF GROUP III-NITRIDE MATERIALS AND STRUCTURES PRODUCED BY THE METHODS - The invention provides methods which can be applied during the epitaxial growth of two or more layers of Group III-nitride semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects interact with a protective layer of a protective material to form amorphous complex regions capable of preventing the further propagation of defects and dislocations. The invention also includes semiconductor structures fabricated by these methods. | 02-03-2011 |
| 20110037075 | PROCESS FOR FABRICATING A STRUCTURE FOR EPITAXY WITHOUT AN EXCLUSION ZONE - A process for fabricating a composite structure for epitaxy, including at least one crystalline growth seed layer of semiconductor material on a support substrate, with the support substrate and the crystalline growth seed layer each having, on the periphery of their bonding face, a chamfer or an edge rounding zone. The process includes at least one step of wafer bonding the crystalline growth seed layer directly onto the support substrate and at least one step of thinning the crystalline growth seed layer. After thinning, the crystalline growth seed layer has a diameter identical to its initial diameter. | 02-17-2011 |
| 20110057294 | FORMATION OF SUBSTANTIALLY PIT FREE INDIUM GALLIUM NITRIDE - A method of fabricating a device layer structure includes providing a III-nitride semiconductor layer which is bonded to a bonding substrate. A device layer structure is formed on a nitrogen polar surface of the III-nitride semiconductor layer. The device layer structure includes an indium gallium nitride layer with a metal polar surface adjacent to the nitrogen polar surface of the III-nitride semiconductor layer. | 03-10-2011 |
| 20110101373 | METHOD OF FORMING A COMPOSITE LASER SUBSTRATE - A composite substrate for laser devices is disclosed having improved wave guiding properties, improved lattice matching, improved thermal expansion matching, and improved thermal conductivity. The composite substrate has an intermediate layer ( | 05-05-2011 |
| 20110156212 | METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES OR DEVICES USING LAYERS OF SEMICONDUCTOR MATERIAL HAVING SELECTED OR CONTROLLED LATTICE PARAMETERS - Methods of fabricating semiconductor devices or structures include bonding a layer of semiconductor material to another material at a temperature, and subsequently changing the temperature of the layer of semiconductor material. The another material may be selected to exhibit a coefficient of thermal expansion such that, as the temperature of the layer of semiconductor material is changed, a controlled and/or selected lattice parameter is imparted to or retained in the layer of semiconductor material. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Novel intermediate structures are formed during such methods. Engineered substrates include a layer of semiconductor material having an average lattice parameter at room temperature proximate an average lattice parameter of the layer of semiconductor material previously attained at an elevated temperature. | 06-30-2011 |
