Patent application number | Description | Published |
20100299467 | STORAGE DEVICES WITH SECURE DEBUGGING CAPABILITY AND METHODS OF OPERATING THE SAME - A device includes a first bus, a second bus, a processor configured to communicate with a storage circuit through the first bus and to communicate with a debug host through the second bus and a control circuit configured to inhibit transfer of data from the second bus to the debug host while receiving authentication information from the debug host and to enable transfer of data from the second bus to the debug host responsive to authentication of the received authentication information. The control circuit may be configured to inhibit data transfer from the second bus to the debug host by causing dummy data to be transmitted to the debug host over a transmit channel between the device and the debug host. | 11-25-2010 |
20100306631 | MEMORY CONTROLLER AND MEMORY SYSTEM INCLUDING THE SAME - A memory controller includes first and second interface controllers configured to exchange data with external devices, and an internal block connected between the first and second interface controllers. The first and second interface controllers exchange data received from the external devices and at least one parity bit corresponding to the received data through the internal block. | 12-02-2010 |
20110252183 | METHODS OF STORING DATA IN STORAGE MEDIA, DATA STORAGE DEVICES USING THE SAME, AND SYSTEMS INCLUDING THE SAME - A method of storing data in a storage media can include determining whether a size of data to be stored in the storage media satisfies a reference condition and compressing the data to provide compressed data for storage in the storage media upon determining that the size satisfies a reference condition. | 10-13-2011 |
20140366153 | STORAGE DEVICES WITH SECURE DEBUGGING CAPABILITY AND METHODS OF OPERATING THE SAME - A device includes a first bus, a second bus, a processor configured to communicate with a storage circuit through the first bus and to communicate with a debug host through the second bus and a control circuit configured to inhibit transfer of data from the second bus to the debug host while receiving authentication information from the debug host and to enable transfer of data from the second bus to the debug host responsive to authentication of the received authentication information. The control circuit may be configured to inhibit data transfer from the second bus to the debug host by causing dummy data to be transmitted to the debug host over a transmit channel between the device and the debug host. | 12-11-2014 |
Patent application number | Description | Published |
20100157832 | APPARATUS AND METHOD FOR DISCRIMINATING FRAME FORMAT IN WIRELESS COMMUNICATION SYSTEM - A frame format discrimination method in a wireless communication system is provided. The frame format discrimination method includes: calculating a power of an in-phase signal and a power of a quadrature signal in a predetermined section of a frame; comparing the power of the in-phase signal with the power of the quadrature signal; and determining the format of the frame in accordance with the comparison result. | 06-24-2010 |
20140071916 | APPARATUS AND METHOD FOR TRANSMITTING DISCOVERY SIGNAL - A device transmits a discovery signal including identification information of the device in an empty discovery slot among a plurality of discovery slots of a discovery interval. The discovery signal includes two orthogonal frequency division multiplexing (OFDM) symbols. One of the two orthogonal frequency division multiplexing (OFDM) symbols includes at least one tone. The identification information of the device is displayed by a position of a subcarrier corresponding to the at least one tone. | 03-13-2014 |
20140071917 | METHOD OF TRANSMITTING AND RECEIVING DATA IN TALK-AROUND DIRECT COMMUNICATION NETWORK - A method in which a transmitting terminal included in an talk-around direct communication (TDC) network transmits data includes: determining a data frame for transmitting the data; requesting to reserve a data transmission segment included in the data frame through a transmission request segment included in the data frame; receiving a response signal transmitted in a transmission response segment included in the data frame; and analyzing the response signal and transmitting the data through the data transmission segment. | 03-13-2014 |
20140112235 | DISCOVERY SIGNAL TRANSMITTED IN DIRECT COMMUNICATION SYSTEM, AND METHOD OF TRANSMITTING/RECEIVING THE DISCOVERY SIGNAL - A discovery signal that a first device joining in direct communication broadcasts through a radio channel is provided. The discovery signal includes a first field representing whether the discovery signal is a signal for discovering a device or a signal for discovering a service, and a second field including one of device identifier information of the first device and service information of a service that the first device provides according to a value of the first field. | 04-24-2014 |
20140211781 | SYNCHRONIZATION METHOD AND APPARATUS IN DEVICE-TO-DEVICE DIRECT COMMUNICATION - A synchronization method by a device is provided in a device-to-device direct communication. The device receives synchronization signals from a plurality of other devices at a current frame, and estimates a synchronization time at a next frame based on the synchronization signals received from the other devices. | 07-31-2014 |
Patent application number | Description | Published |
20090154334 | QR DECOMPOSITION APPARATUS AND METHOD FOR MIMO SYSTEM - Provided are a QR decomposition apparatus and method for a MIMO system. The QR decomposition apparatus includes: a norm calculator for calculating a vector size norm for a channel input; a Q column calculator for calculating a column value of a unitary matrix Q by multiplying a delayed channel input with √{square root over (norm)}; an R row calculator for receiving the delayed channel input, the output of the Q column calculator, and 1/√{square root over (norm)}, and calculating a row value of an upper triangular matrix R; a Q update calculator for receiving the delayed channel input, the output of the R row calculator, and a delayed output of the Q column calculator, and calculating a Q update matrix value; and a norm update calculator for receiving a delayed output of the norm calculator and an output of the R row calculator, and outputting a norm update matrix value. | 06-18-2009 |
20090154608 | RECEIVING APPARATUS AND METHOD FOR MIMO SYSTEM - Provided are a receiving apparatus for a multiple input multiple output (MIMO) system and a method thereof. The receiving apparatus includes a QR decomposing unit for calculating a single (Q) matrix vector and an upper triangle (R) matrix vector for a receiving signal vector; a first symbol estimation unit for estimating predetermined symbols using the calculated Q matrix vector and R matrix vector; a log likelihood ratio (LLR) calculating unit for calculating log likelihood ratios of unit bits for the estimated symbols; an interference removing unit for receiving a decoded signal that is decided using the calculated log likelihood ratios and removing interference from the receiving signal vector; and a second symbol estimation unit for linearly estimating remaining symbols for the interference removed signal. | 06-18-2009 |
20090156148 | LINK ADAPTATION METHOD AND APPARATUS IN WIRELESS COMMUNICATION SYSTEM - Provided is a link adaptation method and apparatus in wireless communication system. The method, includes: amplifying a received signal; converting the amplified signal into a digital signal; calculating digital signal strength; and calculating the received signal strength based on the digital signal strength and a gain of said amplifying a received signal. | 06-18-2009 |
20090158112 | METHOD FOR PRODUCING PARITY CHECK MATRIX FOR LOW COMPLEXITY AND HIGH SPEED DECODING, AND APPARATUS AND METHOD FOR CODING LOW DENSITY PARITY CHECK CODE USING THE SAME - Provided are a method for producing a parity check matrix for low complexity and high speed decoding, and an apparatus and method for coding a Low Density Parity Check (LDPC) code using the same. The method includes: calculating a cyclic shift value of a subblock to a matrix; and when the calculated cyclic shift values of the subblock are arrayed in the matrix, producing a parity check matrix by arraying the cyclic shift values of the subblock except ‘0 matrix’ without duplication to any one column. | 06-18-2009 |
20090158113 | APPARATUS AND METHOD FOR ENCODING LDPC CODE USING MESSAGE PASSING ALGORITHM - Provided is an apparatus and method for encoding a Low Density Parity Check (LDPC) code using a message passing algorithm. The apparatus, includes: a parity calculating unit for operating a check node value on an input bit and a predetermined parity bit according to the message passing algorithm and calculating a parity bit; a parity correcting unit for correcting the calculated parity bit according to a parity check result of the calculated parity bit; and an output transform unit for combining the input bit and the corrected parity bit. | 06-18-2009 |
20090158121 | APPARATUS AND METHOD FOR DECODING LDPC CODE BASED ON PROTOTYPE PARITY CHECK MATRIXES - Provided is an apparatus and method for decoding a Low Density Parity Check (LDPC) code based on prototype parity check matrixes. The apparatus, includes: a parity check matrix selecting means for determining multiple prototype parity check matrixes according to a sub-matrix size and a parallelization figure for processing the parity check matrix; a bit input means for receiving a log likelihood probability value for input bit according to the sub-matrix size and the parallelization figure; a check matrix process means for sequentially performing a partial parallel process on the parity check matrix based on the received log likelihood probability value and the determined multiple prototype parity check matrixes; and a bit process means for determining a bit level based on the partial-parallel processed parity check matrix value and recovering the input bit according to the sub-matrix size and the parallelization figure. | 06-18-2009 |
20100142663 | APPARATUS AND METHOD FOR RECEIVING SIGNAL IN WIRELESS COMMUNICATION SYSTEM USING MULTI ANTENNA - Provided are apparatus and method for receiving signals in a wireless communication system. A receiving apparatus including a plurality of variable gain amplifier units configured to respectively control the gains of radio frequency (RF) signals received respectively through a plurality of antennas, and a plurality of analog-to-digital converters configured to respectively convert the output signals of the respective variable gain amplifiers into digital signals, includes: an automatic gain controller configured to calculate the gain values of the respective gain control amplifier units by receiving the digital signals outputted from the respective analog-to-digital converters, select the minimum gain value among the calculated gain control values, and calculate the differences between the minimum gain value and the other gain values; and a noise matching amplifier configured to attenuate the digital signals outputted from the respective analog-to-digital converters according to the calculated difference values. | 06-10-2010 |