| Patent application number | Description | Published |
| 20090154334 | QR DECOMPOSITION APPARATUS AND METHOD FOR MIMO SYSTEM - Provided are a QR decomposition apparatus and method for a MIMO system. The QR decomposition apparatus includes: a norm calculator for calculating a vector size norm for a channel input; a Q column calculator for calculating a column value of a unitary matrix Q by multiplying a delayed channel input with √{square root over (norm)}; an R row calculator for receiving the delayed channel input, the output of the Q column calculator, and 1/√{square root over (norm)}, and calculating a row value of an upper triangular matrix R; a Q update calculator for receiving the delayed channel input, the output of the R row calculator, and a delayed output of the Q column calculator, and calculating a Q update matrix value; and a norm update calculator for receiving a delayed output of the norm calculator and an output of the R row calculator, and outputting a norm update matrix value. | 06-18-2009 |
| 20090154608 | RECEIVING APPARATUS AND METHOD FOR MIMO SYSTEM - Provided are a receiving apparatus for a multiple input multiple output (MIMO) system and a method thereof. The receiving apparatus includes a QR decomposing unit for calculating a single (Q) matrix vector and an upper triangle (R) matrix vector for a receiving signal vector; a first symbol estimation unit for estimating predetermined symbols using the calculated Q matrix vector and R matrix vector; a log likelihood ratio (LLR) calculating unit for calculating log likelihood ratios of unit bits for the estimated symbols; an interference removing unit for receiving a decoded signal that is decided using the calculated log likelihood ratios and removing interference from the receiving signal vector; and a second symbol estimation unit for linearly estimating remaining symbols for the interference removed signal. | 06-18-2009 |
| 20090156148 | LINK ADAPTATION METHOD AND APPARATUS IN WIRELESS COMMUNICATION SYSTEM - Provided is a link adaptation method and apparatus in wireless communication system. The method, includes: amplifying a received signal; converting the amplified signal into a digital signal; calculating digital signal strength; and calculating the received signal strength based on the digital signal strength and a gain of said amplifying a received signal. | 06-18-2009 |
| 20090158112 | METHOD FOR PRODUCING PARITY CHECK MATRIX FOR LOW COMPLEXITY AND HIGH SPEED DECODING, AND APPARATUS AND METHOD FOR CODING LOW DENSITY PARITY CHECK CODE USING THE SAME - Provided are a method for producing a parity check matrix for low complexity and high speed decoding, and an apparatus and method for coding a Low Density Parity Check (LDPC) code using the same. The method includes: calculating a cyclic shift value of a subblock to a matrix; and when the calculated cyclic shift values of the subblock are arrayed in the matrix, producing a parity check matrix by arraying the cyclic shift values of the subblock except ‘0 matrix’ without duplication to any one column. | 06-18-2009 |
| 20090158113 | APPARATUS AND METHOD FOR ENCODING LDPC CODE USING MESSAGE PASSING ALGORITHM - Provided is an apparatus and method for encoding a Low Density Parity Check (LDPC) code using a message passing algorithm. The apparatus, includes: a parity calculating unit for operating a check node value on an input bit and a predetermined parity bit according to the message passing algorithm and calculating a parity bit; a parity correcting unit for correcting the calculated parity bit according to a parity check result of the calculated parity bit; and an output transform unit for combining the input bit and the corrected parity bit. | 06-18-2009 |
| 20090158121 | APPARATUS AND METHOD FOR DECODING LDPC CODE BASED ON PROTOTYPE PARITY CHECK MATRIXES - Provided is an apparatus and method for decoding a Low Density Parity Check (LDPC) code based on prototype parity check matrixes. The apparatus, includes: a parity check matrix selecting means for determining multiple prototype parity check matrixes according to a sub-matrix size and a parallelization figure for processing the parity check matrix; a bit input means for receiving a log likelihood probability value for input bit according to the sub-matrix size and the parallelization figure; a check matrix process means for sequentially performing a partial parallel process on the parity check matrix based on the received log likelihood probability value and the determined multiple prototype parity check matrixes; and a bit process means for determining a bit level based on the partial-parallel processed parity check matrix value and recovering the input bit according to the sub-matrix size and the parallelization figure. | 06-18-2009 |
| 20100142663 | APPARATUS AND METHOD FOR RECEIVING SIGNAL IN WIRELESS COMMUNICATION SYSTEM USING MULTI ANTENNA - Provided are apparatus and method for receiving signals in a wireless communication system. A receiving apparatus including a plurality of variable gain amplifier units configured to respectively control the gains of radio frequency (RF) signals received respectively through a plurality of antennas, and a plurality of analog-to-digital converters configured to respectively convert the output signals of the respective variable gain amplifiers into digital signals, includes: an automatic gain controller configured to calculate the gain values of the respective gain control amplifier units by receiving the digital signals outputted from the respective analog-to-digital converters, select the minimum gain value among the calculated gain control values, and calculate the differences between the minimum gain value and the other gain values; and a noise matching amplifier configured to attenuate the digital signals outputted from the respective analog-to-digital converters according to the calculated difference values. | 06-10-2010 |